公开(公告)号：US20100034964A1

公开(公告)日：2010-02-11

申请号：US12222344

申请日：2008-08-07

申请人： Show-An Chen ,  Hsin-Hung Lu ,  Ching-Yang Liu ,  Chih-Hao Chang

发明人： Show-An Chen ,  Hsin-Hung Lu ,  Ching-Yang Liu ,  Chih-Hao Chang

IPC分类号： B05D5/06 ,  C08F214/18

CPC分类号： H01L51/0039 ,  C08F14/18 ,  H01L51/0043 ,  H01L51/5012 ,  C08F2/00

摘要： A simple and efficient method for transforming conformation of parts of chains in the amorphous phase in a conjugated polymer to extended conjugation length (termed as β phase) is disclosed. The β phase acts as a dopant and can be termed self-dopant. The generated self-dopant in the amorphous host allows an efficient energy transfer and charge trapping to occur and leads to more balanced charge fluxes and more efficient charge recombination. For example, a polyfluorene film was dipped into a mixed solvent/non-solvent, tetrahydrofuran/methanol in volume ratio of 1:1, to generate a β-phase content up to 1.32%. A polymer light emitting diode with the dipped polyfluorene film as a light emitting layer therein provides a more pure and stable blue-emission (solely from the self-dopant) with CIE color coordinates x+y

摘要翻译： 公开了一种用于将共轭聚合物中无定形相的链部分的构象转化为延伸共轭长度（称为β相）的简单而有效的方法。 β相作为掺杂剂，可称为自掺杂。 在非晶主机中产生的自掺杂剂允许发生有效的能量转移和电荷捕获，并导致更平衡的电荷通量和更有效的电荷重组。 例如，将聚芴膜浸入混合溶剂/非溶剂，体积比为1:1的四氢呋喃/甲醇中，以产生高达1.32％的β相含量。 具有浸渍聚芴膜作为发光层的聚合物发光二极管提供具有CIE颜色坐标x + y <0.3和性能3.85cd A-的更纯净和稳定的蓝色发射（仅来自自掺杂物） 1（外部量子效率3.33％）和34326 cd m-2。

公开(公告)号：US20080277144A1

公开(公告)日：2008-11-13

申请号：US12176562

申请日：2008-07-21

申请人： Chien-Te Chen ,  Chih-Hao Chang

发明人： Chien-Te Chen ,  Chih-Hao Chang

IPC分类号： H05K1/00 ,  H05K3/20

CPC分类号： H05K1/0269 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0919 ,  H05K2201/09781 ,  H05K2203/163 ,  H05K2203/175 ,  Y10T29/49128

摘要： A circuit board with a quality-indicator mark and a method for indicating quality of the circuit board. The circuit board includes a plurality of circuit board units. A plating bus is formed around each circuit board unit and extended to form a plating trace in an inner-layer circuit structure of each circuit board unit. The inner-layer circuit structure is inspected in quality to maintain or break connection between the plating trace and plating bus if the quality is good or not. At least one circuit structure is formed on the inner-layer circuit structure and electrically connected to the plating trace to form a conductive mark on each circuit board unit. A metal protection layer is formed on the at least one circuit structure via the plating bus, and the conductive mark with the metal protection layer indicates that the inner-layer circuit structure of the circuit board unit is good.

摘要翻译： 具有质量指示标记的电路板和用于指示电路板的质量的方法。 电路板包括多个电路板单元。 在每个电路板单元周围形成电镀母线，并延伸以在每个电路板单元的内层电路结构中形成电镀痕迹。 如果质量好，内层电路结构的质量将被检查以维持或断开电镀痕迹和电镀母线之间的连接。 在内层电路结构上形成至少一个电路结构，并电连接到电镀迹线，以在每个电路板单元上形成导电标记。 金属保护层通过电镀母线形成在至少一个电路结构上，金属保护层的导电标记表示电路板单元的内层电路结构良好。

公开(公告)号：US07402755B2

公开(公告)日：2008-07-22

申请号：US10935870

申请日：2004-09-07

申请人： Chien-Te Chen ,  Chih-Hao Chang

发明人： Chien-Te Chen ,  Chih-Hao Chang

IPC分类号： H05K1/00

CPC分类号： H05K1/0269 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0919 ,  H05K2201/09781 ,  H05K2203/163 ,  H05K2203/175 ,  Y10T29/49128

摘要： A circuit board with a quality-indicator mark and a method for indicating quality of the circuit board. The circuit board includes a plurality of circuit board units. A plating bus is formed around each circuit board unit and extended to form a plating trace in an inner-layer circuit structure of each circuit board unit. The inner-layer circuit structure is inspected in quality to maintain or break connection between the plating trace and plating bus if the quality is good or not. At least one circuit structure is formed on the inner-layer circuit structure and electrically connected to the plating trace to form a conductive mark on each circuit board unit. A metal protection layer is formed on the at least one circuit structure via the plating bus, and the conductive mark with the metal protection layer indicates that the inner-layer circuit structure of the circuit board unit is good.

摘要翻译： 具有质量指示标记的电路板和用于指示电路板的质量的方法。 电路板包括多个电路板单元。 在每个电路板单元周围形成电镀母线，并延伸以在每个电路板单元的内层电路结构中形成电镀痕迹。 如果质量好，内层电路结构的质量将被检查以维持或断开电镀痕迹和电镀母线之间的连接。 在内层电路结构上形成至少一个电路结构，并电连接到电镀迹线，以在每个电路板单元上形成导电标记。 金属保护层通过电镀母线形成在至少一个电路结构上，金属保护层的导电标记表示电路板单元的内层电路结构良好。

公开(公告)号：US20080125591A1

公开(公告)日：2008-05-29

申请号：US11933855

申请日：2007-11-01

申请人： Yun Chi ,  Cheng-Han Yang ,  Pi-Tai Chou ,  Chung-Chih Wu ,  Chih-Hao Chang

发明人： Yun Chi ,  Cheng-Han Yang ,  Pi-Tai Chou ,  Chung-Chih Wu ,  Chih-Hao Chang

IPC分类号： C07F19/00

CPC分类号： C07F15/0033

摘要： The present invention discloses organometallic complexes with transition metal elements and their application in fabrication of a variety of light-emitting devices. The mentioned organometallic complexes can serve as emitting material or dopant for blue phosphorescent organic light-emitting devices with excellent performance. The mentioned organometallic complexes have a general formula as the following: Wherein M represents a transition metal element, and Q1 and Q2 respectively represent an atomic group forming a nitrogen-containing heterocyclic ring as a five member ring, a six member ring, or a seven member ring.

摘要翻译： 本发明公开了具有过渡金属元素的有机金属络合物及其在制造各种发光器件中的应用。 所述有机金属配合物可以用作具有优异性能的蓝色磷光有机发光器件的发光材料或掺杂剂。 所述有机金属络合物具有如下通式：其中M表示过渡金属元素，Q 1和Q 2分别表示形成含氮的原子团 杂环作为五元环，六元环或七元环。

公开(公告)号：US20060285273A1

公开(公告)日：2006-12-21

申请号：US11156350

申请日：2005-06-17

申请人： Chih-Hao Chang ,  Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lay

发明人： Chih-Hao Chang ,  Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lay

IPC分类号： H01G4/20

CPC分类号： H05K1/024 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01P3/081 ,  H01P3/085 ,  H05K1/0298 ,  H05K3/386 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/09881 ,  H01L2924/00

摘要： This invention discloses a composite distributed dielectric structure. It comprises one or more conductor layers, one or more dielectric layers distributed on the conductor layers, and one or more conductor traces distributed on the dielectric layers. One or more dielectric plates can be further around the conductor traces. The dielectric layers or plates may or may not have plural dielectric materials therein, respectively described in two embodiments. Each conductor trace lies on a dielectric material without crossing two different dielectric materials. Two or more dielectric layers may be stacked on the conductor layers The invention provides a low cost and practical dielectric structure for interconnect systems to reduce dielectric loss, cross talk, and signal propagation delay and to well control the impedance matching while maintaining proper heat dissipation and noise reduction at high frequency transmission.

摘要翻译： 本发明公开了一种复合分布介质结构。 它包括一个或多个导体层，分布在导体层上的一个或多个电介质层，以及分布在电介质层上的一个或多个导体迹线。 一个或多个电介质板可以进一步围绕导体迹线。 在两个实施例中分别描述了介电层或板可以具有或可以不具有多个电介质材料。 每个导体迹线位于介电材料上，而不会穿过两种不同的介电材料。 两个或多个电介质层可以堆叠在导体层上本发明为互连系统提供了一种低成本和实用的电介质结构，以减少介质损耗，串扰和信号传播延迟，并且在保持适当的散热的同时良好地控制阻抗匹配， 高频传输降噪。

公开(公告)号：US07022603B2

公开(公告)日：2006-04-04

申请号：US10683612

申请日：2003-10-10

申请人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

发明人： Tzu-En Ho ,  Chih-Hao Chang ,  Chang-Rong Wu ,  Kuo-Hui Su

IPC分类号： H01L21/44

CPC分类号： H01L21/28052 ,  H01L29/4933

摘要： A method for fabricating a semiconductor a semiconductor device having a stacked-gate structure. A polysilicon layer is formed overlying a substrate, which is insulated from the substrate by a dielectric layer. A metal-flash layer is formed overlying the polysilicon layer, and then a tungsten nitride layer is formed overlying the titanium layer. The tungsten nitride layer is annealed using nitrogen and hydrogen gases. A tungsten layer and a cap layer are successively formed overlying the tungsten nitride layer.

摘要翻译： 一种半导体制造方法，该半导体器件具有堆叠栅极结构。 通过介电层与衬底绝缘的衬底上形成多晶硅层。 在多晶硅层上形成金属闪光层，然后在钛层上形成氮化钨层。 使用氮气和氢气对氮化钨层进行退火。 依次形成覆盖氮化钨层的钨层和覆盖层。

公开(公告)号：US5563098A

公开(公告)日：1996-10-08

申请号：US419048

申请日：1995-04-10

申请人： So-Wen Kuo ,  Chih-Hao Chang

发明人： So-Wen Kuo ,  Chih-Hao Chang

IPC分类号： H01L21/768 ,  H01L21/283 ,  H01L21/302

CPC分类号： H01L21/76895 ,  H01L21/76802 ,  Y10S438/963

摘要： A method of forming buried contact holes is described. A layer of silicon oxide is provided overlying a semiconductor substrate. A layer of polysilicon is deposited overlying the silicon oxide layer. The polysilicon layer is covered with a layer of photoresist which is exposed and developed to provide a photoresist mask. The polysilicon layer is etched away where it is not covered by the photoresist mask wherein a polymer buildup is formed on the sidewalls of the polysilicon layer. Ions are implanted into the silicon oxide layer not covered by the photoresist mask. The photoresist mask is removed whereby the polymer buildup is also removed. Thereafter, the silicon oxide layer not covered by the polysilicon layer is etched away to complete the formation of the buried contact hole with reduced polymer buildup in the fabrication of an integrated circuit.

摘要翻译： 描述形成掩埋接触孔的方法。 在半导体衬底上提供一层氧化硅。 沉积覆盖氧化硅层的多晶硅层。 多晶硅层被一层光致抗蚀剂覆盖，该层被曝光和显影以提供光致抗蚀剂掩模。 多晶硅层被蚀刻掉，其不被光致抗蚀剂掩模覆盖，其中聚合物积聚形成在多晶硅层的侧壁上。 将离子注入到未被光致抗蚀剂掩模覆盖的氧化硅层中。 除去光致抗蚀剂掩模，从而除去聚合物积聚。 此后，在集成电路的制造中，蚀刻掉不被多晶硅层覆盖的氧化硅层，以形成埋入的接触孔，并减少聚合物积聚。