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公开(公告)号:US20130320334A1
公开(公告)日:2013-12-05
申请号:US13900894
申请日:2013-05-23
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Junichi KOEZUKA , Yukinori SHIMA , Hajime TOKUNAGA
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L29/24 , H01L29/42356 , H01L29/4908 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/78696
Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided by preventing a change in its electrical characteristics. A semiconductor device which includes a first oxide semiconductor layer which is in contact with a source electrode layer and a drain electrode layer and a second oxide semiconductor layer which serves as a main current path (channel) of a transistor is provided. The first oxide semiconductor layer serves as a buffer layer for preventing a constituent element of the source and drain electrode layers from diffusing into the channel. By providing the first oxide semiconductor layer, it is possible to prevent diffusion of the constituent element into an interface between the first oxide semiconductor layer and the second oxide semiconductor layer and into the second oxide semiconductor layer.
Abstract translation: 通过防止其电特性的改变来提供包括氧化物半导体的高度可靠的半导体器件。 提供一种半导体器件,其包括与源电极层和漏电极层接触的第一氧化物半导体层和用作晶体管的主电流路径(沟道)的第二氧化物半导体层。 第一氧化物半导体层用作用于防止源电极层和漏极电极层的构成元素扩散到沟道中的缓冲层。 通过设置第一氧化物半导体层,可以防止构成元素扩散到第一氧化物半导体层和第二氧化物半导体层之间的界面中并进入第二氧化物半导体层。
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公开(公告)号:US20130137226A1
公开(公告)日:2013-05-30
申请号:US13681895
申请日:2012-11-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Naoto YAMADE , Junichi KOEZUKA , Shunpei YAMAZAKI
IPC: H01L29/66
CPC classification number: H01L29/66477 , H01L29/66969 , H01L29/7869
Abstract: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor is provided. In a manufacturing process of a semiconductor device that includes a bottom-gate transistor including an oxide semiconductor, an insulating film which is in contact with an oxide semiconductor film is subjected to dehydration or dehydrogenation treatment by heat treatment and oxygen doping treatment in this order. The insulating film which is in contact with the oxide semiconductor film refers to a gate insulating film provided under the oxide semiconductor film and an insulating film which is provided over the oxide semiconductor film and functions as a protective insulating film. The gate insulating film and/or the insulating film are/is subjected to dehydration or dehydrogenation treatment by heat treatment and oxygen doping treatment in this order.
Abstract translation: 提供了包括具有氧化物半导体的晶体管的高度可靠的半导体器件。 在包括具有氧化物半导体的底栅晶体管的半导体器件的制造工艺中,通过热处理和氧掺杂处理依次进行与氧化物半导体膜接触的绝缘膜的脱水或脱氢处理。 与氧化物半导体膜接触的绝缘膜是指设置在氧化物半导体膜下方的栅极绝缘膜和设置在氧化物半导体膜上并用作保护绝缘膜的绝缘膜。 通过依次进行热处理和氧掺杂处理对栅极绝缘膜和/或绝缘膜进行脱水或脱氢处理。
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公开(公告)号:US20240222510A1
公开(公告)日:2024-07-04
申请号:US18600901
申请日:2024-03-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Junichi KOEZUKA , Toshinari SASAKI , Katsuaki TOCHIBAYASHI , Shunpei YAMAZAKI
IPC: H01L29/786 , G02F1/133 , G02F1/1333 , G02F1/1339 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G06F3/041 , H01L27/12 , H01L27/146 , H01L27/15 , H01L29/66 , H10K59/121 , H10K59/124
CPC classification number: H01L29/78606 , H01L27/1225 , H01L27/1248 , H01L27/14616 , H01L29/66742 , H01L29/7869 , G02F1/13306 , G02F1/133345 , G02F1/1339 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/1368 , G02F2201/121 , G06F3/0412 , H01L27/14612 , H01L27/15 , H10K59/1213 , H10K59/124
Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
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公开(公告)号:US20240154041A1
公开(公告)日:2024-05-09
申请号:US18542870
申请日:2023-12-18
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Junichi KOEZUKA , Kenichi OKAZAKI , Masami JINTYOU
IPC: H01L29/786 , H01L21/02 , H01L21/425 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/66
CPC classification number: H01L29/7869 , H01L21/02323 , H01L21/02337 , H01L21/0234 , H01L21/02554 , H01L21/02565 , H01L21/0262 , H01L21/02631 , H01L21/425 , H01L27/1225 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/78696 , H01L21/473
Abstract: A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.
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公开(公告)号:US20240105734A1
公开(公告)日:2024-03-28
申请号:US18531767
申请日:2023-12-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Junichi KOEZUKA , Yasutaka NAKAZAWA , Yukinori SHIMA , Masami JINTYOU , Masayuki SAKAKURA , Motoki NAKASHIMA
IPC: H01L27/12
CPC classification number: H01L27/1225
Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.
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公开(公告)号:US20240088303A1
公开(公告)日:2024-03-14
申请号:US18513803
申请日:2023-11-20
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yasutaka NAKAZAWA , Junichi KOEZUKA , Takashi HAMOCHI
IPC: H01L29/786 , H01L21/768 , H01L27/12 , H01L27/146 , H01L27/15 , H01L29/417 , H01L29/45 , H01L29/66 , H10B12/00
CPC classification number: H01L29/7869 , H01L21/76843 , H01L21/76856 , H01L27/1207 , H01L27/1225 , H01L27/146 , H01L27/15 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L29/78618 , H01L29/78648 , H01L29/78696 , H10B12/312 , H01L27/088
Abstract: A semiconductor device including an oxide semiconductor film that includes a transistor with excellent electrical characteristics is provided. It is a semiconductor device including a transistor. The transistor includes a gate electrode, a first insulating film, an oxide semiconductor film, a source electrode, a drain electrode, and a second insulating film. The source electrode and the drain electrode each include a first conductive film, a second conductive film over and in contact with the first conductive film, and a third conductive film over and in contact with the second conductive film. The second conductive film contains copper, the first conductive film and the third conductive film include a material that inhibits diffusion of copper, and an end portion of the second conductive film includes a region containing copper and silicon.
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公开(公告)号:US20240014137A1
公开(公告)日:2024-01-11
申请号:US18370916
申请日:2023-09-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Junichi KOEZUKA , Toshimitsu OBONAI , Masami JINTYOU , Daisuke KUROSAKI
IPC: H01L29/66 , H01L29/786
CPC classification number: H01L29/66969 , H01L29/7869
Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.
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公开(公告)号:US20220328692A1
公开(公告)日:2022-10-13
申请号:US17835184
申请日:2022-06-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Junichi KOEZUKA , Yukinori SHIMA , Suzunosuke HIRAISHI , Kenichi OKAZAKI
IPC: H01L29/786 , H01L29/423 , H01L27/12 , H01L29/66
Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
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公开(公告)号:US20220310517A1
公开(公告)日:2022-09-29
申请号:US17729306
申请日:2022-04-26
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Junichi KOEZUKA , Toshimitsu OBONAI , Masami JINTYOU , Daisuke KUROSAKI
IPC: H01L23/532 , H01L21/02 , H01L21/263 , H01L21/265
Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.
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公开(公告)号:US20220246731A1
公开(公告)日:2022-08-04
申请号:US17725643
申请日:2022-04-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Yasuharu HOSAKA , Yukinori SHIMA , Junichi KOEZUKA , Kenichi OKAZAKI
IPC: H01L29/24 , H01L29/423 , H01L29/786 , H01L29/49 , H01L29/06 , H01L29/10
Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
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