公开(公告)号：US5495121A

公开(公告)日：1996-02-27

申请号：US953943

申请日：1992-09-30

申请人： Shunpei Yamazaki ,  Akira Mase ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Akira Mase ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： G02F1/1362 ,  H01L21/336 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L27/02

CPC分类号： H01L29/66757 ,  H01L27/12 ,  H01L29/4908 ,  H01L29/78666 ,  H01L29/78675 ,  G02F1/13454 ,  G02F2001/136245

摘要： A semiconductor device or a semiconductor integrated circuit includes a field effect transistor having a source region, a drain region and a channel regions formed within a semiconductor substrate. A lower wiring is formed on the semiconductor substrate to form a gate electrode and its extension and oxidized to form an oxide film covering the lower wiring. An upper wiring is formed over the lower wiring on the semiconductor substrate to make contact with the drain or source region. The lower wiring is electrically insulated from the upper wiring by the oxide film.

摘要翻译： 半导体器件或半导体集成电路包括具有源极区，漏极区和形成在半导体衬底内的沟道区的场效应晶体管。 在半导体基板上形成下布线以形成栅电极，并且其延伸部被氧化以形成覆盖下布线的氧化膜。 在半导体衬底上的下布线之上形成上布线以与漏区或源区接触。 下布线通过氧化膜与上布线电绝缘。

公开(公告)号：US5485019A

公开(公告)日：1996-01-16

申请号：US014455

申请日：1993-02-03

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi

IPC分类号： G02F1/1362 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L33/00 ,  H01L29/78

CPC分类号： H01L29/66757 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/78618 ,  G02F2001/136245 ,  G09G2300/0823 ,  Y10S148/161 ,  Y10S148/163

摘要： A wiring formed on a substrate is oxidized and the oxide is used as a mask for forming source and drain impurity regions of a transistor, or as a material for insulating wirings from each other, or as a dielectric of a capacitor. Thickness of the oxide is determined depending on purpose of the oxide. In a transistor adapted to be used in an active-matrix liquid-crystal display, the channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.

摘要翻译： 形成在基板上的布线被氧化，并且氧化物用作用于形成晶体管的源极和漏极杂质区域或用作彼此绝缘布线的材料的掩模，或者用作电容器的电介质。 氧化物的厚度根据氧化物的目的而确定。 在适于用于有源矩阵液晶显示器的晶体管中，沟道长度或源极区域和漏极区域之间的距离大于沿着栅极电极的纵向取向的栅电极的长度 渠道。 偏移区域形成在源极和漏极区域的侧面上的沟道区域中。 没有或非常弱的电场被施加到来自栅电极的这些偏移区域。

公开(公告)号：US5424752A

公开(公告)日：1995-06-13

申请号：US161094

申请日：1993-12-03

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G3/3659 ,  G09G3/3677 ,  G09G2300/0823 ,  G09G2310/027 ,  G09G2330/04 ,  G09G3/2014 ,  G09G3/3651

摘要： A method of fine intermediate gradation display by an electro-optical device, with little difference in devices is disclosed. In case of driving each picture element of an active matrix electro-optical device, a visual intermediate gradation display can be carried out by using a modified transfer gate complementary field effect device, in a structure where one of input/output terminal thereof is connected with a picture element electrode, by applying a bipolar pulse to its control electrode in a cycle and by applying voltage to the other input/output terminal, or by cutting voltage at the same time, and whereby digitally controlling duration of voltage applied to the picture element.

摘要翻译： 公开了一种通过电光装置进行细中间灰度显示的方法，其装置几乎没有差异。 在驱动有源矩阵电光装置的每个像素的情况下，可以通过使用修改的传输门互补场效应装置来执行视觉中间灰度显示，其结构中，其一个输入/输出端连接 像素电极，通过在周期中向其控制电极施加双极性脉冲，并且通过向另一个输入/输出端施加电压，或者通过同时切断电压，并且由此数字控制施加到像素的电压的持续时间 。

公开(公告)号：US5194934A

公开(公告)日：1993-03-16

申请号：US855481

申请日：1992-03-23

申请人： Shunpei Yamazaki ,  Takeshi Oka ,  Akira Mase

发明人： Shunpei Yamazaki ,  Takeshi Oka ,  Akira Mase

IPC分类号： H01L21/56

CPC分类号： H01L21/563 ,  H01L2224/73203 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079

摘要： A semiconductor device is comprised of glass substrate, an epoxy-phenol resin for buffer means formed on the glass substrate, a set of electrical wiring provided on the epoxy-phenol resin and a semiconductor chip provided with a bump of gold and bonded to the electric wiring with therebetween chip provided with the bump therebetween using a photo-cured type of an epoxy resin.

摘要翻译： 半导体器件由玻璃基板，用于形成在玻璃基板上的缓冲装置的环氧酚醛树脂，设置在环氧酚醛树脂上的一组电线和设置有金凸块的半导体芯片组成， 使用光固化型环氧树脂与它们之间的芯片布线，在其间设置有凸块。

公开(公告)号：US4786358A

公开(公告)日：1988-11-22

申请号：US082545

申请日：1987-08-07

申请人： Shunpei Yamazaki ,  Akira Mase ,  Hiroyuki Sakayori

发明人： Shunpei Yamazaki ,  Akira Mase ,  Hiroyuki Sakayori

IPC分类号： B23K26/06 ,  G02F1/1343 ,  G03F7/20 ,  H01L21/48 ,  H05K3/02 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06 ,  C23F1/02

CPC分类号： H01L21/4846 ,  B23K26/066 ,  G02F1/13439 ,  G03F7/2006 ,  H05K3/027 ,  Y10S430/146

摘要： An improved method for forming a pattern on a substrate coated with a film is shown. The substrate is irradiated with a laser beam which is shaped through a mask, and a portion of the film is removed by the energy of the laser beam to produce the desired pattern. The laser beam is emitted from an exmer laser.

摘要翻译： 示出了在涂覆有薄膜的基材上形成图案的改进方法。 用通过掩模成形的激光束照射基板，并且通过激光束的能量去除膜的一部分以产生期望的图案。 激光束从激光器发射。

公开(公告)号：US08106867B2

公开(公告)日：2012-01-31

申请号：US12208836

申请日：2008-09-11

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

IPC分类号： G09G3/36

CPC分类号： G02F1/13624 ,  G02F2001/134345 ,  G02F2001/136245 ,  G09G3/2011 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2300/0823 ,  G09G2330/08

摘要： A grey tone display and a driving method are described. The display comprises a light influencing layer, an electrode pad located adjacent to the layer at one side of the layer in order to define a pixel in the layer, an n-channel field effect transistors connected to the electrode pad at its source terminal, a p-channel field effect transistors connected to the electrode pad at its source terminal, a first control line connected to the drain terminal of the n-channel field effect transistor, a second control line connected to the drain terminal of the p-channel field effect transistor, a third control line connected to the gate terminals of the n-channel field effect transistor and the p-channel field effect transistor, and a control circuit for supplying control signals to the first, second and third control lines. By this configuration, the voltage of the electrode pad can be arbitrarily controlled by adjusting the input level at the gate terminals.

摘要翻译： 描述灰色调显示和驱动方法。 所述显示器包括光影响层，位于所述层的一侧附近的层的电极焊盘，以便限定所述层中的像素，在其源极端子处连接到所述电极焊盘的n沟道场效应晶体管， 在源极端子连接到电极焊盘的p沟道场效应晶体管，连接到n沟道场效应晶体管的漏极端子的第一控制线，连接到p沟道场效应的漏极端子的第二控制线 晶体管，连接到n沟道场效应晶体管和p沟道场效应晶体管的栅极端子的第三控制线，以及用于向第一，第二和第三控制线提供控制信号的控制电路。 通过这种配置，可以通过调节栅极端子处的输入电平来任意地控制电极焊盘的电压。

公开(公告)号：US08026886B2

公开(公告)日：2011-09-27

申请号：US12206250

申请日：2008-09-08

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

IPC分类号： G09G3/36

CPC分类号： H01L27/124 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/136245 ,  G09G3/2011 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2300/0823 ,  G09G2330/08 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78603

摘要： A grey tone display and a driving method are described. The display comprises a light influencing layer, an electrode pad located adjacent to the layer at one side of the layer in order to define a pixel in the layer, an n-channel field effect transistors connected to the electrode pad at its source terminal, a p-channel field effect transistors connected to the electrode pad at its source terminal, a first control line connected to the drain terminal of the n-channel field effect transistor, a second control line connected to the drain terminal of the p-channel field effect transistor, a third control line connected to the gate terminals of the n-channel field effect transistor and the p-channel field effect transistor, and a control circuit for supplying control signals to the first, second and third control lines. By this configuration, the voltage of the electrode pad can be arbitrarily controlled by adjusting the input level at the gate terminals.

摘要翻译： 描述灰色调显示和驱动方法。 所述显示器包括光影响层，位于所述层的一侧附近的层的电极焊盘，以便限定所述层中的像素，在其源极端子处连接到所述电极焊盘的n沟道场效应晶体管， 在源极端子连接到电极焊盘的p沟道场效应晶体管，连接到n沟道场效应晶体管的漏极端子的第一控制线，连接到p沟道场效应的漏极端子的第二控制线 晶体管，连接到n沟道场效应晶体管和p沟道场效应晶体管的栅极端子的第三控制线，以及用于向第一，第二和第三控制线提供控制信号的控制电路。 通过这种配置，可以通过调节栅极端子处的输入电平来任意地控制电极焊盘的电压。

公开(公告)号：US07928946B2

公开(公告)日：2011-04-19

申请号：US10941009

申请日：2004-09-15

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura

IPC分类号： G02F1/1333 ,  G02F1/136 ,  G09G3/36

CPC分类号： G02F1/136227 ,  G09G3/2018 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3685 ,  G09G3/3688 ,  G09G5/395 ,  G09G2300/0823 ,  G09G2310/027 ,  G09G2330/04

摘要： The method of fine gradation display by an electro-optical device with little influence by difference in elemental devices, is disclosed, which is an object of the present invention. In case of an active matrix electro-optical device, a visual gradation display can be carried out by digitizing an analog image signal externally supplied by means of binary notation, by temporarily storing the digital signal thus obtained, by outputting the digital signal to a circuit of next step in a proper order, and by controlling the output timing of the signal so as to output the signal to the active matrix electro-optical device, and whereby digitally controlling the time for applying voltage to a picture element.

摘要翻译： 本发明的一个目的是公开了一种电子装置的微细灰度显示方法，该装置几乎不受元件的差异影响。 在有源矩阵电光装置的情况下，通过将由此获得的数字信号临时存储，通过将数字信号输出到电路，可以通过数字化由二进制符号外部提供的模拟图像信号来执行视觉灰度显示 并且通过控制信号的输出定时，将信号输出到有源矩阵电光装置，并且数字地控制向像素施加电压的时间。

公开(公告)号：US07916232B2

公开(公告)日：2011-03-29

申请号：US12415215

申请日：2009-03-31

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki

IPC分类号： G02F1/136

CPC分类号： G09G3/2011 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/136245 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0823 ,  G09G2310/027 ,  G09G2310/066 ,  Y10S148/141

摘要： A novel structure of an active electro-optical device is disclosed. The device is provided with complementary thin film insulated gate field affect transistors (TFTs) therein which comprise a P-TFT and an N-TFT. P-TFT and N-TFT are connected to a common signal line by the gate electrodes thereof, while the source (or drain) electrodes thereof are connected to a common signal line as well as to one of the picture element electrodes. In case of driving the active electro-optical device, a gradation display can be carried out in a driving method having a display timing determined in relation to a time F for writing one screen and a time (t) for writing in one picture element, by applying a reference signal in a cycle of the time (t), to the signal line used for a certain picture element driving selection, and by applying the select signal to the other signal line at a certain timing within the time (t), and whereby setting the value of the voltage to be applied to a liquid crystal.

摘要翻译： 公开了一种有源电光装置的新颖结构。 该器件具有补偿薄膜绝缘栅极场效应晶体管（TFT），其中包括P-TFT和N-TFT。 P-TFT和N-TFT通过其栅电极连接到公共信号线，而其源极（或漏极）电极连接到公共信号线以及一个像素电极。 在驱动有源电光装置的情况下，可以以具有用于写入一个画面的时间F和用于写入一个画面的时间（t））确定的显示定时的驱动方法来进行灰度显示， 通过将时间（t）的周期中的参考信号施加到用于某一像素驱动选择的信号线，并且通过在时间（t）内的某个定时向另一个信号线施加选择信号， 由此设定要施加到液晶的电压的值。

公开(公告)号：US07642584B2

公开(公告)日：2010-01-05

申请号：US11206293

申请日：2005-08-18

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Akira Mase ,  Hideki Uochi

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L29/66757 ,  H01L27/1255

摘要： A thin-film semiconductor device or integrated circuit comprising an insulating substrate, TFTs (thin-film transistors) formed on the substrate, and multilayer conductive interconnections. The circuit has a first metallization layer becoming gate electrodes and gate interconnections. The surface of the first metallization layer is oxidized by anodic oxidation to form an insulating coating on the surface of the first metallization layer. A second metallization layer becoming source and drain electrodes or conductive interconnections is then formed on the insulating coating directly or via an interlayer insulator. An improvement in the production yield and improved reliability are accomplished.

摘要翻译： 包括绝缘基板，形成在基板上的TFT（薄膜晶体管）和多层导电互连的薄膜半导体器件或集成电路。 该电路具有成为栅电极和栅极互连的第一金属化层。 通过阳极氧化将第一金属化层的表面氧化，以在第一金属化层的表面上形成绝缘涂层。 然后在绝缘涂层上直接或经由层间绝缘体形成成为源极和漏电极或导电互连的第二金属化层。 实现了产量的提高和可靠性的提高。