公开(公告)号：US20120211796A1

公开(公告)日：2012-08-23

申请号：US13465398

申请日：2012-05-07

申请人： Koji Ono ,  Hideomi Suzawa

发明人： Koji Ono ,  Hideomi Suzawa

IPC分类号： H01L33/00 ,  H01L29/78

CPC分类号： H01L27/1214 ,  C23F4/00 ,  H01B1/02 ,  H01B5/14 ,  H01B13/0006 ,  H01B13/0036 ,  H01L21/32136 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/124 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/4908 ,  H01L29/495 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle α in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.

摘要翻译： 提供适合于大尺寸基板的金属布线。 本发明的特征在于，在绝缘表面上形成至少一层导电膜，在导电膜上形成抗蚀剂图案，并且蚀刻具有抗蚀剂图案的导电膜以形成金属布线，同时控制其锥度 根据偏置功率密度，ICP功率密度，下部电极的温度，压力，蚀刻气体的总流量，或蚀刻气体中的氧气或氯气的比例来确定角度α。 这样形成的金属布线的宽度或长度波动较小，并且可以令人满意地处理基板尺寸的增加。

公开(公告)号：US20120196864A1

公开(公告)日：2012-08-02

申请号：US13388795

申请日：2010-08-04

申请人： Atsushi Hasuoka ,  Koji Ono ,  Masanori Kawasaki

发明人： Atsushi Hasuoka ,  Koji Ono ,  Masanori Kawasaki

IPC分类号： A61K31/5377 ,  C07D233/96 ,  C07D417/12 ,  C07D405/06 ,  A61P35/00 ,  A61K31/426 ,  A61K31/4166 ,  A61K31/4439 ,  A61K31/497 ,  A61K31/454 ,  C07D277/54 ,  C07D401/06

CPC分类号： C07D233/96 ,  A61K31/4166 ,  A61K31/426 ,  A61K31/427 ,  C07D277/20 ,  C07D277/54 ,  C07D401/06 ,  C07D401/12 ,  C07D403/06 ,  C07D403/12 ,  C07D405/06 ,  C07D417/12

摘要： A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof has a superior activity as an estrogen-related receptor-α modulator, and is useful as a prophylactic or therapeutic agent for cancer.

摘要翻译： 由式（I）表示的化合物：其中各符号如说明书所述，或其盐作为雌激素相关受体-α调节剂具有优异的活性，可用作癌症的预防或治疗剂。

公开(公告)号：US20120043580A1

公开(公告)日：2012-02-23

申请号：US13286280

申请日：2011-11-01

申请人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Yoshihiro Kusuyama ,  Koji Ono ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Yoshihiro Kusuyama ,  Koji Ono ,  Jun Koyama

IPC分类号： H01L33/62 ,  H01L21/336 ,  H01L29/772

CPC分类号： H01L21/4846 ,  G02F1/13454 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L21/02367 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78627

摘要： There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 μm or more.

摘要翻译： 提供了即使在将显示区域的尺寸增加到大尺寸屏幕的情况下也实现低功耗的半导体器件的结构及其制造方法。 像素部分中的栅电极形成为主要包含W的材料膜，主要包含Al的材料膜和主要包含Ti的材料膜以降低布线电阻的三层结构。 使用IPC蚀刻装置蚀刻布线。 栅电极为锥形，成为锥形的区域的宽度为1μm以上。

公开(公告)号：US20110254008A1

公开(公告)日：2011-10-20

申请号：US13169224

申请日：2011-06-27

申请人： Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

发明人： Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

IPC分类号： H01L33/16

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  H01L21/32136 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78645 ,  H01L2029/7863

摘要： By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

摘要翻译： 通过根据电路所要求的功能，在半导体器件的各种电路中设置适当的TFT结构，可以提高半导体器件的工作性能和可靠性，降低功耗并降低制造成本 并通过减少处理步骤的数量来提高产量。 TFT的LDD区域形成为具有用于控制导电性的杂质元素的浓度梯度，该杂质元素随着与漏极区的距离减小而变高。 为了形成具有杂质元素的浓度梯度的这样的LDD区域，本发明使用了具有锥形部的栅电极的方法，从而掺杂电离杂质元素，以控制在电场中加速的电导率，从而 其穿过栅电极和栅绝缘膜进入半导体层。

公开(公告)号：US07968890B2

公开(公告)日：2011-06-28

申请号：US12009754

申请日：2008-01-22

申请人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

发明人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

IPC分类号： H01L29/04

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  H01L21/32136 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78645 ,  H01L2029/7863

摘要： By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

摘要翻译： 通过根据电路所要求的功能，在半导体器件的各种电路中设置适当的TFT结构，可以提高半导体器件的工作性能和可靠性，降低功耗并降低制造成本 并通过减少处理步骤的数量来提高产量。 TFT的LDD区域形成为具有用于控制导电性的杂质元素的浓度梯度，该杂质元素随着与漏极区的距离减小而变高。 为了形成具有杂质元素的浓度梯度的这样的LDD区域，本发明使用了具有锥形部的栅电极的方法，从而掺杂电离杂质元素，以控制在电场中加速的电导率，从而 其穿过栅电极和栅绝缘膜进入半导体层。

公开(公告)号：US20110058077A1

公开(公告)日：2011-03-10

申请号：US12846414

申请日：2010-07-29

申请人： Koji Ono

发明人： Koji Ono

IPC分类号： H04N5/335 ,  H01L31/02

CPC分类号： H01L27/14618 ,  H01L27/14625 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

摘要： The solid-state imaging apparatus illustrates a solid-state imaging element having a light receiving portion; a package which contains the solid-state imaging element; a light-transmissive member which is provided above the solid-state imaging element; and a partitioning member which is fixed to the package to isolate the light receiving portion of the solid-state imaging element from the surrounding portion of the light receiving portion of the solid-state imaging element.

摘要翻译： 固态成像装置示出了具有光接收部分的固态成像元件; 包含固态成像元件的封装; 设置在固体摄像元件上方的透光性部件; 以及分隔构件，其固定到所述封装以将所述固态成像元件的所述光接收部分与所述固态成像元件的光接收部分的周围部分隔离。

公开(公告)号：US20100327428A1

公开(公告)日：2010-12-30

申请号：US12793751

申请日：2010-06-04

申请人： Koji Ono

发明人： Koji Ono

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L23/49541 ,  H01L23/055 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/48091 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method for manufacturing a package comprises a first step of forming a metal pattern including a frame and a plurality of leads extending inward from the frame, a second step of molding a resin pattern including a first resin portion which holds the plurality of leads from an inner side thereof, and second resin portions which cover bottom surfaces of peripheral portions, adjacent to portions to be removed, in the plurality of leads while exposing bottom surfaces of the portions to be removed in the plurality of leads, so as to hold the plurality of leads from a lower side thereof, and a third step of cutting the plurality of leads into a plurality of first leads and a plurality of second leads by removing the portions to be removed in the plurality of leads while the resin pattern keeps holding the peripheral portions in the plurality of leads.

摘要翻译： 一种制造包装的方法包括：形成包括框架和从框架向内延伸的多个引线的金属图案的第一步骤;模制包括将多个引线保持在第一树脂部分的树脂图案的第二步骤; 以及第二树脂部分，其在多个引线中同时在多个引线中覆盖与要去除的部分相邻的周边部分的底表面，同时暴露在多个引线中要移除的部分的底表面，以便保持多个引线 的第三步骤，以及第三步骤，通过在多个引线中去除要除去的部分而将多根引线切割成​​多个第一引线和多个第二引线，同时树脂图案保持外围 多个引线中的部分。

公开(公告)号：US20100233044A1

公开(公告)日：2010-09-16

申请号：US12679426

申请日：2008-09-16

申请人： Masahiro Miya ,  Koji Ono ,  Junya Mochida

发明人： Masahiro Miya ,  Koji Ono ,  Junya Mochida

IPC分类号： B01D53/18

CPC分类号： B01D53/60 ,  B01D53/08 ,  B01D53/83 ,  B01D2257/302 ,  B01D2257/404

摘要： Adsorbent dust can be recovered while spraying is prevented. An apparatus is provided with a desulfurization-denitration tower body and an adsorbent discharging device. An entrance louver and an exit louver are provided for forming a packed moving bed of an adsorbent that moves downward inside the tower body, the apparatus has a throttle portion provided with a side panel that is inclined so that a spacing gradually decreases toward a discharging device, the throttle portion being provided between the tower body and the discharging device, and first partitions are provided inside the throttle portion. A second partition extending along the incline direction of the side panel is provided at a predetermined distance from the bottom end of the exit louver above the side panel, and a gap is provided between the bottom end part of the exit louver and the side panel of the throttle portion.

摘要翻译： 吸附剂粉尘可以回收，同时防止喷涂。 设备具有脱硫脱硝塔体和吸附剂排出装置。 提供入口百叶窗和出口百叶窗，用于形成在塔体内向下移动的吸附剂的填充移动床，该装置具有设置有侧板的节流部，该侧板倾斜使得朝向排出装置逐渐减小的间隔 所述节流部设置在所述塔体与所述排出装置之间，所述第一隔壁设置在所述节流部内。 沿着侧板的倾斜方向延伸的第二分隔件设置在距离侧板的上方的出口百叶窗的底端预定的距离处，并且在出口百叶窗的底端部分与侧板之间设置间隙 节流部分。

公开(公告)号：US20090101901A1

公开(公告)日：2009-04-23

申请号：US12009754

申请日：2008-01-22

申请人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

发明人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

IPC分类号： H01L29/04

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  H01L21/32136 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78645 ,  H01L2029/7863

摘要： By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

摘要翻译： 通过根据电路所要求的功能，在半导体器件的各种电路中设置适当的TFT结构，可以提高半导体器件的工作性能和可靠性，降低功耗并降低制造成本 并通过减少处理步骤的数量来提高产量。 TFT的LDD区域形成为具有用于控制导电性的杂质元素的浓度梯度，该杂质元素随着与漏极区的距离减小而变高。 为了形成具有杂质元素的浓度梯度的这样的LDD区域，本发明使用了具有锥形部的栅电极的方法，从而掺杂电离杂质元素，以控制在电场中加速的电导率，从而 其穿过栅电极和栅绝缘膜进入半导体层。

公开(公告)号：US07486344B2

公开(公告)日：2009-02-03

申请号：US11679936

申请日：2007-02-28

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hideomi Suzawa ,  Koji Ono ,  Tatsuya Arao

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hideomi Suzawa ,  Koji Ono ,  Tatsuya Arao

IPC分类号： G02F1/136

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/127

摘要： A highly reliable semiconductor display device is provided. The semiconductor display device has a channel forming region, an LDD region, and a source region and a drain region in a semiconductor layer, and the LDD region overlaps with a first gate electrode, sandwiching a gate insulating film.

摘要翻译： 提供了高度可靠的半导体显示装置。 半导体显示装置在半导体层中具有沟道形成区域，LDD区域，源极区域和漏极区域，并且LDD区域与第一栅极电极重叠，夹着栅极绝缘膜。