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公开(公告)号：US10193561B2
公开(公告)日：2019-01-29
申请号：US15384861
申请日：2016-12-20
Inventor： John Paul Lesso
Abstract: This application relates to methods and apparatus for phase locked loops. A phase-and-frequency detector (101) receives a reference clock signal (CKref) and a feedback signal (SFB) and outputs a first adjustment signal (U) that is modulated between respective first and second signal levels to provide control pulses indicating that an increase in frequency required for phase and frequency lock, and a second adjustment signal (D) that is modulated between respective first and second signal levels to provide control pulses indicating that a decrease in frequency required for phase and frequency lock. First and second time-to-digital converters (201-1 and 201-2) receive the first and second adjustment signals respectively and output respective first and second digital signals indicative of the duration of said control pulses. Each time-to-digital converter comprises a controlled-oscillator (401, 801) configured so as to operate at a first frequency when the respective adjustment signal is at the first signal level and operate at a second frequency when the respective adjustment signal is at the second signal level and a counter (403) configured to produce a count value of the number oscillations of the controlled-oscillator in each of a succession of count periods defined by a count clock signal. The first and second digital signals are based on the count values output from the respective counters. The difference between the first and second digital signals may be determined and input to digital loop filter (203) before driving numerically-controlled-oscillator (204) to produce the output signal.
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公开(公告)号：US10181845B1
公开(公告)日：2019-01-15
申请号：US15927691
申请日：2018-03-21
Inventor： Tejasvi Das , Alan Mark Morton , Xin Zhao , Lei Zhu , Xiaofan Fei , Johann G. Gaboriau , John L. Melanson , Amar Vellanki
Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.
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公开(公告)号：US10171101B1
公开(公告)日：2019-01-01
申请号：US15882347
申请日：2018-01-29
Inventor： Sri Ram Gupta
Abstract: This application relates to modulators for providing time-encoded signals and in particular PWM signals. A modulator (200) has a first controlled oscillator (201P) configured to receive a first oscillator driving signal and output a first oscillation signal (S1). An accumulator (204) is configured to provide an accumulator value (VAL) based on a number of pulses of the first oscillation signal and a hysteretic comparator (205) alternates between first and second output states based on a hysteretic comparison of the accumulator value with a defined reference (REF). The first oscillator driving signal is based on a combination of an input signal and a feedback signal derived from an output of the hysteretic comparator. A second controlled oscillator (201N) may be configured to receive a second oscillator driving signal and output a second oscillation signal (S2) and the accumulator may provide the accumulator value based on a difference in the number of pulses of the first oscillation signal and the second oscillation signal.
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公开(公告)号：US10149050B2
公开(公告)日：2018-12-04
申请号：US15315845
申请日：2015-06-04
Inventor： John Paul Lesso
Abstract: This application relates to methods and apparatus for determining the temperature of a voice coil of a loudspeaker (204), for instance as part of a system (208) for protecting the loudspeaker from overheating. The method comprises driving the voice coil with signal components at first and second frequencies, wherein the first frequency (fH) is higher than the second frequency (fL), and determining first and second indications of current (ICM) and voltage (VCM) of the voice coil at said first and second frequencies respectively. The method involves determining an estimated ratio value using the first and second indications of current and voltage, wherein said estimated ratio value corresponds to a ratio between a value based on the resistance of the voice coil and a value based on the inductance of the voice coil. The temperature of the voice coil is then determined based on said estimated ratio value and at least one reference value. An impedance extraction module (210) may extract values for the impedance at the first and second frequencies respectively (ZH, ZL). In some embodiments a module (212) may determine estimated values of the resistance (REM) and inductance (LEM) of the voice coil which are used by temperature estimation block (214) to determine the temperature.
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公开(公告)号：US10147413B2
公开(公告)日：2018-12-04
申请号：US15482258
申请日：2017-04-07
Inventor： Anthony J. Magrath , Richard Clemow
IPC: G10K11/178 , H04R3/00
Abstract: A noise cancellation system, comprising: an input for a digital signal, the digital signal having a first sample rate; a digital filter, connected to the input to receive the digital signal; a decimator, connected to the input to receive the digital signal and to generate a decimated signal at a second sample rate lower than the first sample rate; and a processor. The processor comprises: an emulation of the digital filter, connected to receive the decimated signal and to generate an emulated filter output; and a control circuit, for generating a control signal on the basis of the emulated filter output. The control signal is applied to the digital filter to control a filter characteristic thereof.
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Patent Agency Ranking
公开(公告)号：US10142730B1
公开(公告)日：2018-11-27
申请号：US15714262
申请日：2017-09-25
Inventor： Nima Yousefian , Seth Suppappola
Abstract: Noise sources may be identified as either an interference source, such as a television, or a talker source by analyzing phase information of the microphone signals. A phase delay variance may be computed from pairs of microphone signals. A profile of an interference source may be learned over time by updating a stored profile when the phase delay variance is below a threshold. The stored profile may be used to identify interference sources received by the microphones by determining a correlation between the microphone signals and the stored profile. When an interference source is detected, control parameters may be generated to control a beamformer to reduce contribution of the interference source to an output audio signal. The output audio signal may be used for speech processing, such as in a smart home device.
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公开(公告)号：US10128828B2
公开(公告)日：2018-11-13
申请号：US15485062
申请日：2017-04-11
Inventor： Muraleedharan Ramakrishnan , Bhoodev Kumar , Vivek Oppula , Niju Alex Geevarughese
Abstract: A synchronous clock edge alignment system and method increases detection coverage of transition delay faults that occur in logic circuits that have data released by a clock at an input of logic circuits internal to an integrated circuit and/or released at the output of the logic circuits when testing an integrated circuit. To increase detection coverage of inter-clock transition delay faults, in at least one embodiment, the synchronous clock edge alignment system and method align same transition type edges of internal data releasing clock signals, and at least two of the clock signals have different frequencies. By aligning the edges of the clock signals, transition delay faults that might otherwise not have occurred can be detected by, for example, a conventional circuit testing apparatus. Thus, aligning the edges of the clock signals increases detection of inter-clock transition delay faults.
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88.发明授权公开(公告)号：US10127919B2
公开(公告)日：2018-11-13
申请号：US14938798
申请日：2015-11-11
Applicant: Cirrus Logic Inc.
Inventor： Jan S. Erkelens
IPC: H04R29/00 , G10L21/0232 , G10L25/12 , G10L25/21 , H04R3/00
Abstract: A method for estimating a noise power level difference (NPLD) between a primary microphone and a reference microphone of an audio device includes obtaining primary and reference channels of an audio signal with primary and reference microphones of an audio device and estimating a noise magnitude of the reference channel of the audio signal to provide a noise variance estimate for one or more frequencies. A modelled probability density function (PDF) of a fast Fourier transform (FFT) coefficient of the primary channel of the audio signal is maximized to provide a NPLD between the noise variance estimate of the reference channel and a noise variance estimate of the primary channel. A modelled PDF of an FFT coefficient of the reference channel of the audio signal is maximized to provide a complex speech power level difference (SPLD) coefficient between the speech FFT coefficients of the primary and reference channel. A corrected noise magnitude of the reference channel is then calculated based on the noise variance estimate, the NPLD and the SPLD coefficient.
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公开(公告)号：US10123143B2
公开(公告)日：2018-11-06
申请号：US15276437
申请日：2016-09-26
Inventor： Vamsikrishna Parupalli , Lingli Zhang , Jeremy Babcock , Marc L. Tarabbia
Abstract: Errors in measurements of a resistor to monitor current through a speaker may be corrected to improve the accuracy, performance, or quality of other signals affected by the measurement. Error may occur in the current measurement resulting from variations in measurements involving the resistor, such as errors based on the sense resistor's response to temperature or voltage differential. Correcting the measurement errors can prevent the overcurrent condition from occurring, and otherwise improve audio output from the speaker. Thus, a method for correcting measurements in a speaker monitoring circuit may include monitoring a current through a speaker by receiving a measurement that is correlated to the current output through the speaker; and correcting the measurement for one or more inaccuracies in the measurement.
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公开(公告)号：US10117028B2
公开(公告)日：2018-10-30
申请号：US15417507
申请日：2017-01-27
Inventor： David Talmage Patten , Tsjerk Hans Hoekstra
Abstract: A MEMS transducer (200) comprises a substrate (101) having a first surface (102) and a membrane (103) formed relative to an aperture in the substrate. The MEMS transducer (200) further comprises one or more bonding structures (107) coupled to the substrate, wherein the one or more bonding structures (107), during use, mechanically couple the MEMS transducer to an associated substrate (111). The MEMS transducer (200) comprises a sealing element (109) for providing a seal, during use, in relation to the substrate (101) and the associated substrate (111). A stress decoupling member (119) is coupled between the substrate (101) and the sealing element (109).
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