公开(公告)号：US20190131994A1

公开(公告)日：2019-05-02

申请号：US16168336

申请日：2018-10-23

Applicant: Korea University Research and Business Foundation, Sejong Campus

Inventor： Hayun Cecillia CHUNG

IPC: H03M1/12 ,  H03M1/16

CPC classification number: H03M1/124 ,  H03M1/1205 ,  H03M1/1235 ,  H03M1/164 ,  H03M1/46

Abstract: Disclosed is a high-speed and low-power pipelined analog-digital converter (ADC) using a dynamic reference voltage and a 2-stage S/H. The pipelined ADC includes a 2-stage sample-and-hold (S/H) configured to secure a conversion time corresponding to a clock cycle per stage and to apply only a buffer to an input signal path, a reference voltage generator configured to receive the output of the D flip-flop of a previous stage as an input signal and to generate a required reference voltage during a half cycle of a sample frequency, and a comparator configured to include a linear transconductor (LT), a rail-to-rail latch (R2R) and a D flip-flop and to generate the output of the ADC and input to the reference voltage generator of a next stage for generating a reference voltage using the output of the D flip-flop.

公开(公告)号：US20180323795A1

公开(公告)日：2018-11-08

申请号：US15773149

申请日：2016-10-27

Applicant: ams Sensors Belgium BVBA

Inventor： Adi XHAKONI ,  Tim BLANCHAERT

IPC: H03M1/18 ,  H04N5/357 ,  H04N5/365 ,  H04N5/378 ,  H03M1/56

CPC classification number: H03M1/182 ,  H03M1/1235 ,  H03M1/56 ,  H04N5/3575 ,  H04N5/365 ,  H04N5/378

Abstract: An analog-to-digital converter (110) for an imaging device comprises an analog signal input (123) for receiving an analog signal from a pixel array of the imaging device and N ramp signal inputs (121, 122) for receiving N ramp signals, where N is an integer≥2. The N ramp signals have different slopes. The ADC has a clock input (143) for receiving at least one clock signal. A comparison stage (120) is connected to the ramp signal inputs and to the analog signal input. The comparison stage (120) is configured to compare the ramp signals with the analog signal to provide comparison outputs during the conversion period. A control stage (130) is configured to control a counter stage (140) based on the comparison outputs and a selection input indicative of when at least one handover point has been reached during the conversion period.

公开(公告)号：US09917570B2

公开(公告)日：2018-03-13

申请号：US15271819

申请日：2016-09-21

Applicant: Avatekh, Inc.

Inventor： Alexei V. Nikitin

IPC: H03M1/84 ,  H03M1/88 ,  H03H17/02 ,  H03H7/01 ,  H03H11/12 ,  H03H21/00 ,  H03M1/12 ,  H03H11/24

CPC classification number: H03H17/0219 ,  H03H7/0153 ,  H03H11/1256 ,  H03H11/1291 ,  H03H11/24 ,  H03H17/0201 ,  H03H21/0001 ,  H03H21/0016 ,  H03H2210/043 ,  H03M1/1235

Abstract: The present invention relates to nonlinear signal processing, and, in particular, to adaptive nonlinear filtering of real-, complex-, and vector-valued signals utilizing analog Nonlinear Differential Limiters (NDLs), and to adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. More generally, this invention relates to methods, processes and apparatus for real-time measuring and analysis of variables, and to generic measurement systems and processes. This invention also relates to methods and corresponding apparatus for measuring which extend to different applications and provide results other than instantaneous values of variables. The invention further relates to post-processing analysis of measured variables and to statistical analysis. The NDL-based filtering method and apparatus enable improvements in the overall properties of electronic devices including, but not limited to, improvements in performance, reduction in size, weight, cost, and power consumption, and, in particular for wireless devices, NDLs enable improvements in spectrum usage efficiency.

公开(公告)号：US09083372B2

公开(公告)日：2015-07-14

申请号：US13767407

申请日：2013-02-14

Applicant: Rosemount Inc.

Inventor： Jason H. Rud ,  Andrew J. Bronczyk

IPC: H03M1/12 ,  H03M1/20 ,  H03M1/18

CPC classification number: H03M1/20 ,  H03M1/1235 ,  H03M1/181

Abstract: A process variable transmitter is used to measure a process variable, and, in doing so, dynamically changes the resolution of the A/D converter based upon the measured value of the analog input signal. This can be done by automatically adjusting the configurable resolution gain adjustment based on the value of the analog signal being measured, by normalizing the input signal being measured so that it is centered in an optimal resolution window of the A/D converter, or by adjusting a voltage reference provided to the A/D converter.

Abstract translation: 过程变量发送器用于测量过程变量，并且在这样做时，基于模拟输入信号的测量值来动态地改变A / D转换器的分辨率。 这可以通过基于所测量的模拟信号的值自动调整可配置的分辨率增益调整，通过对所测量的输入信号进行归一化，使其在A / D转换器的最佳分辨率窗口中居中，或者通过调整 提供给A / D转换器的电压参​​考。

公开(公告)号：US20140340252A1

公开(公告)日：2014-11-20

申请号：US13930922

申请日：2013-06-28

Applicant: Broadcom Corporation

Inventor： Ayaskant SHRIVASTAVA ,  Chun-Ying Chen

IPC: H03M1/12

CPC classification number: H03M1/12 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1235 ,  H03M1/164 ,  H03M1/186

Abstract: The present disclosure provides for an analog-to-digital converter (ADC) which selectively compresses an analog input signal to improve noise performance and dynamic input range. The ADC selectively scales an analog input signal when it is closer to an expected value of one or more signal metrics more than when it is further from the expected value of the one or more signal metrics. For example, during the conversion process, the ADC amplifies the analog input signal when it is closer to a mean value μ by a gain factor while selectively adjusting the gain factor when the analog input signal is further from its mean value μ to selectively compress the analog input signal. This selective compression improves input noise performance and dynamic input range of the ADC when compared to the conventional ADC.

Abstract translation: 本公开提供了一种模数转换器（ADC），其选择性地压缩模拟输入信号以改善噪声性能和动态输入范围。 当模拟输入信号比一个或多个信号度量的期望值进一步更接近于一个或多个信号度量的期望值时，ADC选择性地缩放模拟输入信号。 例如，在转换过程中，当模拟输入信号更接近于平均值μ时，ADC将放大增益因子，同时当模拟输入信号进一步从其平均值μ选择性地调节增益因子时，ADC选择性地压缩 模拟输入信号。 与常规ADC相比，该选择性压缩可提高ADC的输入噪声性能和动态输入范围。

公开(公告)号：US20130314265A1

公开(公告)日：2013-11-28

申请号：US13752691

申请日：2013-01-29

Applicant: FORZA SILICON CORPORATION

Inventor： Barmak Mansoorian ,  Steven Huang ,  Rami Tantawy

IPC: H03M1/12

CPC classification number: H03M1/1235 ,  H03M1/464

Abstract: A controlling console for moving elements such as trusses and winches. A console body has a display screen, and a processor which is programmed to produce an output screen on the display screen which accepts controls for controlling at least one movable device. The output screen includes a plurality of different logical blocks which are connected together. Values and conditions such as true, false, rising edge or error can be entered. The console arranges this into a flow arrangement.

Abstract translation: 用于移动元件如桁架和绞车的控制台。 控制台主体具有显示屏幕，以及处理器，其经编程以在显示屏幕上产生输出屏幕，该显示屏幕接受用于控制至少一个可移动设备的控制。 输出屏幕包括连接在一起的多个不同的逻辑块。 可以输入诸如真，假，上升沿或错误的值和条件。 控制台将其排列成流程。

公开(公告)号：US08587463B2

公开(公告)日：2013-11-19

申请号：US13210991

申请日：2011-08-16

Applicant: Fred Tzeng ,  Payam Heydari

Inventor： Fred Tzeng ,  Payam Heydari

IPC: H03M1/12

CPC classification number: H03M1/1235

Abstract: A method of adaptively and losslessly quantizing an analog signal to a digital signal in an analog-to-digital converter (ADC), is disclosed. According to one embodiment, the quantizing is based on one or more of an instantaneous amplitude of the analog signal, frequencies of the analog signal, and patterned contents of the analog signal, and the method comprises sampling the analog signal; quanitizing the analog signal by a quantizer core, wherein the quantizer core comprises a digital-to-analog converter (DAC), a comparator, and a voltage reference, wherein the quantization is one of efficient lossless and adaptive compression quantization, or a traditional quantization method; determining by an analog compression engine (ACE) whether the sampled analog signal is above or below a defined threshold, wherein the defined threshold includes one or more of an amplitude threshold, a frequency threshold, and a patterned adaptive threshold; adaptively manipulating the sampled signal mathematically through at least one of the DAC or voltage reference of the quantizer core; and outputting the digital signal.

Abstract translation: 公开了一种在模拟 - 数字转换器（ADC）中自适应地和无损地量化模拟信号到数字信号的方法。 根据一个实施例，量化基于模拟信号的瞬时幅度，模拟信号的频率和模拟信号的图案化内容中的一个或多个，并且该方法包括对模拟信号进行采样; 量化器核心对模拟信号进行量化，其中量化器核心包括数模转换器（DAC），比较器和参考电压，其中量化是有效无损和自适应压缩量化之一，或传统量化 方法; 由模拟压缩引擎（ACE）确定所采样的模拟信号是否高于或低于定义的阈值，其中定义的阈值包括幅度阈值，频率阈值和图案化自适应阈值中的一个或多个; 通过量化器核心的DAC或电压基准中的至少一个自适应地操纵采样信号; 并输出数字信号。

公开(公告)号：US20130194119A1

公开(公告)日：2013-08-01

申请号：US13746312

申请日：2013-01-22

Applicant: Yen-Chien Cheng ,  Yung-Chi Yang ,  Chien-Yi Wu

Inventor： Yen-Chien Cheng ,  Yung-Chi Yang ,  Chien-Yi Wu

IPC: H03M1/12

CPC classification number: H03M1/1235 ,  H03M1/181

Abstract: An analog-to-digital conversion device and a method thereof are provided. The analog-to-digital conversion device includes a first level adjustment unit, an analog-to-digital converter (ADC), and a linear range detection unit. The ADC converts a test signal or a first input signal to generate a test data stream or a first output data stream. In an adjustment mode, the linear range detection unit obtains a conversion curve of the ADC by using the test data stream and determines whether to adjust offset control information according to a linear range of the conversion curve. In an operation mode, the linear range detection unit continues outputting the offset control information. Additionally, before transmitting the first input signal, the first level adjustment unit adjusts a direct-current level of the first input signal according to the offset control information to allow the first input signal to be within the linear range of the conversion curve.

Abstract translation: 提供了一种模拟 - 数字转换装置及其方法。 模数转换装置包括第一电平调整单元，模数转换器（ADC）和线性范围检测单元。 ADC转换测试信号或第一输入信号以产生测试数据流或第一输出数据流。 在调整模式中，线性范围检测单元通过使用测试数据流来获得ADC的转换曲线，并根据转换曲线的线性范围来确定是否调整偏移控制信息。 在操作模式中，线性范围检测单元继续输出偏移控制信息。 此外，在发送第一输入信号之前，第一电平调整单元根据偏移控制信息来调整第一输入信号的直流电平，以允许第一输入信号在转换曲线的线性范围内。

公开(公告)号：US08305007B2

公开(公告)日：2012-11-06

申请号：US12504841

申请日：2009-07-17

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G05F1/00

CPC classification number: H03M1/1235 ,  H05B33/0827

Abstract: An analog-to-digital converter (ADC) implements non-uniform conversion accuracy so as to allow for high conversion accuracy for a select narrower input range while also accommodating a wider overall input range and requiring fewer conversion bits compared to conventional ADCs. The ADC includes an ADC core that receives an input signal and outputs a first digital value having a first number of bits, the first digital value based on the input signal and an accuracy configuration of the ADC core. The ADC also includes an encoder to generate a second digital value have a second number of bits, greater than the first number of bits, based on the first digital value and the accuracy configuration of the ADC core. The ADC further includes an accuracy controller to adjust the accuracy configuration of the ADC core based on a relationship between the first digital value and at least one threshold.

Abstract translation: 模数转换器（ADC）实现了非均匀的转换精度，以便在选择更窄的输入范围内实现高转换精度，同时还适应更宽的整体输入范围，与传统ADC相比需要较少的转换位。 ADC包括ADC内核，其接收输入信号并输出​​具有第一数量位的第一数字值，基于输入信号的第一数字值和ADC内核的精度配置。 ADC还包括一个编码器，用于根据第一数字值和ADC内核的精度配置，产生具有大于第一位数的第二位数的第二数字值。 ADC还包括精度控制器，用于基于第一数字值与至少一个阈值之间的关系来调整ADC内核的精度配置。

公开(公告)号：US20120038499A1

公开(公告)日：2012-02-16

申请号：US13210991

申请日：2011-08-16

Applicant: FRED TZENG ,  Payam Heydari

Inventor： FRED TZENG ,  Payam Heydari

IPC: H03M1/12

CPC classification number: H03M1/1235

Abstract: A method of adaptively and losslessly quantizing an analog signal to a digital signal in an analog-to-digital converter (ADC), is disclosed. According to one embodiment, the quantizing is based on one or more of an instantaneous amplitude of the analog signal, frequencies of the analog signal, and patterned contents of the analog signal, and the method comprises sampling the analog signal; quanitizing the analog signal by a quantizer core, wherein the quantizer core comprises a digital-to-analog converter (DAC), a comparator, and a voltage reference, wherein the quantization is one of efficient lossless and adaptive compression quantization, or a traditional quantization method; determining by an analog compression engine (ACE) whether the sampled analog signal is above or below a defined threshold, wherein the defined threshold includes one or more of an amplitude threshold, a frequency threshold, and a patterned adaptive threshold; adaptively manipulating the sampled signal mathematically through at least one of the DAC or voltage reference of the quantizer core; and outputting the digital signal.

Abstract translation: 公开了一种在模拟 - 数字转换器（ADC）中自适应地和无损地量化模拟信号到数字信号的方法。 根据一个实施例，量化基于模拟信号的瞬时幅度，模拟信号的频率和模拟信号的图案化内容中的一个或多个，并且该方法包括对模拟信号进行采样; 量化器核心对模拟信号进行量化，其中量化器核心包括数模转换器（DAC），比较器和参考电压，其中量化是有效无损和自适应压缩量化之一，或传统量化 方法; 由模拟压缩引擎（ACE）确定所采样的模拟信号是否高于或低于定义的阈值，其中定义的阈值包括幅度阈值，频率阈值和图案化自适应阈值中的一个或多个; 通过量化器核心的DAC或电压基准中的至少一个自适应地操纵采样信号; 并输出数字信号。