公开(公告)号：US09182959B2

公开(公告)日：2015-11-10

申请号：US13343619

申请日：2012-01-04

申请人： Jeffry E. Gonion

发明人： Jeffry E. Gonion

IPC分类号： G06F9/30 ,  G06F9/45 ,  G06F9/38

CPC分类号： G06F8/4441 ,  G06F8/41 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30065 ,  G06F9/30072 ,  G06F9/30076 ,  G06F9/3013 ,  G06F9/3838 ,  G06F9/3865

摘要： The described embodiments comprise a PredCount instruction and a SegCount instruction. When executed by a processor, the PredCount instruction causes the processor to analyze a predicate vector to determine a number of active elements in the predicate vector that exhibit a predetermined condition (e.g., that are set to a predetermined value) and to return a result indicating that number. When executed by a processor, the SegCount instruction causes the processor to determine a number of times that a GeneratePredicates instruction would be executed to generate a full set of predicates using active elements of an input vector.

摘要翻译： 所描述的实施例包括PredCount指令和SegCount指令。 当由处理器执行时，PredCount指令使处理器分析谓词向量以确定呈现预定条件（例如，被设置为预定值）的谓词向量中的多个活动元素，并返回指示 那个数字。 当由处理器执行时，SegCount指令使处理器确定GeneratePredicates指令将被执行的次数，以使用输入向量的有效元素生成一整组谓词。

公开(公告)号：US08650281B1

公开(公告)日：2014-02-11

申请号：US13363529

申请日：2012-02-01

申请人： Abhijit Toley ,  Viraj Kamat

发明人： Abhijit Toley ,  Viraj Kamat

IPC分类号： G06F15/173 ,  G06F15/16 ,  G06F11/00 ,  G06F13/00 ,  G06F13/28 ,  H04L1/00 ,  H04L12/26 ,  H04L12/24 ,  H04L29/08 ,  H04L29/06 ,  H04L29/14 ,  H04L12/56 ,  G06F13/18 ,  G06F12/08

CPC分类号： H04L41/0213 ,  G06F12/08 ,  G06F13/18 ,  H04L29/06 ,  H04L29/08144 ,  H04L29/08549 ,  H04L29/14 ,  H04L47/10 ,  H04L67/1097

摘要： Various embodiments of a system and method for handling network partitions in a cluster of nodes are disclosed. The system and method may use a set of arbitration servers that are ordered in a particular order. Client nodes in different partitions may send requests to the arbitration servers to attempt to win control of them. The client node that wins a majority of the arbitration servers may remain in the cluster, and the client nodes in the other partitions may exit the cluster. The first arbitration server may award control to whichever client node whose request for control is received first. The remaining arbitration servers may be configured to give preference to the winner of one or more of the previous arbitration servers to attempt to ensure that one of the client nodes wins a majority.

摘要翻译： 公开了用于处理节点簇中的网络分区的系统和方法的各种实施例。 系统和方法可以使用以特定顺序排序的一组仲裁服务器。 不同分区中的客户端节点可能会向仲裁服务器发送请求，以尝试控制它们。 赢得大多数仲裁服务器的客户端节点可能会保留在群集中，而其他分区中的客户端节点可能会退出群集。 第一仲裁服务器可以将控制权授予首先接收其控制请求的客户机节点。 剩余的仲裁服务器可以被配置为优先考虑一个或多个先前的仲裁服务器的获胜者，以尝试确保客户端节点之一赢得多数。

公开(公告)号：US08543891B2

公开(公告)日：2013-09-24

申请号：US13547288

申请日：2012-07-12

申请人： Micha Anholt ,  Naftali Sommer

发明人： Micha Anholt ,  Naftali Sommer

IPC分类号： H03M13/00

CPC分类号： H04L1/004 ,  H03M13/1111 ,  H03M13/3776 ,  H03M13/6502 ,  H03M13/6577

摘要： A method includes accepting an input code word, which was produced by encoding data with an Error Correction Code (ECC), for decoding by a hardware-implemented ECC decoder. The input code word is pre-processed to produce a pre-processed code word, such that a first number of bit transitions that occur in the hardware-implemented ECC decoder while decoding the pre-processed code word is smaller than a second number of the bit transitions that would occur in the ECC decoder in decoding the input code word. The pre-processed code word is decoded using the ECC decoder, and the data is recovered from the decoded pre-processed code word.

摘要翻译： 一种方法包括接受通过用错误校正码（ECC）编码数据产生的输入码字，用于由硬件实现的ECC解码器进行解码。 输入代码字被预处理以产生预处理代码字，使得在解码预处理代码字时在硬件实现的ECC解码器中发生的第一数量的位转换小于第二数目的 在ECC解码器中将在对输入码字进行解码时发生的位转换。 使用ECC解码器解码预处理码字，并且从解码的预处理码字中恢复数据。

公开(公告)号：USRE44441E1

公开(公告)日：2013-08-13

申请号：US10857806

申请日：2004-05-28

申请人： Guy G. Riddle

发明人： Guy G. Riddle

IPC分类号： G06F15/16

CPC分类号： H04L12/1827 ,  H04L12/1863 ,  H04L12/1886 ,  H04L65/1089 ,  H04L65/4046 ,  H04L65/607 ,  H04M3/564 ,  H04M3/567 ,  H04M2203/5009 ,  H04N7/147 ,  H04N7/15

摘要： A method and apparatus for optimizing transmission of data to a plurality of second endpoints in a system wherein a first endpoint is providing data to the plurality of second endpoints each connected by a point-to-point communication channels. This may be useful in teleconferencing applications with a plurality of participants (endpoints) or broadcast server applications. The first endpoint activates a multicast communication channel having a first multicast address and commences broadcast of the data over the multicast communication channel. The first endpoint transmits a request message to each of the plurality of second endpoints in order to query each of the second endpoints whether they can receive transmissions broadcast to the first multicast address. Certain of the plurality of second endpoints transmit an acknowledgment message if they can receive transmissions broadcast to the first multicast address, and the first endpoint receives the acknowledgment message. Then, for each acknowledgment message received from certain of the plurality of second endpoints, the first endpoint deactivates the point-to-point communication channel and the certain of the plurality of second endpoints.

摘要翻译： 一种用于优化数据到系统中的多个第二端点的传输的方法和装置，其中第一端点将数据提供给通过点对点通信信道连接的多个第二端点。 这在具有多个参与者（端点）或广播服务器应用的电话会议应用中可能是有用的。 第一端点激活具有第一多播地址的多播通信信道，并且通过多播通信信道开始数据的广播。 第一端点向多个第二端点中的每一个发送请求消息，以便查询每个第二端点是否可以接收广播到第一多播地址的传输。 多个第二端点中的某些如果能够接收到广播到第一多播地址的传输，并且第一端点接收到确认消息，则发送确认消息。 然后，对于从某些多个第二端点接收到的每个确认消息，第一端点去激活点对点通信信道和多个第二端点中的某些。

公开(公告)号：US08494123B2

公开(公告)日：2013-07-23

申请号：US13175257

申请日：2011-07-01

申请人： Donald W. Pitschel ,  Imran Chaudhri ,  Freddy Anzures ,  Marcel van Os

发明人： Donald W. Pitschel ,  Imran Chaudhri ,  Freddy Anzures ,  Marcel van Os

IPC分类号： H04M1/64

CPC分类号： H04M3/4285 ,  H04M1/2477 ,  H04M1/72583 ,  H04M2201/38 ,  H04M2203/2011 ,  H04M2203/252 ,  H04M2203/254

摘要： A user equipment communications device is configured to provide personal content to a party to a call with a user of the device, when the user places the party on hold. The device determines that the party has been placed on hold and that the user has enabled sharing of personal content with the party. The device then transmits a visual menu to a communications device of the party via a data network, to allow the party to select a type of personal content to receive from the device while the party is on hold. When the device receives a selection from the party's device indicating the type of personal content, it transmits a personal information asset to the party's device according to the type of personal content indicated by the selection. Other embodiments are also described and claimed.

摘要翻译： 用户设备通信设备被配置为当用户将该方置于保持状态时，向设备的用户向呼叫方提供个人内容。 该设备确定该方已被搁置并且该用户已启用与该方共享个人内容。 然后，该设备经由数据网络将可视菜单发送到该方的通信设备，以允许该方在该方保持时从该设备中选择一类个人内容从该设备接收。 当设备从该方的设备接收到指示个人内容的类型的选择时，根据该选择所指示的个人内容的类型向该方的设备发送个人信息资产。 还描述和要求保护其他实施例。

公开(公告)号：US08493088B2

公开(公告)日：2013-07-23

申请号：US13360038

申请日：2012-01-27

申请人： Vincent R. von Kaenel

发明人： Vincent R. von Kaenel

IPC分类号： H03K19/00

CPC分类号： H03K19/0008 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes until the test fails. A lowest supply voltage magnitude at which the test passes is used to generate a requested supply voltage magnitude for the integrated circuit. In an embodiment, an integrated circuit includes a series connection of logic gates physically distributed over an area of the integrated circuit, and a measurement unit configured to launch a logical transition into the series and detect a corresponding transition at the output of the series. The amount of time between the launch and the detection is used to request a supply voltage magnitude for the integrated circuit.

公开(公告)号：US08482978B1

公开(公告)日：2013-07-09

申请号：US13170202

申请日：2011-06-28

申请人： Uri Perlmutter ,  Shai Winter ,  Eyal Gurgi ,  Oren Golov ,  Micha Anholt

发明人： Uri Perlmutter ,  Shai Winter ,  Eyal Gurgi ,  Oren Golov ,  Micha Anholt

IPC分类号： G11C11/34

CPC分类号： G11C11/5642 ,  G11C16/26 ,  G11C27/005 ,  G11C2211/5634

摘要： A method for data storage includes storing data in a group of analog memory cells by writing into the memory cells in the group respective storage values, which program each of the analog memory cells to a respective programming state selected from a predefined set of programming states, including at least first and second programming states, which are applied respectively to first and second subsets of the memory cells, whereby the storage values held in the memory cells in the first and second subsets are distributed in accordance with respective first and second distributions. A first median of the first distribution is estimated, and a read threshold, which differentiates between the first and second programming states, is calculated based on the estimated first median. The data is retrieved from the analog memory cells in the group by reading the storage values using the calculated read threshold.

摘要翻译： 一种用于数据存储的方法包括：通过将各组存储单元中的每个模拟存储器单元编程为从预定义的编程状态集合中选择的相应编程状态，将组中各存储单元写入存储单元中，将数据存储在一组模拟存储单元中， 包括至少第一和第二编程状态，其分别应用于存储器单元的第一和第二子集，由此保持在第一和第二子集中的存储单元中的存储值根据相应的第一和第二分布进行分配。 估计第一分布的第一中值，并且基于估计的第一中值来计算区分第一和第二编程状态的读取阈值。 通过使用计算的读取阈值读取存储值，从组中的模拟存储器单元检索数据。

公开(公告)号：US08479135B2

公开(公告)日：2013-07-02

申请号：US12638178

申请日：2009-12-15

申请人： Chih-Ang Chen ,  Joong-Seok Moon ,  Juhong Zhu ,  Gaurav S. Gulati ,  Maziar H. Moallem ,  Greg H. Nayman ,  Richard F. Avra

发明人： Chih-Ang Chen ,  Joong-Seok Moon ,  Juhong Zhu ,  Gaurav S. Gulati ,  Maziar H. Moallem ,  Greg H. Nayman ,  Richard F. Avra

IPC分类号： G06F17/50

CPC分类号： G06F17/5054

摘要： In an embodiment, a methodology for automating the generation of a programmable logic device implementation of at least a portion of an integrated circuit is contemplated. The methodology may operate on one or more hardware description language (HDL) files which describe the integrated circuit as an input. Additionally, one or more user-generated control files may be input to the methodology. The methodology may process the one or more HDL files, generating a bitstream to program one or more programmable logic devices to implement the described design. The methodology may include automated modification of the HDL files to prepare them for programmable logic device implementation, automated pad ring generation, automated pin multiplexing, daughter card definition, partitioning, etc.

摘要翻译： 在一个实施例中，考虑了用于自动生成集成电路的至少一部分的可编程逻辑器件实现的方法。 该方法可以在描述集成电路作为输入的一个或多个硬件描述语言（HDL）文件上操作。 此外，一个或多个用户生成的控制文件可以被输入到该方法。 该方法可以处理一个或多个HDL文件，生成比特流以编程一个或多个可编程逻辑设备以实现所描述的设计。 该方法可以包括HDL文件的自动修改，以准备它们用于可编程逻辑器件实现，自动焊盘生成，自动引脚复用，子卡定义，分割等。

公开(公告)号：US08476930B2

公开(公告)日：2013-07-02

申请号：US13171781

申请日：2011-06-29

申请人： Brian J. Campbell ,  Vincent R. von Kaenel ,  Naveen Javarappa ,  Greg M. Hess

发明人： Brian J. Campbell ,  Vincent R. von Kaenel ,  Naveen Javarappa ,  Greg M. Hess

IPC分类号： H03K19/094

CPC分类号： H03K3/012 ,  H03K3/35613

摘要： In one embodiment, a level shifter circuit may include a shift stage that also embeds transistors that implement a logic operation on two or more inputs to the level shifter. At least one of the inputs may be sourced from circuitry that is powered by a different power supply than the level shifter and circuitry that receives the level shifter output. Additionally, the level shifter includes one or more dummy transistors that match transistors the perform the logic operation, to improve symmetry of the level shifter circuit. In some embodiments, certain design and layout rules may be applied to the level shifter circuit to limit variation in the symmetry over various manufacturing variations.

摘要翻译： 在一个实施例中，电平移位器电路可以包括移位级，其还将实现逻辑运算的晶体管嵌入到电平移位器的两个或更多个输入上。 输入中的至少一个可以来自由与接收电平移位器输出的电平移位器和电路不同的电源供电的电路。 此外，电平移位器包括一个或多个匹配执行逻辑运算的晶体管的虚拟晶体管，以改善电平移位器电路的对称性。 在一些实施例中，某些设计和布局规则可以应用于电平移位器电路以限制在各种制造变化中的对称性的变化。

公开(公告)号：US06981172B2

公开(公告)日：2005-12-27

申请号：US09938800

申请日：2001-08-24

申请人： Paul Jeffrey Garnett ,  Jeremy Graham Harris

发明人： Paul Jeffrey Garnett ,  Jeremy Graham Harris

IPC分类号： G06F11/00 ,  G06F11/16

CPC分类号： G06F11/2097 ,  G06F11/1032 ,  G06F11/1675

摘要： A dirty memory is operable to store dirty indicators, each dirty indicator being settable to a given value indicative that a page of memory associated therewith has been dirtied. The dirty indicators are stored in groups with each group having associated therewith a validity indicator computed from the dirty indicator values of the group. The control logic is operable on reading a group to compute a validity indicator value based on the dirty indicator values for the group to determine the integrity of the group. The integrity can be confirmed by comparing the computed validity indicator value to a validity indicator value read for the group. Where the value read and the value computed compare equal, it can be assumed that the dirty indicator values of the group are correct. Preferably the validity indicator is a parity indicator. Although parity does not provide for error correction, parity has the advantage that minimal overhead is needed for computation and storage. When a parity error is detected, all of the dirty indicators associated with the parity indicator that has flagged a potential error are treated as suspect. As a consequence, when a parity error is detected for a of dirty indicators, all of the pages of memory associated with those dirty indicators are treated as being dirtied and they are therefore copied between memories. The dirty indicators and the parity indicator are then reset.

摘要翻译： 脏存储器可操作以存储脏指示器，每个脏指示器可设置为给定值，指示与其相关联的存储器页已被弄脏。 脏指示符被分组地存储，每个组具有与其相关联的从组的脏指示符值计算的有效性指示符。 控制逻辑在读取组时可操作以基于组的脏指示符值来计算有效性指示符值，以确定组的完整性。 可以通过将计算的有效性指标值与组读取的有效性指标值进行比较来确认完整性。 在读取值和计算值比较相等的情况下，可以假定组的脏指示符值正确。 优选地，有效性指示符是奇偶校验指示符。 虽然奇偶校验不提供纠错，但奇偶校验具有计算和存储所需的最小开销的优点。 当检测到奇偶校验错误时，与标有潜在错误的奇偶校验指示符相关联的所有脏指示器被视为可疑。 因此，当对于脏指示符检测到奇偶校验错误时，与这些脏指示符相关联的所有存储器页面被视为被弄脏并且因此被复制在存储器之间。 脏指示器和奇偶校验指示器然后复位。