Three-dimensional battery having current-reducing devices corresponding to electrodes
    1.
    发明授权
    Three-dimensional battery having current-reducing devices corresponding to electrodes 有权
    具有对应于电极的电流减小装置的三维电池

    公开(公告)号:US09166230B1

    公开(公告)日:2015-10-20

    申请号:US12013397

    申请日:2008-01-11

    摘要: Various three-dimensional battery structures are disclosed, in certain embodiments comprising a battery enclosure and a first plurality of electrodes within the enclosure. The first plurality of electrodes includes a plurality of cathodes and a plurality of anodes. The first plurality of electrodes includes a second plurality of electrodes selected from the first plurality of electrodes. The three-dimensional battery includes a first structural layer within the battery enclosure. Each of the second plurality of electrodes protrudes from the first structural layer. The three-dimensional battery includes a plurality of electrical current-reducing devices within the enclosure. Each of the second plurality of electrodes is coupled to one of the plurality of current-reducing devices.

    摘要翻译: 公开了各种三维电池结构,在某些实施例中包括电池外壳和外壳内的第一多个电极。 第一多个电极包括多个阴极和多个阳极。 第一多个电极包括从第一多个电极中选择的第二多个电极。 三维电池包括电池外壳内的第一结构层。 第二多个电极中的每一个从第一结构层突出。 三维电池在外壳内包括多个减少电流的装置。 第二多个电极中的每一个耦合到多个电流降低装置中的一个。

    Lead overlay sensor with improved current path
    3.
    发明授权
    Lead overlay sensor with improved current path 失效
    引线覆盖传感器,具有改进的电流路径

    公开(公告)号:US07327538B2

    公开(公告)日:2008-02-05

    申请号:US11479318

    申请日:2006-06-29

    IPC分类号: G11B5/39

    CPC分类号: G11B5/3912

    摘要: In a lead overlay (LOL) type of read head first and second insulation layers are employed with the first insulation layer being located between a top surface of a first hard bias layer and a first lead layer and the second insulation layer is located between the top surface of a second hard bias layer and a second lead layer for minimizing a shunting of a sense current through the hard bias layers into a read sensor.

    摘要翻译: 在第一绝缘层位于第一硬偏置层的顶表面和第一引线层之间的第一和第二绝缘层的引线覆盖层(LOL)型读取头中,并且第二绝缘层位于顶部 第二硬偏置层和第二引线层的表面,用于最小化通过硬偏压层的读出电流的分流到读取传感器中。

    Method for shaping pole pieces of magnetic heads by chemical mechanical polishing
    4.
    发明授权
    Method for shaping pole pieces of magnetic heads by chemical mechanical polishing 失效
    通过化学机械抛光对磁头的极片进行成形的方法

    公开(公告)号:US07127801B2

    公开(公告)日:2006-10-31

    申请号:US11090087

    申请日:2005-03-24

    IPC分类号: G11B5/127 H04R31/00

    摘要: A thin film magnetic head that includes an improved P2 pole tip/yoke interface. The process for forming the P2 pole tip/yoke interface includes a CMP polishing step that is performed on the surface of the wafer subsequent to the plating of the P2 pole tip. This CMP step utilizes a relatively soft polishing pad and an acidic polishing slurry which preferentially attacks the P2 pole tip material, such that the CMP step results in the recession of the upper surface of the P2 pole tip relative to the dielectric layer surrounding it, as well as the significant rounding of the upper edges of the dielectric trench in which the P2 pole tip is formed. Thereafter, when the yoke is plated onto the P2 pole tip the rounded upper edges of the dielectric trench result in a concave curved interface between the yoke and the P2 pole tip.

    摘要翻译: 一种薄膜磁头,包括改进的P 2极尖/磁轭接口。 用于形成P 2极尖/轭接口的工艺包括在P 2极尖的电镀之后在晶片的表面上执行的CMP抛光步骤。 该CMP步骤使用相对软的抛光垫和优先攻击P 2极尖材料的酸性抛光浆料,使得CMP步骤导致P 2极尖端的上表面相对于围绕其的介电层的凹陷 ,以及形成有P 2极尖的电介质沟槽的上边缘的显着的四舍五入。 此后,当轭被镀在P 2极尖上时,电介质沟槽的圆形上边缘导致轭和P 2极尖之间的凹形弯曲界面。

    Self-aligned void filling for mushroomed plating
    5.
    发明授权
    Self-aligned void filling for mushroomed plating 失效
    自对准空隙填充为蘑菇电镀

    公开(公告)号:US07123443B2

    公开(公告)日:2006-10-17

    申请号:US10617322

    申请日:2003-07-09

    IPC分类号: G11B5/17

    摘要: The present invention includes an overplated component which includes an enlarged mushroom head having outer portions which overhang a hard baked resist layer. The device is ultimately encapsulated such that no voids and/or redeposition problems exist under the overhang due to the presence of the hard baked resist. While not intended to be limiting in any manner, a device of the present invention is a thin film magnetic head wherein the yoke portion of a magnetic pole is formed utilizing the mushroom plating techniques of the present invention. Another mushroom plated component found in many devices is a mushroom plated electrical interconnecting stud that is formed utilizing the process steps of the present invention.

    摘要翻译: 本发明包括一个外延部件,它包括一个扩大的蘑菇头部,其具有伸出硬烘烤抗蚀剂层的外部部分。 该装置最终被包封,使得由于硬烘烤抗蚀剂的存在而在悬垂下不存在空隙和/或再沉积问题。 虽然不是以任何方式限制,但是本发明的装置是薄膜磁头,其中利用本发明的蘑菇电镀技术形成磁极的磁轭部分。 在许多装置中发现的另一种蘑菇电镀组件是利用本发明的方法步骤形成的蘑菇电镀电互连柱。

    NEGATIVE ELECTRODE STRUCTURE FOR NON-AQUEOUS LITHIUM SECONDARY BATTERY
    6.
    发明申请
    NEGATIVE ELECTRODE STRUCTURE FOR NON-AQUEOUS LITHIUM SECONDARY BATTERY 有权
    非水性锂二次电池负极结构

    公开(公告)号:US20120115026A1

    公开(公告)日:2012-05-10

    申请号:US12426118

    申请日:2009-04-17

    IPC分类号: H01M4/02 B05D5/12 C25D7/00

    摘要: The present invention relates to a negative electrode structure for use in a non-aqueous electrolyte secondary battery and a method of making such negative electrode structure. The negative electrode structure comprises: a monolithic anode comprising a semiconductor material, and a uniform ion transport structure disposed at the monolithic anode surface for contacting a non-aqueous electrolyte, wherein the uniform ion transport structure serves as a current collector and the negative electrode structure does not contain another current collector. The present invention also relates to a battery comprising the negative electrode structure of the present invention, a cathode, and a non-aqueous electrolyte.

    摘要翻译: 本发明涉及一种用于非水电解质二次电池的负极结构体及其制造方法。 负极结构包括:包含半导体材料的单片阳极和设置在整体式阳极表面处的用于接触非水电解质的均匀离子传输结构,其中均匀的离子传输结构用作集电器,负极结构 不包含另一个集电器。 本发明还涉及包含本发明的负极结构,阴极和非水电解质的电池。

    THREE-DIMENSIONAL BATTERIES AND METHODS OF MANUFACTURING THE SAME
    7.
    发明申请
    THREE-DIMENSIONAL BATTERIES AND METHODS OF MANUFACTURING THE SAME 有权
    三维电池及其制造方法

    公开(公告)号:US20110111283A1

    公开(公告)日:2011-05-12

    申请号:US12013388

    申请日:2008-01-11

    IPC分类号: H01M4/04 H01M2/02 C25D13/12

    摘要: Various methods and apparatus relating to three-dimensional battery structures and methods of manufacturing them are disclosed and claimed. In certain embodiments, a three-dimensional battery comprises a battery enclosure, and a first structural layer within the battery enclosure, where the first structural layer has a first surface, and a first plurality of conductive protrusions extend from the first surface. A first plurality of electrodes is located within the battery enclosure, where the first plurality of electrodes includes a plurality of cathodes and a plurality of anodes, and wherein the first plurality of electrodes includes a second plurality of electrodes selected from the first plurality of electrodes, each of the second plurality of electrodes being in contact with the outer surface of one of said first plurality of conductive protrusions. Some embodiments relate to processes of manufacturing energy storage devices with or without the use of a backbone structure or layer.

    摘要翻译: 公开并要求保护与三维电池结构及其制造方法有关的各种方法和装置。 在某些实施例中,三维电池包括电池外壳和电池外壳内的第一结构层,其中第一结构层具有第一表面,并且第一多个导电突起从第一表面延伸。 第一多个电极位于电池外壳内,其中第一多个电极包括多个阴极和多个阳极,并且其中第一多个电极包括从第一多个电极中选择的第二多个电极, 所述第二多个电极中的每一个与所述第一多个导电突起中的一个的外表面接触。 一些实施例涉及在使用或不使用骨架结构或层的情况下制造能量存储装置的过程。

    Lead overlay sensor with improved current path
    9.
    发明授权
    Lead overlay sensor with improved current path 失效
    引线覆盖传感器,具有改进的电流路径

    公开(公告)号:US07116526B2

    公开(公告)日:2006-10-03

    申请号:US10303114

    申请日:2002-11-22

    IPC分类号: G11B5/39

    CPC分类号: G11B5/3912

    摘要: In a lead overlay (LOL) type of read head first and second insulation layers are employed with the first insulation layer being located between a top surface of a first hard bias layer and a first lead layer and the second insulation layer is located between the top surface of a second hard bias layer and a second lead layer for minimizing a shunting of a sense current through the hard bias layers into a read sensor.

    摘要翻译: 在第一绝缘层位于第一硬偏置层的顶表面和第一引线层之间的第一和第二绝缘层的引线覆盖层(LOL)型读取头中,并且第二绝缘层位于顶部 第二硬偏置层和第二引线层的表面,用于最小化通过硬偏压层的读出电流的分流到读取传感器中。