公开(公告)号：US20050142705A1

公开(公告)日：2005-06-30

申请号：US11064821

申请日：2005-02-25

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/321 ,  H01L21/336 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L21/00 ,  H01L21/84

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

公开(公告)号：US20090289254A1

公开(公告)日：2009-11-26

申请号：US12534382

申请日：2009-08-03

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L27/12

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US07569856B2

公开(公告)日：2009-08-04

申请号：US11078440

申请日：2005-03-14

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L21/84

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US20050153489A1

公开(公告)日：2005-07-14

申请号：US11078440

申请日：2005-03-14

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/321 ,  H01L21/336 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US6049092A

公开(公告)日：2000-04-11

申请号：US838783

申请日：1997-04-10

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/321 ,  H01L21/336 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31144 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L21/31116 ,  H01L21/31683

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an loff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间设置具有较高电阻率的区域以便减小漏电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US08198683B2

公开(公告)日：2012-06-12

申请号：US12958739

申请日：2010-12-02

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US20110068339A1

公开(公告)日：2011-03-24

申请号：US12958739

申请日：2010-12-02

申请人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

发明人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

IPC分类号： H01L29/772 ,  H01L27/12

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US07847355B2

公开(公告)日：2010-12-07

申请号：US12534382

申请日：2009-08-03

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US07525158B2

公开(公告)日：2009-04-28

申请号：US10893889

申请日：2004-07-20

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US06867431B2

公开(公告)日：2005-03-15

申请号：US08307167

申请日：1994-09-16

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/321 ,  H01L21/336 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L31/036 ,  H01L31/0368 ,  H01L31/0392

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.