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公开(公告)号：US08493451B2
公开(公告)日：2013-07-23
申请号：US13528266
申请日：2012-06-20
CPC分类号： H04N5/343 , H01L27/14603 , H04N5/2628 , H04N5/335
摘要： Imaging devices including a novel imaging system wherein a 2-dimensional pixel array has a diagonal dimension larger than the diameter measurement of the image circle, thereby being capable of handling rectangular images with multiple aspect ratios. These new imaging devices can be used in various electronic imaging apparatus with or without a lens system.
摘要翻译： 包括新型成像系统的成像装置，其中二维像素阵列的对角线尺寸大于图像圆的直径测量，从而能够处理具有多个纵横比的矩形图像。 这些新的成像装置可用于具有或不具有透镜系统的各种电子成像装置。
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2.发明授权公开(公告)号：US06943051B2
公开(公告)日：2005-09-13
申请号：US10399495
申请日：2001-10-12
IPC分类号： H01L21/00 , H01L21/8249 , H01L27/146 , H01L31/10 , H04N5/335
CPC分类号： B82Y20/00 , H01L27/14609 , H01L27/14621 , H01L27/14632 , H01L27/14636 , H01L27/14643 , H01L27/14687 , H01L27/14689 , H01L27/14692
摘要： A method in which thin-film p-i-n heterojunction photodiodes are formed by selective epitaxial growth/deposition on pre-designated active-area regions of standard CMOS devices. The thin-film p-i-n photodiodes are formed on active areas (for example n+-doped), and these are contacted at the bottom (substrate) side by the “well contact” corresponding to that particular active area. There is no actual potential well since that particular active area has only one type of doping. The top of each photodiode has a separate contact formed thereon. The selective epitaxial growth of the p-i-n photodiodes is modular, in the sense that there is no need to change any of the steps developed for the “pure” CMOS process flow. Since the active region is epitaxially deposited, there is the possibility of forming sharp doping profiles and band-gap engineering during the epitaxial process, thereby optimizing several device parameters for higher performance. This new type of light sensor architecture, monolithically integrated with CMOS, decouples the photo-absorption active region from the MOSFETs, hence the bias applied to the photodiode can be independent from the bias between the source, drain, gate and substrate (well) of the MOSFETs.
摘要翻译： 通过选择性外延生长/沉积在标准CMOS器件的预先指定的有源区域区域上形成薄膜p-i-n异质结光电二极管的方法。 薄膜引脚光电二极管形成在有源区域（例如，n + +）上，并且在底部（基板）侧通过对应于该特定有源区域的“阱接触” 。 没有实际的潜力很好，因为该特定的有源区域只有一种类型的掺杂。 每个光电二极管的顶部具有形成在其上的单独的触点。 p-i-n光电二极管的选择性外延生长是模块化的，在这种意义上，不需要改变为“纯”CMOS工艺流程开发的任何步骤。 由于有源区域是外延沉积的，所以在外延工艺期间可能形成尖锐的掺杂分布和带隙工程，从而优化几个器件参数以实现更高的性能。 这种与CMOS单片集成的新型光传感器结构将光吸收有源区与MOSFET分离，因此施加到光电二极管的偏置可以独立于源极，漏极，栅极和衬底之间的偏置（阱） MOSFET。
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3.发明授权
公开(公告)号：US5493986A
公开(公告)日：1996-02-27
申请号：US360692
申请日：1995-01-05
IPC分类号： G02F1/1333 , G02F1/125 , G02F1/136 , G02F1/1362 , H01L21/02 , H01L21/762 , H01L27/00 , H01L27/02 , H01L27/12 , C30B23/04
CPC分类号： H01L27/02 , G02F1/136 , G02F1/136277 , G02F1/13336 , H01L2224/83894 , H01L2924/01019 , Y10S117/915
摘要： A method is described which makes it possible to use VLSI-quality crystalline semiconductor substrates for the fabrication of the active devices of Active Matrix Flat Panels (AMFPD). The VLSI substrates are provided by arranging a layer of light transparent material in those areas of a semiconductor wafer in which no active device has to be provided, eliminating the semiconductor wafer whereby a transparent wafer is obtained with crystalline semiconductor regions therein and then shaping the transparent wafer into a sized module unit. Several module units can be bonded to a glass substrate and a conductive material is then deposited to make electrical interconnections between the module units. The bonding operation can be performed either at room temperature using a light-transparent glue or at higher temperature using a wafer bonding technique known in the art of Silicon-On-Insulator technology.
摘要翻译： PCT No.PCT / EP93 / 01206 Sec。 371 1995年1月5日第 102（e）日期1995年1月5日PCT提交1993年5月13日PCT公布。 第WO94 / 27321号公报 日期1994年11月24日。描述了一种使得可以使用VLSI质量的晶体半导体衬底来制造有源矩阵平板（AMFPD）的有源器件的方法。 通过在不需要设置有源器件的半导体晶片的那些区域中布置透明材料层来提供VLSI衬底，从而消除半导体晶片，由此得到透明晶片，并且将透明晶片成形为透明晶片 晶片成为尺寸模块单元。 可以将几个模块单元结合到玻璃基板上，然后沉积导电材料以在模块单元之间形成电互连。 接合操作可以使用透明胶在室温下进行，或者使用硅绝缘体技术领域中已知的晶片结合技术在较高温度下进行。
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公开(公告)号：US08885987B2
公开(公告)日：2014-11-11
申请号：US12676985
申请日：2007-09-06
IPC分类号： G02B6/12 , H01L27/146 , G02B6/43 , H01L31/0232 , G02B6/08 , G02B6/42
CPC分类号： G02B6/1225 , G02B6/08 , G02B6/12 , G02B6/4249 , G02B6/4298 , G02B6/43 , G02B2006/12166 , G02B2006/12176 , H01L27/14621 , H01L27/14629 , H01L27/14636 , H01L27/14685 , H01L31/0232
摘要： Photonic passive structure to couple and guide light between photonic active devices (101), such as photo-diodes, light emitting devices and light-valves, which may be arranged into 2D arrays, and the top of the metallization layer stack (110,111,112) interconnecting said devices, with said photonic passive structure comprising a hole (116) between the near surface of said photonic active Ndevices and the top of said metallization stack, said hole being filled with a dielectric (113) having embedded metal films (117) and in which the embedded metal thin films are connected to a planar perforated metal film (123,124) formed on top of the metallization stack.
摘要翻译： 可以布置成2D阵列的光子二极管，发光器件和光阀之间的光子有源器件（101）耦合和引导光的光子无源结构以及互连的金属化层堆叠（110,111,112）的顶部 所述器件具有所述光子被动结构，其包括在所述光子活性Ndevices的近表面和所述金属化堆叠的顶部之间的孔（116），所述孔填充有具有嵌入金属膜（117）的电介质（113） 其中嵌入的金属薄膜连接到形成在金属化叠层顶部上的平面穿孔金属膜（123,124）。
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公开(公告)号：US07319423B2
公开(公告)日：2008-01-15
申请号：US11418119
申请日：2006-05-05
IPC分类号： H03M1/12
摘要： An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.
摘要翻译： 一种极性的模拟源信号的模拟 - 数字转换器装置包括由晶体管形成的一个比较器，用于设置比较器的参考电压的一组数字寻址电压源，异步n位数字计数器， 数字寻址电压源，用于设置施加到信号源的电位，数字控制单元，存储用于比较器的输入电容器的校准数据的块和通过线互连的基2乘法器块，包括 将输入模拟信号连接到传输晶体管的漏极，连接要连接到信号源的电压源块的线，将数字控制单元连接到晶体管栅极的线以及从该晶体管 数字寻址电压源的块到比较器。
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6.发明授权公开(公告)号：US07068206B2
公开(公告)日：2006-06-27
申请号：US10522805
申请日：2003-07-31
IPC分类号： H03M1/12
摘要： A new methodology is disclosed to convert analog electric signals into digital data. The method provides a serial scheme without pre-definition of the number of bits (dynamic range). It allows digital processing of the input signal without sampling and holding of the input signal. Processing of the input signal is clock-less and asynchronously dependent on the time-evolution of the input signal itself. Thereby, a programmable, dynamic adjustment of bandwidth (product of dynamic range and speed of conversion) of the analog-to-digital conversion process can be achieved depending on the characteristics of the input signal. Dynamic adjustment of the bandwidth is accomplished by digitally controlling a “threshold” value at the input capacitor of the comparator, which when met by the input signal, triggers a transition at the output of the comparator.
摘要翻译： 公开了一种将模拟电信号转换为数字数据的新方法。 该方法提供了串行方案，而不预先定义位数（动态范围）。 它允许对输入信号进行数字处理，而无需采样和保持输入信号。 输入信号的处理是无时钟的，并且异步地取决于输入信号本身的时间演化。 因此，可以根据输入信号的特性来实现模数转换处理的可编程动态调整带宽（产品的动态范围和转换速度）。 带宽的动态调整是通过数字控制比较器的输入电容器上的“阈值”来实现的，当输入信号满足时，它将触发比较器输出端的转换。
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公开(公告)号：US20120257094A1
公开(公告)日：2012-10-11
申请号：US13528266
申请日：2012-06-20
IPC分类号： H04N5/335
CPC分类号： H04N5/343 , H01L27/14603 , H04N5/2628 , H04N5/335
摘要： Imaging devices including a novel imaging system wherein a 2-dimensional pixel array has a diagonal dimension larger than the diameter measurement of the image circle, thereby being capable of handling rectangular images with multiple aspect ratios. These new imaging devices can be used in various electronic imaging apparatus with or without a lens system.
摘要翻译： 包括新型成像系统的成像装置，其中二维像素阵列的对角线尺寸大于图像圆的直径测量，从而能够处理具有多个纵横比的矩形图像。 这些新的成像装置可用于具有或不具有透镜系统的各种电子成像装置。
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8.发明授权Layouts for the monolithic integration of CMOS and deposited photonic active layers 有权用于CMOS和沉积的光子有源层的单片集成的布局公开(公告)号：US08183516B2
公开(公告)日：2012-05-22
申请号：US11572525
申请日：2005-07-28
IPC分类号： H01L31/00 , H01L31/107
CPC分类号： H01L27/146 , H01L27/14603 , H01L27/14609 , H01L27/1463 , H01L27/14643 , H01L27/156
摘要： Several detailed layout designs are disclosed, for the monolithic integration of avalanche devices in large arrays, that can be operated as Avalanche Photo-Diodes (APDs) or Avalanche Light Emitting Diodes (ALEDs) depending only on the applied bias conditions, which can be software-controlled from peripheral circuitry. If the deposited films have direct bandgaps, then the devices can emit light even in the absence of avalanche operation. In particular, the layouts according to the invention comprise a sensor/emitter matrix achieved through the replication of basic Pixel/Lixel cells.
摘要翻译： 公开了几种详细的布局设计，用于大型阵列中的雪崩器件的单片集成，其可以仅依赖于施加的偏置条件而被操作为雪崩光二极管（APD）或雪崩发光二极管（ALED），其可以是软件 由外设电路控制。 如果沉积的膜具有直接的带隙，则即使在没有雪崩操作的情况下，器件也可以发光。 特别地，根据本发明的布局包括通过复制基本像素/透镜单元实现的传感器/发射器矩阵。
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公开(公告)号：US08120079B2
公开(公告)日：2012-02-21
申请号：US12403900
申请日：2009-03-13
IPC分类号： H01L33/00
CPC分类号： H01L27/14669 , H01L27/14609 , H01L31/035254 , H01L31/107
摘要： A method of fabricating multi-spectral photo-sensors including photo-diodes incorporating stacked epitaxial superlattices monolithically integrated with CMOS devices on a common semiconductor substrate.
摘要翻译： 一种制造多光谱光电传感器的方法，包括结合堆叠的外延超晶格的光电二极管，其在公共半导体衬底上与CMOS器件单片集成。
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公开(公告)号：US07518540B2
公开(公告)日：2009-04-14
申请号：US12000049
申请日：2007-12-07
IPC分类号： H03M1/12
CPC分类号： H03M1/1014 , H03M1/125 , H04N5/3698 , H04N5/374 , H04N5/378
摘要： An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.
摘要翻译： 一种极性的模拟源信号的模拟 - 数字转换器装置包括由晶体管形成的一个比较器，用于设置比较器的参考电压的一组数字寻址电压源，异步n位数字计数器， 数字寻址电压源，用于设置施加到信号源的电位，数字控制单元，存储用于比较器的输入电容器的校准数据的块和通过线互连的基2乘法器块，包括 将输入模拟信号连接到传输晶体管的漏极，连接要连接到信号源的电压源块的线，将数字控制单元连接到晶体管栅极的线以及从该晶体管 数字寻址电压源的块到比较器。
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