公开(公告)号：US08610272B2

公开(公告)日：2013-12-17

申请号：US12959595

申请日：2010-12-03

Applicant: Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

Inventor： Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

IPC: H01L21/00

CPC classification number: H01L29/84 ,  B81B7/007 ,  B81B2207/096 ,  B81C1/00301 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package structure includes a micro-electromechanical element having a plurality of electrical contacts; a package layer enclosing the micro-electromechanical element and the electrical contacts, with a bottom surface of the micro-electromechanical element exposed from a lower surface of the package layer; a plurality of bonding wires embedded in the package layer, each of the bonding wires having one end connected to one of the electrical contacts, and the other end exposed from the lower surface of the package layer; and a build-up layer structure provided on the lower surface of the package layer, the build-up layer including at least one dielectric layer and a plurality of conductive blind vias formed in the dielectric layer and electrically connected to one ends of the bonding wires. The package structure is easier to accurately control the location of an external electrical contact, and the compatibility of the manufacturing procedures is high.

Abstract translation: 封装结构包括具有多个电触头的微机电元件; 封装层，其包围微机电元件和电触点，微机电元件的底表面从封装层的下表面露出; 嵌入在所述封装层中的多个接合线，每个所述接合线的一端连接到所述电接触中的一个，另一端从所述封装层的下表面露出; 以及设置在所述封装层的下表面上的堆积层结构，所述堆积层包括形成在所述电介质层中并且电连接到所述接合线的一端的至少一个电介质层和多个导电盲孔 。 封装结构更容易准确地控制外部电触点的位置，并且制造程序的兼容性高。

公开(公告)号：US20110156180A1

公开(公告)日：2011-06-30

申请号：US12769041

申请日：2010-04-28

Applicant: Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

Inventor： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

IPC: H01L29/84 ,  H01L21/02 ,  H01L23/52

CPC classification number: H01L21/02 ,  B81B7/007 ,  B81B2207/07 ,  H01L23/52 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

Abstract translation: 提出具有微机电（MEMS）元件的封装结构，其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂，其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层，形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺，以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。

公开(公告)号：US08198689B2

公开(公告)日：2012-06-12

申请号：US12769041

申请日：2010-04-28

Applicant: Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

Inventor： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

IPC: H01L23/485

CPC classification number: H01L21/02 ,  B81B7/007 ,  B81B2207/07 ,  H01L23/52 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

Abstract translation: 提出具有微机电（MEMS）元件的封装结构，其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂，其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层，形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺，以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。

公开(公告)号：US20120001274A1

公开(公告)日：2012-01-05

申请号：US13090852

申请日：2011-04-20

Applicant: Hong-Da Chang ,  Hsin-Yi Liao ,  Chun-An Huang ,  Shih-Kuang Chiu ,  Chien-An Chen

Inventor： Hong-Da Chang ,  Hsin-Yi Liao ,  Chun-An Huang ,  Shih-Kuang Chiu ,  Chien-An Chen

IPC: H01L29/84 ,  H01L21/283

CPC classification number: B81C1/00301 ,  B81B2201/0264 ,  B81C1/00269 ,  B81C2203/0154 ,  H01L29/84 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wafer level package having a pressure sensor and a fabrication method thereof are provided. A wafer having the pressure sensor is bonded to a lid, and electrical connecting pads are formed on the wafer. After the lid is cut, wire-bonding and packaging processes are performed. Ends of bonding wires are exposed and serve as an electrical connecting path. A bottom opening is formed on a bottom surface of the wafer, in order to form a pressure sensor path.

Abstract translation: 提供了具有压力传感器及其制造方法的晶片级封装。 将具有压力传感器的晶片接合到盖上，并且在晶片上形成电连接焊盘。 在切割盖子之后，进行引线键合和封装处理。 接合线的端部暴露并用作电连接路径。 为了形成压力传感器路径，在晶片的底面上形成底部开口。

公开(公告)号：US09133021B2

公开(公告)日：2015-09-15

申请号：US13090852

申请日：2011-04-20

Applicant: Hong-Da Chang ,  Hsin-Yi Liao ,  Chun-An Huang ,  Shih-Kuang Chiu ,  Chien-An Chen

Inventor： Hong-Da Chang ,  Hsin-Yi Liao ,  Chun-An Huang ,  Shih-Kuang Chiu ,  Chien-An Chen

IPC: H01L29/84 ,  B81C1/00

CPC classification number: B81C1/00301 ,  B81B2201/0264 ,  B81C1/00269 ,  B81C2203/0154 ,  H01L29/84 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wafer level package having a pressure sensor and a fabrication method thereof are provided. A wafer having the pressure sensor is bonded to a lid, and electrical connecting pads are formed on the wafer. After the lid is cut, wire-bonding and packaging processes are performed. Ends of bonding wires are exposed and serve as an electrical connecting path. A bottom opening is formed on a bottom surface of the wafer, in order to form a pressure sensor path.

Abstract translation: 提供了具有压力传感器及其制造方法的晶片级封装。 将具有压力传感器的晶片接合到盖上，并且在晶片上形成电连接焊盘。 在切割盖子之后，进行引线键合和封装处理。 接合线的端部暴露并用作电连接路径。 为了形成压力传感器路径，在晶片的底面上形成底部开口。

公开(公告)号：US08564115B2

公开(公告)日：2013-10-22

申请号：US13492220

申请日：2012-06-08

Applicant: Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

Inventor： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

IPC: H01L23/04

CPC classification number: H01L21/02 ,  B81B7/007 ,  B81B2207/07 ,  H01L23/52 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

Abstract translation: 提出具有微机电（MEMS）元件的封装结构，其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂，其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层，形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺，以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。

公开(公告)号：US08288189B2

公开(公告)日：2012-10-16

申请号：US12906401

申请日：2010-10-18

Applicant: Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

Inventor： Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

IPC: H01L21/00 ,  H01L29/84

CPC classification number: H01L23/5389 ,  B81B7/007 ,  B81B2201/025 ,  B81B2207/096 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A package structure having an MEMS element includes: a packaging substrate having first and second wiring layers on two surfaces thereof and a chip embedded therein; a first dielectric layer disposed on the packaging substrate and the chip; a third wiring layer disposed on the first dielectric layer; a second dielectric layer disposed on the first dielectric layer and the third wiring layer and having a recessed portion; a lid disposed in the recessed portion and on the top surface of the second dielectric layer around the periphery of the recessed portion, wherein the portion of the lid on the top surface of the second dielectric layer is formed into a lid frame on which an adhering material is disposed to allow a substrate having an MEMS element to be attached to the packaging substrate with the MEMS element corresponding in position to the recessed portion, thereby providing a package structure of reduced size and costs with better electrical properties.

Abstract translation: 具有MEMS元件的封装结构包括：在其两个表面上具有第一和第二布线层的封装基板和嵌入其中的芯片; 设置在所述封装基板和所述芯片上的第一电介质层; 设置在所述第一电介质层上的第三布线层; 设置在所述第一电介质层和所述第三布线层上并具有凹部的第二电介质层; 设置在所述凹部的周围的所述凹部和所述第二电介质层的上表面上的盖，其中，所述第二电介质层的顶表面上的所述盖的部分形成为盖框架， 材料被设置为允许具有MEMS元件的基板被附接到包装基板，其中MEMS元件对应于凹部的位置，从而提供具有更好电气特性的尺寸和成本降低的封装结构。

公开(公告)号：US20120104517A1

公开(公告)日：2012-05-03

申请号：US12959595

申请日：2010-12-03

Applicant: Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

Inventor： Chun-An Huang ,  Hsin-Yi Liao ,  Shih-Kuang Chiu

IPC: H01L29/84 ,  H01L21/50

CPC classification number: H01L29/84 ,  B81B7/007 ,  B81B2207/096 ,  B81C1/00301 ,  H01L21/50 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package structure includes a micro-electromechanical element having a plurality of electrical contacts; a package layer enclosing the micro-electromechanical element and the electrical contacts, with a bottom surface of the micro-electromechanical element exposed from a lower surface of the package layer; a plurality of bonding wires embedded in the package layer, each of the bonding wires having one end connected to one of the electrical contacts, and the other end exposed from the lower surface of the package layer; and a build-up layer structure provided on the lower surface of the package layer, the build-up layer including at least one dielectric layer and a plurality of conductive blind vias formed in the dielectric layer and electrically connected to one ends of the bonding wires. The package structure is easier to accurately control the location of an external electrical contact, and the compatibility of the manufacturing procedures is high.

Abstract translation: 封装结构包括具有多个电触头的微机电元件; 封装层，其包围微机电元件和电触点，微机电元件的底表面从封装层的下表面露出; 嵌入在所述封装层中的多个接合线，每个所述接合线的一端连接到所述电接触中的一个，另一端从所述封装层的下表面露出; 以及设置在所述封装层的下表面上的堆积层结构，所述堆积层包括至少一个电介质层和形成在所述电介质层中并且电连接到所述接合线的一端的多个导电盲孔 。 封装结构更容易准确地控制外部电触点的位置，并且制造程序的兼容性高。

公开(公告)号：US20130020709A1

公开(公告)日：2013-01-24

申请号：US13242940

申请日：2011-09-23

Applicant: Chun-An Huang ,  Pin-Cheng Huang ,  Chi-Hsin Chiu ,  Shih-Kuang Chiu

Inventor： Chun-An Huang ,  Pin-Cheng Huang ,  Chi-Hsin Chiu ,  Shih-Kuang Chiu

IPC: H01L23/488 ,  H01L21/768

CPC classification number: H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/1148 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/16237 ,  H01L2224/29011 ,  H01L2224/29076 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/73204 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2924/00014

Abstract: A semiconductor package and a method of fabricating the same. The semiconductor package includes a carrier having a plurality bonding pads disposed on a surface thereof, a packaging layer formed on the surface of the carrier and having a plurality of openings corresponding to the bonding pads, a conductive material filled in the openings and electrically connected to the bonding pads, and an electronic component installed on the packaging layer and having a plurality of conductive pillars correspondingly received in the openings and electrically connected to the conductive material. The formation of the openings in the packaging layer can control the position and size of the conductive material to enable the overall height of the conductive structure to be level and to keep the electronic component from tilting.

Abstract translation: 一种半导体封装及其制造方法。 半导体封装包括具有设置在其表面上的多个焊盘的载体，形成在载体的表面上并具有对应于接合焊盘的多个开口的封装层，填充在开口中的导电材料并电连接到 接合焊盘和安装在包装层上的电子部件，并且具有相应地容纳在开口中并电连接到导电材料的多个导电柱。 包装层中的开口的形成可以控制导电材料的位置和尺寸，以使得导电结构的整体高度水平并且保持电子部件不会倾斜。

公开(公告)号：US20120241937A1

公开(公告)日：2012-09-27

申请号：US13492220

申请日：2012-06-08

Applicant: Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

Inventor： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

IPC: H01L23/498

CPC classification number: H01L21/02 ,  B81B7/007 ,  B81B2207/07 ,  H01L23/52 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

Abstract translation: 提出具有微机电（MEMS）元件的封装结构，其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂，其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层，形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺，以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。