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    THERMAL IMAGE SENSOR WITH CHALCOGENIDE MATERIAL AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    THERMAL IMAGE SENSOR WITH CHALCOGENIDE MATERIAL AND METHOD OF FABRICATING THE SAME 审中-公开
    具有氯化铝材料的热图像传感器及其制造方法

    公开(公告)号：US20120132804A1

    公开(公告)日：2012-05-31

    申请号：US13222522

    申请日：2011-08-31

    Applicant: Tae-yon Lee ,  Dong-seok Suh ,  Yoon-dong Park

    Inventor： Tae-yon Lee ,  Dong-seok Suh ,  Yoon-dong Park

    IPC: H01L31/0248 ,  H01L31/0256 ,  H01L31/09 ,  H01L31/18

    CPC classification number: G01J5/20 ,  G01J5/0225 ,  G01J5/024 ,  G01J5/046 ,  G11C13/0004 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14669

    Abstract: A thermal image sensor including a chalcogenide material, and a method of fabricating the thermal image sensor are provided. The thermal image sensor includes a first metal layer formed on a substrate; a cavity exiting the first metal layer adapted for absorbing infrared rays; a bolometer resistor formed on the cavity and including a chalcogenide material; and a second metal layer formed on the bolometer resistor. The thermal image sensor includes a first metal layer formed on a substrate; an insulating layer formed on the first metal layer; a bolometer resistor formed on the insulating layer, including a chalcogenide material and having a thickness corresponding to ¼ of an infrared wavelength (λ); the thermal image sensor further includes a second metal layer formed on the bolometer resistor.

    Abstract translation: 提供了包括硫族化物材料的热图像传感器和制造热图像传感器的方法。 热图像传感器包括形成在基板上的第一金属层; 离开第一金属层的适于吸收红外线的空腔; 形成在空腔上并包含硫族化物材料的辐射热电阻器; 以及形成在测辐射热计电阻器上的第二金属层。 热图像传感器包括形成在基板上的第一金属层; 形成在所述第一金属层上的绝缘层; 形成在绝缘层上的辐照热电阻器，包括硫属化物材料，其厚度对应于红外波长（λ）的1/4; 热图像传感器还包括形成在测辐射热计电阻器上的第二金属层。

    STORAGE NODE, PHASE CHANGE MEMORY DEVICE AND METHODS OF OPERATING AND FABRICATING THE SAME
    3.
    发明申请
    STORAGE NODE, PHASE CHANGE MEMORY DEVICE AND METHODS OF OPERATING AND FABRICATING THE SAME 有权
    存储节点，相变存储器件及其操作和制造方法

    公开(公告)号：US20120127789A1

    公开(公告)日：2012-05-24

    申请号：US13348333

    申请日：2012-01-11

    Applicant: Dong-Seok Suh ,  Tae-Sang Park

    Inventor： Dong-Seok Suh ,  Tae-Sang Park

    IPC: G11C11/00 ,  H01L21/8239

    CPC classification number: H01L45/144 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1286 ,  H01L45/1675 ,  H01L45/1683

    Abstract: A storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer.

    Abstract translation: 存储节点可以包括下电极，下电极上的相变层和相变层上的上电极，下电极和上电极可以由熔点高于 相变层，并具有不同的导电类型。 下电极的上表面可以具有凹陷形状，并且下电极接触层可以设置在下电极和相变层之间。

    Storage node, phase change memory device and methods of operating and fabricating the same
    4.
    发明授权
    Storage node, phase change memory device and methods of operating and fabricating the same 有权
    存储节点，相变存储器件及其操作和制造方法

    公开(公告)号：US08120004B2

    公开(公告)日：2012-02-21

    申请号：US12314310

    申请日：2008-12-08

    Applicant: Dong-Seok Suh ,  Tae-Sang Park

    Inventor： Dong-Seok Suh ,  Tae-Sang Park

    IPC: H01L29/00

    CPC classification number: H01L45/144 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1286 ,  H01L45/1675 ,  H01L45/1683

    Abstract: A storage node, a phase change memory device, and methods of operating and fabricating the same are provided. The storage node may include a lower electrode, a phase change layer on the lower electrode and an upper electrode on the phase change layer, and the lower electrode and the upper electrode may be composed of thermoelectric materials having a melting point higher than that of the phase change layer, and having different conductivity types. An upper surface of the lower electrode may have a recessed shape, and a lower electrode contact layer may be provided between the lower electrode and the phase change layer. A thickness of the phase change layer may be about 100 nm or less, and the lower electrode may be composed of an n-type thermoelectric material, and the upper electrode may be composed of a p-type thermoelectric material, or they may be composed on the contrary to the above. Seeback coefficients of the lower electrode, the phase change layer, and the upper electrode may be different from each other.

    Abstract translation: 提供存储节点，相变存储器件及其操作和制造方法。 存储节点可以包括下电极，下电极上的相变层和相变层上的上电极，下电极和上电极可以由熔点高于 相变层，并具有不同的导电类型。 下电极的上表面可以具有凹陷形状，并且下电极接触层可以设置在下电极和相变层之间。 相变层的厚度可以为约100nm以下，下部电极可以由n型热电材料构成，上部电极可以由p型热电材料构成，也可以组成 与上述相反。 下电极，相变层和上电极的回吸系数可以彼此不同。

    Material and device properties modification by electrochemical charge injection in the absence of contacting electrolyte for either local spatial or final states
    5.
    发明授权
    Material and device properties modification by electrochemical charge injection in the absence of contacting electrolyte for either local spatial or final states 有权
    在不存在局部空间或最终状态的接触电解质的情况下，通过电化学电荷注入改变材料和器件性能

    公开(公告)号：US08101061B2

    公开(公告)日：2012-01-24

    申请号：US10591730

    申请日：2005-03-04

    Applicant: Dong-Seok Suh ,  Ray Henry Baughman ,  Anvar Abdulahadovic Zakhidov

    Inventor： Dong-Seok Suh ,  Ray Henry Baughman ,  Anvar Abdulahadovic Zakhidov

    IPC: G02B6/26

    CPC classification number: B82Y30/00 ,  H01G9/058 ,  H01G9/155 ,  H01G11/06 ,  H01G11/34 ,  H01G11/42 ,  H01L29/45 ,  H01L29/4908 ,  H01M4/8605 ,  H01M4/92 ,  H01M4/926 ,  H01M8/1004 ,  H01M8/1007 ,  Y02E60/13

    Abstract: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material property changes that are induced electrochemically by double-layer charging and retained during subsequent electrolyte removal. In some embodiments, the present invention provides reversible processes for electrochemically injecting charge into material that is not in direct contact with an electrolyte. Additionally, in some embodiments, the present invention is directed to devices and other material applications that use properties changes resulting from reversible electrochemical charge injection in the absence of an electrolyte.

    Abstract translation: 在一些实施方案中，本发明涉及用于通过非法拉第（双层）充电电化学注入材料中的电荷的组合以及当除去电解质时保持该电荷和相关联的期望性质变化的组合的方法。 本发明还涉及使用通过双层充电电化学诱导并在随后的电解质去除期间保留的材料性质变化的组合物和应用。 在一些实施方案中，本发明提供了将电荷电化学注入到不与电解质直接接触的材料中的可逆过程。 此外，在一些实施方案中，本发明涉及使用在不存在电解质的情况下由可逆电化学电荷注入产生的性质改变的装置和其它材料应用。

    Vertical string phase change random access memory device
    6.
    发明授权
    Vertical string phase change random access memory device 失效
    垂直串相变随机存取存储器件

    公开(公告)号：US08085583B2

    公开(公告)日：2011-12-27

    申请号：US12458099

    申请日：2009-06-30

    Applicant: Dong-seok Suh

    Inventor： Dong-seok Suh

    IPC: G11C11/00

    CPC classification number: H01L27/2481 ,  B82Y10/00 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/17 ,  G11C2213/52 ,  G11C2213/71 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1683

    Abstract: A phase change random access memory device is disclosed including a first electrode, a second electrode, a phase change material layer between the first and second electrode, a plurality of gate layers formed along the phase change material layer, an insulating film between the phase change material layer and the plurality of gate layers, and a plurality of interlayer insulating layers between the plurality of gate layers and between the first and second electrode and the plurality of gate layers, in which multiple bits of information may be stored in a single memory cell corresponding to the positions of the plurality of gate layers.

    Abstract translation: 公开了一种相变随机存取存储器件，包括第一电极，第二电极，第一和第二电极之间的相变材料层，沿相变材料层形成的多个栅极层，相变材料之间的绝缘膜 材料层和多个栅极层，以及在多个栅极层之间以及在第一和第二电极与多个栅极层之间的多个层间绝缘层，其中多个信息位可以存储在单个存储器单元中 对应于多个栅极层的位置。

    Non-volatile memory device and method of operating the same
    8.
    发明授权
    Non-volatile memory device and method of operating the same 失效
    非易失性存储器件及其操作方法

    公开(公告)号：US08054672B2

    公开(公告)日：2011-11-08

    申请号：US11980357

    申请日：2007-10-31

    Applicant: Dong-seok Suh ,  Jun-ho Lee

    Inventor： Dong-seok Suh ,  Jun-ho Lee

    IPC: G11C11/00

    CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/02 ,  G11C2013/0073 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/144 ,  Y10S977/754

    Abstract: Provided are a non-volatile memory device and a method of operating the non-volatile memory device. The non-volatile memory device includes a switching device and a storage node connected to the switching device, wherein the storage node comprises: a first electrode connected to the switching device; a chalcogenide material layer formed on the first electrode; and a second electrode formed on the chalcogenide material layer, and one of the first and second electrodes comprises an electrode contact layer formed adjacent to a limited region of the chalcogenide material layer, and a property of the electrode region adjacent to the chalcogenide material layer is changed reversibly according to the direction in which a current is applied, thereby changing between a high resistance state and a low resistance state.

    Abstract translation: 提供了非易失性存储器件和操作非易失性存储器件的方法。 所述非易失性存储器件包括连接到所述开关器件的开关器件和存储节点，其中所述存储节点包括：连接到所述开关器件的第一电极; 形成在第一电极上的硫族化物材料层; 和形成在硫族化物材料层上的第二电极，第一和第二电极中的一个电极包括与硫族化物材料层的有限区域相邻形成的电极接触层，与硫族化物材料层相邻的电极区域的性质是 根据施加电流的方向可逆地改变，从而在高电阻状态和低电阻状态之间变化。

    METHOD OF MEASURING A RESISTANCE OF A RESISTIVE MEMORY DEVICE
    10.
    发明申请
    METHOD OF MEASURING A RESISTANCE OF A RESISTIVE MEMORY DEVICE 有权
    测量电阻记忆装置电阻的方法

    公开(公告)号：US20110051497A1

    公开(公告)日：2011-03-03

    申请号：US12872396

    申请日：2010-08-31

    Applicant: Young-Kuk Kim ,  Mi-Lim Park ,  Hori Ihideki ,  Dong-Seok Suh

    Inventor： Young-Kuk Kim ,  Mi-Lim Park ,  Hori Ihideki ,  Dong-Seok Suh

    IPC: G11C11/00

    CPC classification number: G11C13/004 ,  G11C13/0004 ,  G11C13/0007

    Abstract: A method of measuring a resistance of a memory cell in a resistive memory device can be provided by applying a data write pulse to a selected cell of the resistive memory device, applying a resistance read pulse to the selected cell after a delay time measured from a time of applying the data write pulse, measuring a drop voltage at the cell responsive to a pulse waveform output when applying the resistance read pulse to the selected cell, measuring a total current through the cell using the drop voltage and an internal resistance of a test device coupled to the cell, and determining a resistance of the resistive memory device using the total current and a voltage of the resistance read pulse.

    Abstract translation: 可以通过向电阻式存储器件的选定单元施加数据写脉冲来提供测量电阻式存储器件中的存储单元的电阻的方法，该电阻读取脉冲在从 施加数据写入脉冲的时间，当对所选择的单元施加电阻读取脉冲时，响应于脉冲波形输出来测量单元上的下降电压，使用下降电压和测试的内部电阻测量通过电池的总电流 耦合到所述单元的装置，以及使用所述总电流和所述电阻读取脉冲的电压来确定所述电阻性存储器件的电阻。

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