High power RF window deposition apparatus, method, and device

    公开(公告)号:US09698454B1

    公开(公告)日:2017-07-04

    申请号:US13937216

    申请日:2013-07-09

    CPC classification number: H01P1/08 C23C16/34 C23C16/507

    Abstract: A process for forming a coating for an RF window which has improved secondary electron emission and reduced multipactor for high power RF waveguides is formed from a substrate with low loss tangent and desirable mechanical characteristics. The substrate has an RPAO deposition layer applied which oxygenates the surface of the substrate to remove carbon impurities, thereafter has an RPAN deposition layer applied to nitrogen activate the surface of the substrate, after which a TiN deposition layer is applied using Titanium tert-butoxide. The TiN deposition layer is capped with a final RPAN deposition layer of nitridation to reduce the bound oxygen in the TiN deposition layer. The resulting RF window has greatly improved titanium layer adhesion, reduced multipactor, and is able to withstand greater RF power levels than provided by the prior art.

    Semiconductor devices having an interfacial dielectric layer and related methods
    2.
    发明申请
    Semiconductor devices having an interfacial dielectric layer and related methods 失效
    具有界面介电层的半导体器件及相关方法

    公开(公告)号:US20060054937A1

    公开(公告)日:2006-03-16

    申请号:US10938110

    申请日:2004-09-10

    Abstract: A semiconductor device includes a semiconductor substrate including silicon and an oxide layer on the substrate. The oxide layer includes silicon. An interfacial dielectric layer is disposed on the oxide layer opposite the substrate. The interfacial dielectric layer includes HfO2, ZrO2, a zirconium silicate alloy, and/or a hafnium silicate alloy having a thickness between about 0.5 nm and 1.0 nm. A primary dielectric layer is disposed on the interfacial dielectric layer opposite the substrate. The primary dielectric layer includes AlO3; TiO2; a group IIIB or VB transition metal oxide; a trivalent lanthanide series rare earth oxide; a silicate alloy; an aluminate alloy; a complex binary oxide having two transition metal oxides and/or a complex binary oxide having a transition metal oxide and a lanthanide rare earth oxide. A thickness of the primary dielectric layer is at least about five times greater than the thickness of the interfacial dielectric layer.

    Abstract translation: 半导体器件包括在衬底上包括硅和氧化物层的半导体衬底。 氧化物层包括硅。 在与衬底相对的氧化物层上设置界面电介质层。 界面介电层包括厚度在约0.5nm至1.0nm之间的HfO 2 2,ZrO 2 2,硅酸锆合金和/或硅酸铪合金。 第一介质层设置在与衬底相对的界面电介质层上。 主介电层包括AlO 3 3; TiO 2; IIIB族或VB族过渡金属氧化物; 三价镧系稀土氧化物; 硅酸盐合金; 铝酸盐合金; 具有两个过渡金属氧化物和/或具有过渡金属氧化物和镧系稀土氧化物的复合二元氧化物的复合二元氧化物。 主介电层的厚度比界面介电层的厚度大至少约五倍。

    Semiconductor devices having an interfacial dielectric layer and related methods
    3.
    发明授权
    Semiconductor devices having an interfacial dielectric layer and related methods 失效
    具有界面介电层的半导体器件及相关方法

    公开(公告)号:US07507629B2

    公开(公告)日:2009-03-24

    申请号:US10938110

    申请日:2004-09-10

    Abstract: A semiconductor device includes a semiconductor substrate including silicon and an oxide layer on the substrate. The oxide layer includes silicon. An interfacial dielectric layer is disposed on the oxide layer opposite the substrate. The interfacial dielectric layer includes HfO2, ZrO2, a zirconium silicate alloy, and/or a hafnium silicate alloy having a thickness between about 0.5 nm and 1.0 nm. A primary dielectric layer is disposed on the interfacial dielectric layer opposite the substrate. The primary dielectric layer includes AlO3; TiO2; a group IIIB or VB transition metal oxide; a trivalent lanthanide series rare earth oxide; a silicate alloy; an aluminate alloy; a complex binary oxide having two transition metal oxides and/or a complex binary oxide having a transition metal oxide and a lanthanide rare earth oxide. A thickness of the primary dielectric layer is at least about five times greater than the thickness of the interfacial dielectric layer.

    Abstract translation: 半导体器件包括在衬底上包括硅和氧化物层的半导体衬底。 氧化物层包括硅。 在与衬底相对的氧化物层上设置界面电介质层。 界面电介质层包括HfO 2,ZrO 2,硅酸锆合金和/或厚度在约0.5nm至1.0nm之间的硅酸铪合金。 第一介质层设置在与衬底相对的界面电介质层上。 主介电层包括AlO 3; TiO2; IIIB族或VB族过渡金属氧化物; 三价镧系稀土氧化物; 硅酸盐合金; 铝酸盐合金; 具有两个过渡金属氧化物和/或具有过渡金属氧化物和镧系稀土氧化物的复合二元氧化物的复合二元氧化物。 主介电层的厚度比界面介电层的厚度大至少约五倍。

    Complex oxides for use in semiconductor devices and related methods
    4.
    发明申请
    Complex oxides for use in semiconductor devices and related methods 审中-公开
    用于半导体器件的复合氧化物及相关方法

    公开(公告)号:US20060157733A1

    公开(公告)日:2006-07-20

    申请号:US10560488

    申请日:2004-06-10

    Abstract: A semiconductor device includes a semiconductor substrate, a first oxide layer on the semiconductor substrate including an element from the semiconductor substrate, and a second oxide layer on the first oxide layer opposite the semiconductor substrate. The second oxide layer includes a stoichiometric, single-phase complex oxide represented by the formula: AhBjOk, or equivalently (AmOn)a(BqOr)b in which the elemental oxide components, (AmOn) and (BqOr) are combined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m, n, q and r are non-zero integers; and wherein: A is an element of the lanthanide rare earth elements of the periodic table or the trivalent elements from cerium to lutetium; and B is an element of the transition metal elements of groups IIIB, IVB or VB of the periodic table.

    Abstract translation: 半导体器件包括半导体衬底,半导体衬底上的包括来自半导体衬底的元件的第一氧化物层和与半导体衬底相对的第一氧化物层上的第二氧化物层。 第二氧化物层包括由下式表示的化学计量的单相复合氧化物:<?in-line-formula description =“In-line Formulas”end =“lead”?> A 或(等同的)(B)(B),(B) β-in-line-formula description =“In-Line Formulas”end =“tail”?>其中 将元素氧化物组分(A m O n O n N)和(B)q O n R n)组合,使得 h = j或等效地为ma = bq,a,b,h,j,k,m,n,q和r为非零整数; 并且其中:A是周期表的镧系元素稀土元素的元素或从铈到镥的三价元素; B是元素周期表IIIB,IVB或VB族的过渡金属元素的元素。

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