公开(公告)号：US08692571B2

公开(公告)日：2014-04-08

申请号：US13183521

申请日：2011-07-15

申请人： Fang-Shi Jordan Lai ,  Chih-Cheng Lu ,  Yung-Fu Lin ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng ,  Manoj M. Mhala

发明人： Fang-Shi Jordan Lai ,  Chih-Cheng Lu ,  Yung-Fu Lin ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng ,  Manoj M. Mhala

IPC分类号： G01R31/00 ,  G01R31/319

CPC分类号： G01R31/31924 ,  G01R31/2642

摘要： The reliability of an integrated circuit is inferred from the operational characteristics of sample metal oxide semiconductor (MOS) devices switchably coupled to drain/source bias and gate input voltages that are nominal, versus voltage and current conditions that elevate stress and cause temporary or permanent degradation, e.g., hot carrier injection (HCI), bias temperature instability (BTI, NBTI, PBTI), time dependent dielectric breakdown (TDDB). The MOS devices under test (preferably both PMOS and NMOS devices tested concurrently or in turn) are configured as current sources in the supply of power to a ring oscillator having cascaded inverter stages, thereby varying the oscillator frequency as a measure of the effects of stress on the devices under test, but without elevating the stress applied to the inverter stages.

摘要翻译： 集成电路的可靠性是根据样品金属氧化物半导体（MOS）器件的可操作特性推断的，该器件可以切换地耦合到漏极/源极偏置和栅极输入电压，这些标称电压和电流条件会提高应力并引起临时或永久性降解 ，例如热载流子注入（HCI），偏置温度不稳定性（BTI，NBTI，PBTI），时间依赖介电击穿（TDDB）。 所测试的MOS器件（优选同时或同时测试的PMOS和NMOS器件）被配置为向具有级联的反相器级的环形振荡器供电的电流源，从而改变振荡器频率作为应力的影响的量度 在被测设备上，但不会升高施加到逆变器级的应力。

公开(公告)号：US08493259B2

公开(公告)日：2013-07-23

申请号：US13311639

申请日：2011-12-06

申请人： Fang-Shi Jordan Lai ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng ,  Chih-Cheng Lu ,  Manoj M. Mhala ,  Yung-Fu Lin

发明人： Fang-Shi Jordan Lai ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng ,  Chih-Cheng Lu ,  Manoj M. Mhala ,  Yung-Fu Lin

IPC分类号： H03M1/34

CPC分类号： H03M1/1014 ,  H03M1/0695 ,  H03M1/168 ,  H03M1/44

摘要： A pipelined ADC includes a first, second, and third pairs of comparators. The first pair of comparators compare an input voltage to a first positive reference voltage and to a first negative reference voltage. The second pair of comparators compare the input voltage to a second positive reference voltage and to a second negative reference voltage. Each comparator of the first and second pairs of comparators outputs a digital signal to an encoder. A third pair of comparators compares the input voltage to a third positive reference voltage and to a third negative reference voltage, and a comparator compares the input voltage to ground. The comparator and each comparator of the third pair of comparators is configured to output respective digital signals to an encoder. A multiplying digital-to-analog converter outputs a voltage based on the input voltage, an output from the encoder, and an output of the random number generator.

摘要翻译： 流水线模数转换器包括第一，第二和第三对比较器。 第一对比较器将输入电压与第一正参考电压和第一负参考电压进行比较。 第二对比较器将输入电压与第二正参考电压和第二负参考电压进行比较。 第一和第二对比较器的每个比较器向编码器输出数字信号。 第三对比较器将输入电压与第三正参考电压和第三负参考电压进行比较，比较器将输入电压与地比较。 比较器和第三对比较器对的每个比较器被配置为将相应的数字信号输出到编码器。 乘法数模转换器输出基于输入电压的电压，来自编码器的输出和随机数发生器的输出。

公开(公告)号：US20130141260A1

公开(公告)日：2013-06-06

申请号：US13311639

申请日：2011-12-06

申请人： Fang-Shi Jordan LAI ,  Hsu-Feng HSUEH ,  Chin-Hao CHANG ,  Cheng Yen WENG ,  Chih-Cheng LU ,  Manoj M. MHALA ,  Yung-Fu LIN

发明人： Fang-Shi Jordan LAI ,  Hsu-Feng HSUEH ,  Chin-Hao CHANG ,  Cheng Yen WENG ,  Chih-Cheng LU ,  Manoj M. MHALA ,  Yung-Fu LIN

IPC分类号： H03M1/12 ,  H03M1/34

CPC分类号： H03M1/1014 ,  H03M1/0695 ,  H03M1/168 ,  H03M1/44

摘要： A pipelined ADC includes a first, second, and third pairs of comparators. The first pair of comparators compare an input voltage to a first positive reference voltage and to a first negative reference voltage. The second pair of comparators compare the input voltage to a second positive reference voltage and to a second negative reference voltage. Each comparator of the first and second pairs of comparators outputs a digital signal to an encoder. A third pair of comparators compares the input voltage to a third positive reference voltage and to a third negative reference voltage, and a comparator compares the input voltage to ground. The comparator and each comparator of the third pair of comparators is configured to output respective digital signals to an encoder. A multiplying digital-to-analog converter outputs a voltage based on the input voltage, an output from the encoder, and an output of the random number generator.

摘要翻译： 流水线模数转换器包括第一，第二和第三对比较器。 第一对比较器将输入电压与第一正参考电压和第一负参考电压进行比较。 第二对比较器将输入电压与第二正参考电压和第二负参考电压进行比较。 第一和第二对比较器的每个比较器向编码器输出数字信号。 第三对比较器将输入电压与第三正参考电压和第三负参考电压进行比较，比较器将输入电压与地比较。 比较器和第三对比较器对的每个比较器被配置为将相应的数字信号输出到编码器。 乘法数模转换器输出基于输入电压的电压，来自编码器的输出和随机数发生器的输出。

公开(公告)号：US20130015876A1

公开(公告)日：2013-01-17

申请号：US13183521

申请日：2011-07-15

申请人： Fang-Shi Jordan LAI ,  Chih-Cheng LU ,  Yung-Fu LIN ,  Hsu-Feng HSUEH ,  Chin-Hao CHANG ,  Cheng Yen WENG ,  Manoj M. MHALA

发明人： Fang-Shi Jordan LAI ,  Chih-Cheng LU ,  Yung-Fu LIN ,  Hsu-Feng HSUEH ,  Chin-Hao CHANG ,  Cheng Yen WENG ,  Manoj M. MHALA

IPC分类号： G01R31/26

CPC分类号： G01R31/31924 ,  G01R31/2642

摘要： The reliability of an integrated circuit is inferred from the operational characteristics of sample metal oxide semiconductor (MOS) devices switchably coupled to drain/source bias and gate input voltages that are nominal, versus voltage and current conditions that elevate stress and cause temporary or permanent degradation, e.g., hot carrier injection (HCI), bias temperature instability (BTI, NBTI, PBTI), time dependent dielectric breakdown (TDDB). The MOS devices under test (preferably both PMOS and NMOS devices tested concurrently or in turn) are configured as current sources in the supply of power to a ring oscillator having cascaded inverter stages, thereby varying the oscillator frequency as a measure of the effects of stress on the devices under test, but without elevating the stress applied to the inverter stages.

摘要翻译： 集成电路的可靠性是根据样品金属氧化物半导体（MOS）器件的可操作特性推断的，该器件可以切换地耦合到漏极/源极偏置和栅极输入电压，这些标称电压和电流条件会提高应力并引起临时或永久性降解 ，例如热载流子注入（HCI），偏置温度不稳定性（BTI，NBTI，PBTI），时间依赖介电击穿（TDDB）。 所测试的MOS器件（优选同时或同时测试的PMOS和NMOS器件）被配置为向具有级联的反相器级的环形振荡器供电的电流源，从而改变振荡器频率作为应力的影响的量度 在被测设备上，但不会升高施加到逆变器级的应力。

公开(公告)号：US20120249351A1

公开(公告)日：2012-10-04

申请号：US13526147

申请日：2012-06-18

申请人： Fang-Shi Jordan LAI ,  Kuo-Ming WANG ,  Hsu-Feng HSUEH ,  Cheng Yen WENG ,  Yung-Fu LIN

发明人： Fang-Shi Jordan LAI ,  Kuo-Ming WANG ,  Hsu-Feng HSUEH ,  Cheng Yen WENG ,  Yung-Fu LIN

IPC分类号： H03M1/10

CPC分类号： H03M1/1009 ,  H03M1/1004 ,  H03M1/365

摘要： An analog-to-digital converter (ADC) including a plurality of comparators connected to the ADC. The ADC further includes a first pair of terminals and a second pair of terminals connected to each of the plurality of comparators. The ADC further includes a first pair of switches coupled to each of the first pair of terminals and a second pair of switches coupled to each of the second pair of terminals, where the first and second pair of switches are configured to alternate a corresponding comparator between normal operation and a calibration configuration. Comparators other than the corresponding comparator are configured for normal operation if the corresponding comparator is configured to be calibrated.

摘要翻译： 包括连接到ADC的多个比较器的模数转换器（ADC）。 ADC还包括连接到多个比较器中的每一个的第一对端子和第二对端子。 ADC还包括耦合到第一对端子中的每一个的第一对开关和耦合到第二对端子中的每一个的第二对开关，其中第一和第二对开关被配置为在 正常操作和校准配置。 如果对应的比较器被配置为校准，则比较器对应的比较器被配置为正常运行。

公开(公告)号：US20120212361A1

公开(公告)日：2012-08-23

申请号：US13030862

申请日：2011-02-18

申请人： Fang-Shi Lai ,  Manoj M. Mhala ,  Yung-Fu Lin ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng

发明人： Fang-Shi Lai ,  Manoj M. Mhala ,  Yung-Fu Lin ,  Hsu-Feng Hsueh ,  Chin-Hao Chang ,  Cheng Yen Weng

IPC分类号： H03M3/02 ,  H03K5/22

CPC分类号： H03K5/24 ,  H03M3/352 ,  H03M3/45 ,  H03M3/452

摘要： A switched-capacitor circuit is disclosed. The switched-capacitor circuit includes a comparator having a first and second input, a first and second sampling capacitor, and a first and second switching circuitry. The first switching circuitry charges the first and second sampling capacitor with an input signal. The second switching circuitry selectively couples the first sampling capacitor with a reference voltage and selectively couples the second sampling capacitor and the first and second input of the comparator to a common voltage. The comparator performs a compare of the input signals against the reference voltage, and outputs a signal.

摘要翻译： 公开了一种开关电容器电路。 开关电容器电路包括具有第一和第二输入，第一和第二采样电容器以及第一和第二开关电路的比较器。 第一开关电路用输入信号对第一和第二采样电容器充电。 第二开关电路选择性地将第一采样电容器与参考电压耦合，并且将第二采样电容器和比较器的第一和第二输入端选择性地耦合到公共电压。 比较器执行输入信号与参考电压的比较，并输出信号。

公开(公告)号：US08134486B2

公开(公告)日：2012-03-13

申请号：US12795225

申请日：2010-06-07

申请人： Fang-Shi Jordan Lai ,  Yung-Fu Lin ,  Kuo-Ming Wang ,  Hsu-Feng Hsueh ,  Cheng Yen Weng

发明人： Fang-Shi Jordan Lai ,  Yung-Fu Lin ,  Kuo-Ming Wang ,  Hsu-Feng Hsueh ,  Cheng Yen Weng

IPC分类号： H03M1/10

CPC分类号： H03M1/1004 ,  H03M1/1057 ,  H03M1/74

摘要： Mechanisms to calibrate a digital to analog converter (DAC) of an SDM (sigma delta modulator) are disclosed. An extra DAC element in addition to the DAC is used to function in place of a DAC element under calibration. A signal (e.g., a random sequence of −1 and +1) is injected to the DAC element under calibration, and the estimated error and compensation are acquired.

摘要翻译： 公开了校准SDM（Σ-Δ调制器）的数模转换器（DAC）的机制。 除了DAC之外还有一个额外的DAC元件用于代替校准下的DAC元件。 在校准下将信号（例如，-1和+1的随机序列）注入DAC元件，并且获得估计的误差和补偿。

公开(公告)号：US08416105B2

公开(公告)日：2013-04-09

申请号：US13029754

申请日：2011-02-17

申请人： Fang-Shi Jordan Lai ,  Chin-Hao Chang ,  Manoj M. Mhala ,  Hsu-Feng Hsueh ,  Yung-Fu Lin ,  Cheng Yen Weng

发明人： Fang-Shi Jordan Lai ,  Chin-Hao Chang ,  Manoj M. Mhala ,  Hsu-Feng Hsueh ,  Yung-Fu Lin ,  Cheng Yen Weng

IPC分类号： H03M1/10

CPC分类号： H03M1/1061 ,  H03M1/361

摘要： An analog-to-digital (ADC) calibration apparatus comprises a calibration buffer, a comparator and a digital calibration block. Each reference voltage is sent to a track-and-hold amplifier as well as the calibration buffer. The comparator compares the output from the track-and-hold amplifier and the output from the calibration buffer and generates a binary number. Based upon a successive approximation method, the digital calibration block finds a correction voltage for ADC offset and nonlinearity compensation. By employing the ADC calibration apparatus, each reference voltage can be calibrated and the corresponding correction voltage can be used to modify the reference voltage during an ADC process.

摘要翻译： 模数（ADC）校准装置包括校准缓冲器，比较器和数字校准块。 每个参考电压被发送到跟踪和保持放大器以及校准缓冲器。 比较器比较跟踪和保持放大器的输出和校准缓冲区的输出，并生成二进制数。 基于逐次逼近方法，数字校准块找到用于ADC偏移和非线性补偿的校正电压。 通过采用ADC校准装置，可以校准每个参考电压，并且可以使用相应的校正电压来修改ADC过程中的参考电压。

公开(公告)号：US08279097B2

公开(公告)日：2012-10-02

申请号：US12775104

申请日：2010-05-06

申请人： Fang-Shi Jordan Lai ,  Kuo-Ming Wang ,  Hsu-Feng Hsueh ,  Cheng Yen Weng ,  Yung-Fu Lin

发明人： Fang-Shi Jordan Lai ,  Kuo-Ming Wang ,  Hsu-Feng Hsueh ,  Cheng Yen Weng ,  Yung-Fu Lin

IPC分类号： H03M1/10

CPC分类号： H03M1/1042 ,  H03M1/1004 ,  H03M1/168

摘要： A method of operating an analog-to-digital converter (ADC) includes providing the ADC including a plurality of stages, each including an operational amplifier, and a first capacitor and a second capacitor including a first input end and a second input end, respectively. Each of the first capacitor and the second capacitor includes an additional end connected to a same input of the operational amplifier. The method further includes performing a plurality of signal conversions. Each of the signal conversions includes, in an amplifying phase of one of the plurality of stages, applying a first voltage to the first input end of the one of the plurality of stages, randomly selecting a second voltage from two different voltages; and applying the second voltage to the second input end of the one of the plurality of stages.

摘要翻译： 一种操作模数转换器（ADC）的方法包括提供包括多个级的ADC，每个级分别包括运算放大器，以及分别包括第一输入端和第二输入端的第一电容器和第二电容器 。 第一电容器和第二电容器中的每一个包括连接到运算放大器的相同输入端的附加端。 该方法还包括执行多个信号转换。 每个信号转换在多级中的一个级的放大阶段中包括将第一电压施加到多级中的一级的第一输入端，从两个不同电压随机选择第二电压; 以及将所述第二电压施加到所述多个级中的所述一个级的所述第二输入端。

公开(公告)号：US20110037632A1

公开(公告)日：2011-02-17

申请号：US12844150

申请日：2010-07-27

申请人： Fang-Shi Jordan LAI ,  Kuo-Ming WANG ,  Hsu-Feng HSUEH ,  Cheng Yen WENG ,  Yung-Fu LIN

发明人： Fang-Shi Jordan LAI ,  Kuo-Ming WANG ,  Hsu-Feng HSUEH ,  Cheng Yen WENG ,  Yung-Fu LIN

IPC分类号： H03M1/10

CPC分类号： H03M1/1009 ,  H03M1/1004 ,  H03M1/365

摘要： An analog to digital convertor (ADC) includes a plurality of comparators one of which is referred to as an auxiliary comparator (e.g., comparator “Aux”). This comparator Aux is calibrated in the background while other comparators function as usual. Once having been calibrated, the comparator Aux replaces a first comparator, which becomes a new comparator Aux, is calibrated, and replaces the second comparator. This second comparator becomes the new comparator Aux, is calibrated, and replaces the third comparator, etc., until all comparators are calibrated. In effect, at any one point in time, a comparator may be calibrated as desire while other comparators and thus the ADC are operating as usual.

摘要翻译： 模数转换器（ADC）包括多个比较器，其中之一被称为辅助比较器（例如，比较器“Aux”）。 该比较器Aux在后台校准，而其他比较器的功能如常。 一旦被校准，比较器Aux将替换成为新的比较器Aux的第一比较器，并且替换第二比较器。 第二个比较器成为新的比较器Aux，被校准，并替换第三个比较器等，直到所有的比较器被校准。 实际上，在任何一个时间点，可以根据需要对比较器进行校准，而其他比较器因此ADC正常运行。