公开(公告)号：US20120153237A1

公开(公告)日：2012-06-21

申请号：US13392310

申请日：2010-08-26

申请人： Youn-Woo Hong ,  Hyo-Soon Shin ,  Don-Hun Yeo ,  Sang-Sub Roh ,  Kyung-Pyo Hong ,  Jun-Hwan Jeong

发明人： Youn-Woo Hong ,  Hyo-Soon Shin ,  Don-Hun Yeo ,  Sang-Sub Roh ,  Kyung-Pyo Hong ,  Jun-Hwan Jeong

IPC分类号： H01B1/02 ,  H01B1/00

CPC分类号： C04B35/453 ,  C04B35/6261 ,  C04B35/6262 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3217 ,  C04B2235/3227 ,  C04B2235/3241 ,  C04B2235/3244 ,  C04B2235/3277 ,  C04B2235/3284 ,  C04B2235/442 ,  C04B2235/6025 ,  C04B2235/656 ,  C04B2235/6567 ,  C04B2235/72 ,  C04B2235/77

摘要： Disclosed herein is a ZnO-based varistor composition including zinc oxide (ZnO) as a main component and a calcium (Ca)-containing compound as an accessory component. The varistor composition provides excellent electrostatic discharge (ESD) characteristics because it has excellent physical properties, such as a nonlinear coefficient, a clamping voltage ratio, a surge absorbance and the like, and, particularly, does not include Bi2O3. Further, the varistor composition provides high work safety because it does not include Sb2O3 that is regulated for environmental purposes. Further, the varistor composition can reduce the manufacturing cost of a varistor because it does not Pr-based components that require high-temperature sintering and increase the manufacturing cost of a varistor. Particularly, the varistor composition has a low clamping voltage as well as a low capacitance.

摘要翻译： 本发明公开了以氧化锌（ZnO）为主要成分和含钙（Ca）的化合物作为辅助成分的ZnO系非线性电阻组合物。 由于具有优异的物理性能，例如非线性系数，钳位电压比，浪涌吸光度等，所以非线性电阻组合物提供优异的静电放电（ESD）特性，特别是不包括Bi 2 O 3。 此外，可变电阻组合物提供高的工作安全性，因为它不包括被调节用于环境目的的Sb 2 O 3。 此外，由于不具有需要高温烧结的基于Pr的部件并增加压敏电阻的制造成本，所以可变压敏电阻组合物可以降低变阻器的制造成本。 特别地，压敏电阻组合物具有低钳位电压以及低电容。

公开(公告)号：US07251119B2

公开(公告)日：2007-07-31

申请号：US11272893

申请日：2005-11-15

申请人： Hyoung Ho Kim ,  Hyo Soon Shin ,  Ho Sung Choo

发明人： Hyoung Ho Kim ,  Hyo Soon Shin ,  Ho Sung Choo

IPC分类号： H01G4/06 ,  H01G4/005

CPC分类号： H01G4/232 ,  H01G4/012 ,  Y10T29/413 ,  Y10T29/417 ,  Y10T29/435

摘要： A multilayer chip capacitor, and a method for manufacturing the same are provided. The capacitor includes a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.

摘要翻译： 提供了一种多层片状电容器及其制造方法。 电容器包括：电容器体，其具有堆叠的多个电介质层;形成在电介质层上的多个第一和第二内部电极，每个内部电极包括主电极部分和引线部分，形成芯片保护侧部件 在电容器本体的两侧接触第一和第二内部电极的两侧，以及形成在电容器本体的外表面上的一对外部电极。 主电极部的宽度与电介质层的宽度相同，引线部的宽度小于电介质层的宽度。

公开(公告)号：US20060010632A1

公开(公告)日：2006-01-19

申请号：US10537910

申请日：2003-03-26

申请人： Hyo-Soon Shin

发明人： Hyo-Soon Shin

IPC分类号： A46B3/00

CPC分类号： A46B9/021 ,  A45D34/042 ,  A45D2033/001 ,  A46B2200/1046

摘要： The present invention relates to a cosmetic applicator. The cosmetic applicator comprises a rod and a brush. The applicator is formed with a fixing portion pressed to be flat at a lower end of the rod into which the brush is fixedly inserted. Since the brush has a flat face defined by the fixing portion, a region that requires delicate operation can be easily cosmeticized. Further, even when the brush is caused to enter and be withdrawn from a container with a small mouth, it is possible to prevent the brush from being curved outward or bristles of the brush from being entangled. Moreover, since the fixing portion is formed in the rod itself, there is no need for an additional means for making the brush in a flattened shape. Thus, the number of components for the cosmetic applicator can be reduced while an effect of application of cosmetics is further improved. Accordingly, production costs of the cosmetic applicator can be lowered and productivity thereof can also be enhanced.

摘要翻译： 本发明涉及一种化妆品涂抹器。 化妆品涂抹器包括杆和刷子。 涂抹器形成有固定部分，该固定部分在固定插入刷子的杆的下端被压制成平坦的。 由于刷子具有由固定部分限定的平坦面，因此可以容易地整理需要精细操作的区域。 此外，即使当刷子进入并从具有小口的容器中取出时，也可以防止刷子向外弯曲或刷子的刷毛缠结。 此外，由于固定部分形成在杆本身中，因此不需要用于使刷子成扁平形状的附加装置。 因此，可以减少化妆品涂抹器的部件数量，同时进一步提高化妆品的使用效果。 因此，可以降低化妆品涂抹器的生产成本，并且还可以提高其生产率。

公开(公告)号：US20090314419A1

公开(公告)日：2009-12-24

申请号：US12550178

申请日：2009-08-28

申请人： Seung Hyun SOHN ,  Hyo-Soon Shin

发明人： Seung Hyun SOHN ,  Hyo-Soon Shin

IPC分类号： B32B37/00 ,  B05D5/12

CPC分类号： B32B7/04 ,  H05K1/0233 ,  H05K1/024 ,  H05K1/162 ,  H05K3/386 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0254 ,  H05K2201/0355 ,  H05K2201/086 ,  H05K2201/09309 ,  Y10T428/24917 ,  Y10T428/249994 ,  Y10T428/256

摘要： A printed circuit board material for embedded passive devices, which has excellent electromagnetic properties and reliability is provided. The invention provides a printed circuit board material comprises: a conductive copper foil layer; a resin bonding layer formed on the conductive layer and including above 70-100 vol % of resin and 0-30 vol % of filler; and a functional layer formed on the resin bonding layer and including resin and filler. The printed circuit board material has the resin bonding layer interposed between the copper foil layer and the functional layer. Thus, even when the content of fillers in the functional layer is increased, the adhesion strength between the conductive layer and the functional layer is ensured without deteriorating the properties of the functional layer, such as dielectric and magnetic properties.

摘要翻译： 提供了一种具有优异的电磁特性和可靠性的嵌入式无源器件印刷电路板材料。 本发明提供一种印刷电路板材料，包括：导电铜箔层; 形成在导电层上的树脂粘结层，包括70-100体积％的树脂和0-30体积％的填料; 以及形成在树脂粘合层上并包括树脂和填料的功能层。 印刷电路板材料具有插入在铜箔层和功能层之间的树脂粘合层。 因此，即使功能层中的填料的含量增加，也可以确保导电层与功能层之间的粘合强度，而不会劣化功能层的性质，例如电介质和磁性。

公开(公告)号：US07374467B2

公开(公告)日：2008-05-20

申请号：US10923851

申请日：2004-08-24

申请人： Hyo Soon Shin

发明人： Hyo Soon Shin

IPC分类号： H01J63/04

CPC分类号： B82Y10/00 ,  H01J9/025 ,  H01J2329/00

摘要： A method for fabricating a field emitter electrode includes the steps of: providing an electrolytic solution containing metal ions to an electrolytic bath; providing carbon nanotubes and a cationic dispersant for preventing the agglomeration of the carbon nanotubes to the electrolytic solution; and applying a predetermined voltage to a cathode drum and an insoluble anodic compartment, both of which are immersed in the electrolytic solution, and forming a metal film containing the carbon nanotubes along the surface of the cathode drum.

摘要翻译： 一种场致发射电极的制造方法，其特征在于，包括：向电解槽提供含有金属离子的电解液; 提供碳纳米管和阳离子分散剂，用于防止碳纳米管与电解液的结合; 并将预定的电压施加到阴极鼓和不溶性阳极室，两者都浸没在电解溶液中，并且沿着阴极鼓的表面形成含有碳纳米管的金属膜。

公开(公告)号：US07079374B1

公开(公告)日：2006-07-18

申请号：US11169570

申请日：2005-06-30

申请人： Kyeong Ho Kim ,  Dong Sook Sinn ,  Tae Young Kim ,  Hyo Soon Shin ,  Soon Mo Song ,  Ic Seob Kim

发明人： Kyeong Ho Kim ,  Dong Sook Sinn ,  Tae Young Kim ,  Hyo Soon Shin ,  Soon Mo Song ,  Ic Seob Kim

IPC分类号： H01G4/06 ,  H01G4/20 ,  C04B35/46 ,  C04B35/48

CPC分类号： H01G4/105 ,  C03C3/064 ,  C03C8/02 ,  C04B35/49 ,  C04B2235/3208 ,  C04B2235/3262 ,  C04B2235/365 ,  H01G4/0085 ,  H01G4/30

摘要： A glass frit for dielectrics, a dielectric ceramic composition, a multilayer ceramic capacitor, and a method for manufacturing the same are disclosed. The glass frit has a composition represented by the formula aSiO2-bB2O3-cLi2O-dK2O-eCaO-fAl2O3-gTiO2-hZrO2, wherein the ratio of components satisfies the conditions of 20≦a≦35, 20≦b≦35, 20≦c≦30, 3≦d≦5, 2≦e≦12, 2≦f≦10, 1≦g≦12 and 1≦h≦7 in terms of mol % where a+b+c+d+e+f+g+h=100. The dielectric ceramic composition comprises 100 parts by weight of (Ca1-xRx)(Zr1-yTiy)O3, 0.5˜2.5 parts by weight of the glass frit, and 1.0˜5.0 parts by weight of a Mn compound. Additionally, the multilayer ceramic capacitor, and the method for manufacturing the same also use the glass frit having the above composition. The ratio of tetracoordinate boron to tricoordinate boron is increased in a lithium borosilicate glass, thereby enhancing structural property, and the components of Al2O3, TiO2 and ZrO2, enhance acid resistance.

摘要翻译： 公开了一种电介质玻璃料，介电陶瓷组合物，多层陶瓷电容器及其制造方法。 所述玻璃料具有式aSiO 2-b B 2 O 3 -cLi 2 O 2 O- dK 2 O-eCaO-fAl 2 O 3 -gTiO 2 -hZrO 2 ，其中组分的比例满足20≤a≤35，20≤b≤35,20,20≤c≤30,3≤d≤5,2=e≤12的条件 其中a + b + c + d + e + f + g + h = 100，以摩尔％表示，2 <= f <= 10,1 <= g <= 12和1 <= h <= 7。 电介质陶瓷组合物包含100重量份的（Ca 1-x N R x x）（Zr 1-y）Ti y / 3> O 3，0.5〜2.5重量份的玻璃料和1.0〜5.0重量份的Mn化合物。 此外，多层陶瓷电容器及其制造方法也使用具有上述组成的玻璃料。 在硼硅酸锂玻璃中四配位硼与三配位硼的比例增加，从而提高结构性能，并且将Al 2 N 3 O 3，TiO 2， / SUB和ZrO 2，提高耐酸性。

公开(公告)号：US20050258737A1

公开(公告)日：2005-11-24

申请号：US10923851

申请日：2004-08-24

申请人： Hyo Soon Shin

发明人： Hyo Soon Shin

IPC分类号： H01J63/06 ,  H01J1/02 ,  H01J1/304 ,  H01J9/02

CPC分类号： B82Y10/00 ,  H01J9/025 ,  H01J2329/00

摘要： Disclosed herein is a method for fabricating a field emitter electrode. The method comprises the steps of: providing an electrolytic solution containing metal ions to an electrolytic bath; providing carbon nanotubes and a cationic dispersant for preventing the agglomeration of the carbon nanotubes to the electrolytic solution; and applying a predetermined voltage to a cathode drum and an insoluble anodic compartment, both of which are immersed in the electrolytic solution, and forming a metal film containing the carbon nanotubes along the surface of the cathode drum.

摘要翻译： 这里公开了一种用于制造场致发射极的方法。 该方法包括以下步骤：向电解槽提供含有金属离子的电解液; 提供碳纳米管和阳离子分散剂，用于防止碳纳米管与电解液的结合; 并将预定的电压施加到阴极鼓和不溶性阳极室，两者都浸没在电解溶液中，并且沿着阴极鼓的表面形成含有碳纳米管的金属膜。

公开(公告)号：US07644480B2

公开(公告)日：2010-01-12

申请号：US11822189

申请日：2007-07-03

申请人： Hyoung Ho Kim ,  Hyo Soon Shin ,  Ho Sung Choo

发明人： Hyoung Ho Kim ,  Hyo Soon Shin ,  Ho Sung Choo

IPC分类号： H01G4/005

CPC分类号： H01G4/232 ,  H01G4/012 ,  Y10T29/413 ,  Y10T29/417 ,  Y10T29/435

摘要： A method for manufacturing a multilayer chip capacitor includes: forming screen patterns on mother green sheets such that a widthwise margin is not formed on the mother green sheets, the screen patterns are spaced apart from each other in the width direction and the longitudinal direction, and a width of each screen pattern is greater than a spacing between the adjacent screen patterns; forming internal electrode patterns on the mother green sheets; forming a stack of the mother green sheets; forming a capacitor body having internal electrodes by cutting the stack of the mother green sheets along cutting lines arranged in the width direction and the longitudinal direction; forming chip-protecting side members on both sides of the capacitor body such that the chip-protecting side members contact both sides of the internal electrodes, respectively; and forming a pair of terminal electrodes on the outer surface of the capacitor body.

摘要翻译： 一种多层片式电容器的制造方法，其特征在于，在母版本上形成屏幕图案，使得母版未形成宽度方向的边缘，屏幕图案在宽度方向和长度方向上彼此间隔开， 每个屏幕图案的宽度大于相邻屏幕图案之间的间距; 在母板上形成内部电极图案; 形成一堆母亲的生页; 通过沿着宽度方向和长度方向布置的切割线切割母版本的叠层来形成具有内部电极的电容器体; 在电容器主体的两侧形成芯片保护侧部件，使得芯片保护侧部件分别接触内部电极的两侧; 以及在电容器主体的外表面上形成一对端子电极。

公开(公告)号：US07531112B2

公开(公告)日：2009-05-12

申请号：US10875323

申请日：2004-06-25

申请人： Hyo Soon Shin ,  Jin Ho Kim ,  Jeong Joo Kim ,  Min Ji Ko

发明人： Hyo Soon Shin ,  Jin Ho Kim ,  Jeong Joo Kim ,  Min Ji Ko

IPC分类号： H01B1/00

CPC分类号： H05K1/162 ,  C08L101/12 ,  H01G4/206 ,  H05K2201/0209 ,  Y10T428/257

摘要： Disclosed is a composition for forming a dielectric, which is applied to an embedded capacitor with a high dielectric constant, a capacitor produced using the composition, and a PCB provided with the capacitor. The composition includes 40 to 99 vol % of thermoplastic or thermosetting resin, and 1 to 60 vol % of semiconductive filler. Alternatively, the composition includes 40 to 95 vol % of thermoplastic or thermosetting resin, and 5 to 60 vol % of semiconductive ferroelectric substance. Furthermore, the present invention provides the capacitor, produced using the composition, and the PCB provided with the capacitor. Therefore, the dielectric, which is produced using the composition including the semiconductive filler or semiconductive ferroelectric substance, is advantageous in that the dielectric constant is high and a dielectric loss is low. The dielectric is usefully applied to produce an embedded capacitor with the high dielectric constant and the PCB provided with the embedded capacitor.

摘要翻译： 公开了一种用于形成电介质的组合物，其被应用于具有高介电常数的嵌入式电容器，使用该组合物制造的电容器和设置有电容器的PCB。 该组合物包含40至99体积％的热塑性或热固性树脂和1至60体积％的半导体填料。 或者，该组合物包含40〜95体积％的热塑性或热固性树脂和5〜60体积％的半导体铁电体。 此外，本发明提供使用该组合物制造的电容器和设置有电容器的PCB。 因此，使用包含半导体填料或半导体铁电体的组合物制造的电介质的优点在于介电常数高，介电损耗低。 电介质有效地应用于制造具有高介电常数的嵌入式电容器和设置有嵌入式电容器的PCB。

公开(公告)号：US07203055B2

公开(公告)日：2007-04-10

申请号：US11011092

申请日：2004-12-15

申请人： Hyo Soon Shin ,  Seung Hyun Ra ,  Yong Suk Kim ,  Hyoung Ho Kim ,  Ho Sung Choo ,  Jung Woo Lee

发明人： Hyo Soon Shin ,  Seung Hyun Ra ,  Yong Suk Kim ,  Hyoung Ho Kim ,  Ho Sung Choo ,  Jung Woo Lee

IPC分类号： H01G4/228

CPC分类号： H01G4/30 ,  H01G4/1227 ,  Y10T29/417 ,  Y10T29/43 ,  Y10T29/435

摘要： Disclosed herein is a method of manufacturing a multilayered ceramic capacitor by a spin coating process, and a multilayered ceramic capacitor obtained by the above method. The method of the current invention provides a plurality of dielectric layers formed by spin coating, in which the process of coating the dielectric layer and the process of printing the inner electrode can be provided as a single process. Therefore, the thickness of the dielectric layer is easily controlled while the dielectric layer is formed to be thin. Further, since the dielectric layers and the inner electrodes are formed successively, the processes of separating and layering the dielectric layers, and the process of compressing the ceramic multilayered body can be omitted. Thereby, the ceramic multilayered body need not be compressed, and thus, a pillowing phenomenon does not occur in the multilayered ceramic capacitor.

摘要翻译： 本文公开了通过旋涂工艺制造多层陶瓷电容器的方法和通过上述方法获得的多层陶瓷电容器。 本发明的方法提供了通过旋涂形成的多个电介质层，其中涂覆介电层的过程和印刷内电极的过程可以作为单一工艺提供。 因此，在电介质层形成得较薄的同时容易控制电介质层的厚度。 此外，由于电介质层和内部电极依次形成，所以可以省略介电层的分离和分层工艺以及压缩陶瓷多层体的工艺。 因此，陶瓷多层体不需要被压缩，因此在多层陶瓷电容器中不会发生卷绕现象。