PHARMACEUTICAL COMPOSITION FOR PREVENTING OR TREATING CANCER
    3.
    发明申请
    PHARMACEUTICAL COMPOSITION FOR PREVENTING OR TREATING CANCER 有权
    用于预防或治疗癌症的药物组合物

    公开(公告)号:US20130108639A1

    公开(公告)日:2013-05-02

    申请号:US13557891

    申请日:2012-07-25

    申请人: Jae-il LEE

    发明人: Jae-il LEE

    IPC分类号: C07K16/46

    摘要: The invention provides a fusion protein comprising (a) a first protein comprising a polypeptide which specifically binds to Annexin A1 and (b) a second protein comprising a polypeptide which induces a cytotoxic activity of a cytotoxic lymphocyte, pharmaceutical compositions comprising the fusion protein, and methods of treating or preventing cancer by administering the pharmaceutical compositions.

    摘要翻译: 本发明提供一种融合蛋白,其包含(a)包含特异性结合膜联蛋白A1的多肽的第一蛋白质和(b)包含诱导细胞毒性淋巴细胞的细胞毒性活性的多肽的第二蛋白质,包含所述融合蛋白的药物组合物和 通过施用药物组合物治疗或预防癌症的方法。

    Nonvolatile Memory Device Capable Of Reducing Read Disturbance And Read Method Thereof
    4.
    发明申请
    Nonvolatile Memory Device Capable Of Reducing Read Disturbance And Read Method Thereof 有权
    非易失性存储器件能够减少读取干扰和读取方法

    公开(公告)号:US20110292726A1

    公开(公告)日:2011-12-01

    申请号:US13117390

    申请日:2011-05-27

    申请人: Jae-il Lee Moon Sone

    发明人: Jae-il Lee Moon Sone

    IPC分类号: G11C16/10 G11C16/06 G11C16/26

    摘要: Provided are a nonvolatile memory device and a read method of the same. The read method applying one of a plurality of unselected read voltages to unselected wordlines adjacent to a selected word line. The voltage applied to the unselected word lines being based on which of a plurality of selected read voltages is applied to the selected wordline.

    摘要翻译: 提供一种非易失性存储器件及其读取方法。 所述读取方法将多个未选择的读取电压中的一个施加到与所选择的字线相邻的未选择的字线。 施加到未选字线的电压基于多个选择的读取电压中的哪一个被施加到所选择的字线。

    Automatic test equipment capable of high speed test
    5.
    发明申请
    Automatic test equipment capable of high speed test 有权
    自动测试设备能够进行高速测试

    公开(公告)号:US20080204066A1

    公开(公告)日:2008-08-28

    申请号:US12072444

    申请日:2008-02-26

    IPC分类号: G01R31/26

    摘要: Automatic test equipment is capable of performing a high-speed test of semiconductor devices, with a low cost and high efficiency. The automatic test equipment (ATE) comprises: an ATE body configured to electrically test semiconductor devices; a field programmable gate array (FPGA) controlling drivers and comparators on the ATE; an accelerator connected to an output terminal of the FPGA and that doubles an operating frequency of the FPGA; and a decelerator connected to an output terminal of the FPGA and that converts an operating frequency of data transferred from the semiconductor device to the operating frequency of the FPGA.

    摘要翻译: 自动测试设备能够以低成本和高效率对半导体器件进行高速测试。 自动测试设备(ATE)包括:ATE主体,被配置为电测试半导体器件; 控制ATE上的驱动器和比较器的现场可编程门阵列(FPGA); 连接到FPGA的输出端的加速器,使FPGA的工作频率加倍; 以及连接到FPGA的输出端子并将从半导体器件传送的数据的工作频率转换为FPGA的工作频率的减速器。

    STORAGE MEDIUM, MEMORY SYSTEM, AND METHOD OF MANAGING STORAGE AREA IN MEMORY SYSTEM
    7.
    发明申请
    STORAGE MEDIUM, MEMORY SYSTEM, AND METHOD OF MANAGING STORAGE AREA IN MEMORY SYSTEM 审中-公开
    存储介质,存储系统和存储系统中存储区域的管理方法

    公开(公告)号:US20160011971A1

    公开(公告)日:2016-01-14

    申请号:US14751800

    申请日:2015-06-26

    IPC分类号: G06F12/02

    摘要: A method of managing a storage area of a memory device in a memory system is provided. A first data is received. The first data has a logical address to be written to the memory device having a plurality of memory blocks. The first data is classified into one of a hot data and a cold data based on an update frequency of the first data. A memory block is defined into a first storage area and a second storage area based on an amount of charge loss of a memory cell in the memory block. A memory cell of the first storage area has charge loss greater than a memory cell of the second storage area. The logical address of the first data is converted to a physical address of the memory device according to a result of the classifying of the first data. The first data is written to a memory cell having the physical address of the memory device.

    摘要翻译: 提供一种管理存储器系统中存储器件的存储区域的方法。 收到第一个数据。 第一数据具有要写入具有多个存储块的存储器件的逻辑地址。 基于第一数据的更新频率,将第一数据分类为热数据和冷数据之一。 存储器块基于存储器块中的存储器单元的电荷损耗量被定义到第一存储区域和第二存储区域中。 第一存储区域的存储单元的电荷损耗大于第二存储区域的存储单元。 根据第一数据的分类结果,将第一数据的逻辑地址转换为存储器件的物理地址。 将第一数据写入具有存储器件的物理地址的存储单元。

    Real time monitoring system of spent fuel pool and method thereof
    8.
    发明授权
    Real time monitoring system of spent fuel pool and method thereof 有权
    乏燃料池实时监控系统及其方法

    公开(公告)号:US08957781B2

    公开(公告)日:2015-02-17

    申请号:US13593162

    申请日:2012-08-23

    摘要: A real time monitoring system of a spent fuel pool includes a detection unit configured to detect condition information using a sensor installed in the spent fuel pool; an input storage unit configured to receive and store configuration information of a spent fuel, history information related to burnup, and a normal value and a limit value of current condition information; an operation and determination unit configured to calculate the current condition information of the spent fuel by using the condition information detected by the detection unit and the configuration information and the history information stored in the input storage unit and configured to determine a risk level by comparing the current condition information with the limit value corresponding to the risk level; and a display unit configured to display the current condition information calculated by the operation and determination unit and configured to display the determined risk level.

    摘要翻译: 废燃料池的实时监控系统包括:检测单元,被配置为使用安装在乏燃料池中的传感器来检测状况信息; 输入存储单元,被配置为接收和存储废燃料的配置信息,与燃耗相关的历史信息,以及当前状况信息的正常值和极限值; 操作确定单元,被配置为通过使用由检测单元检测到的条件信息和存储在输入存储单元中的配置信息和历史信息来计算废燃料的当前状况信息,并且被配置为通过比较 当前状况信息与限制值对应的风险等级; 以及显示单元,被配置为显示由所述操作和确定单元计算出的并且被配置为显示所确定的风险水平的当前状况信息。

    Connecting unit to test semiconductor chips and apparatus to test semiconductor chips having the same
    9.
    发明授权
    Connecting unit to test semiconductor chips and apparatus to test semiconductor chips having the same 有权
    连接单元以测试半导体芯片和设备以测试具有相同的半导体芯片

    公开(公告)号:US08482308B2

    公开(公告)日:2013-07-09

    申请号:US12614504

    申请日:2009-11-09

    IPC分类号: G01R31/00 G01R31/28

    CPC分类号: G01R31/2886 G01R1/0408

    摘要: A connecting unit to test a semiconductor chip and an apparatus to test the semiconductor chip having the same include a plurality of connectors, on which a semiconductor chip having a certain pattern of electrical connection terminals, having a plurality of holes, cables configured to electrically connect the electrical connection terminals to the exterior, and coupling units configured to selectively electrically connect the cables to the electrical connection terminals through the holes. Therefore, it is possible to perform electrical tests of semiconductor chips having various patterns of electrical connection terminals and receive the semiconductor chips in a tray at a time.

    摘要翻译: 用于测试半导体芯片的连接单元和用于测试具有该连接器的半导体芯片的装置包括多个连接器,其上具有一定形式的电连接端子的半导体芯片具有多个孔,电缆被配置为电连接 电连接端子到外部,以及耦合单元,其被配置成选择性地将电缆电连接到电连接端子上。 因此,可以对具有各种电连接端子的图案的半导体芯片进行电气测试,并且一次接收托盘中的半导体芯片。