公开(公告)号：US4690833A

公开(公告)日：1987-09-01

申请号：US845316

申请日：1986-03-28

申请人： William A. Donson ,  James V. Ellerson ,  Richard B. Hammer ,  William Lafer ,  Keith A. Snyder

发明人： William A. Donson ,  James V. Ellerson ,  Richard B. Hammer ,  William Lafer ,  Keith A. Snyder

IPC分类号： H05K3/06 ,  G03F7/26 ,  H05K1/00 ,  H05K3/00 ,  H05K3/12 ,  H05K3/38 ,  B05D5/12

CPC分类号： H05K3/0079 ,  H05K1/0284 ,  H05K2201/09018 ,  H05K2203/0588 ,  H05K2203/0723 ,  H05K2203/0759 ,  H05K3/064 ,  H05K3/1216 ,  H05K3/388

摘要： A process for providing circuit lines on a substrate having a non-planar surface is provided. The process includes applying a layer of photoresist material to the substrate, selectively screen printing on non-planar areas of the substrate a screen-printable coating, photoprocessing the layer of photoresist material, and providing electrical conductive pattern on the substrate.

摘要翻译： 提供了一种在具有非平面表面的基板上提供电路线的工艺。 该方法包括将光致抗蚀剂材料层施加到衬底上，在衬底的非平面区域上选择性地丝网印刷可屏幕印刷的涂层，对光致抗蚀剂材料层进行光学处理，以及在衬底上提供导电图案。

公开(公告)号：US5469333A

公开(公告)日：1995-11-21

申请号：US252488

申请日：1994-06-01

申请人： James V. Ellerson ,  Richard J. Noreika ,  Jack A. Varcoe

发明人： James V. Ellerson ,  Richard J. Noreika ,  Jack A. Varcoe

IPC分类号： H05K3/28 ,  H05K3/34 ,  H05K13/00 ,  H05K7/06 ,  H01L21/58 ,  H01L23/28

CPC分类号： H05K3/284 ,  H05K3/3421 ,  H01L2924/0002 ,  H05K2201/10689 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49146

摘要： An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board). The assembly's projecting conductive leads are soldered. An encapsulant material (e.g., polymer resin) is used to provide reinforcement for the solder-lead connections, the encapsulant material being dispensed only along opposing sides of the package's housing which do not include projecting leads (and which are oriented substantially normal to the stresses imposed on the package during operation wherein high temperatures are attained). This dispensing may follow solder reflow and solidification. The invention is particularly useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.

摘要翻译： 一种电子封装组件，其中将低外形封装焊接到有机（例如环氧树脂）衬底（例如印刷电路板）上。 组件的突出导电引线被焊接。 密封剂材料（例如聚合物树脂）用于为焊料 - 引线连接提供增强，所述密封剂材料仅沿着封装壳体的相对侧分配，其不包括突出引线（并且基本上垂直于应力 在实现高温的操作期间施加在包装上）。 该分配可以遵循焊料回流和固化。 本发明对于在衬底表面上占据最小高度的薄的小外形封装（TSOP）结构特别有用。

公开(公告)号：US5252179A

公开(公告)日：1993-10-12

申请号：US951614

申请日：1992-09-28

申请人： James V. Ellerson ,  Louis J. Konrad, III ,  Ronald J. Moore ,  Jack A. Varcoe

发明人： James V. Ellerson ,  Louis J. Konrad, III ,  Ronald J. Moore ,  Jack A. Varcoe

IPC分类号： H01L21/00 ,  B44C1/22 ,  B29C37/00

CPC分类号： H01L21/67126 ,  H01L21/67075 ,  H01L21/6708

摘要： A method and apparatus for selectively spray etching an epoxy encapsulated chip which is mounted to a chip carrier without damage to the chip, the chip carrier or other closely mounted chips. The apparatus includes a diaphragm which can be raised and lowered to direct the flow of etchant solution at the encapsulating material located alongside and under the chip. The encapsulating material is removed from the chip without removing the chip from the chip carrier.

摘要翻译： 一种用于选择性地喷涂蚀刻环氧树脂封装芯片的方法和装置，其安装到芯片载体上而不损坏芯片，芯片载体或其他紧密安装的芯片。 该装置包括可以升高和降低以将蚀刻剂溶液的流动引导到位于芯片旁边和下方的封装材料的隔膜。 从芯片上移除封装材料，而不从芯片载体上移除芯片。

公开(公告)号：US5553769A

公开(公告)日：1996-09-10

申请号：US445382

申请日：1995-05-19

申请人： James V. Ellerson ,  Joseph Funari ,  Jack A. Varcoe

发明人： James V. Ellerson ,  Joseph Funari ,  Jack A. Varcoe

IPC分类号： H01L21/56 ,  H01L21/60 ,  H05K3/30 ,  H05K3/34 ,  H01L21/50

CPC分类号： H05K3/3436 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/1132 ,  H01L2224/131 ,  H01L2224/13113 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/27438 ,  H01L2224/29011 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1579 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K3/305 ,  H05K3/3431 ,  H05K3/3452 ,  H05K3/3463 ,  Y02P70/613

摘要： Solder interconnection for forming connections between an integrated semiconductor device and a carrier substrate is provided. Located on the carrier substrate are electrodes and located between the electrodes and integrated semiconductor device are solder connections that have a relatively low melting point such that when the device is in operation, the solder connection will liquify thereby permitting expansion compensation between the substrate and semiconductor device.

公开(公告)号：US5414928A

公开(公告)日：1995-05-16

申请号：US42196

申请日：1993-04-02

申请人： Barry A. Bonitz ,  James V. Ellerson ,  Kishen N. Kapur ,  Jack M. McCreary ,  Irving Memis ,  Gerald M. Vettel

发明人： Barry A. Bonitz ,  James V. Ellerson ,  Kishen N. Kapur ,  Jack M. McCreary ,  Irving Memis ,  Gerald M. Vettel

IPC分类号： H01L23/50 ,  H01L23/04 ,  H05K1/18 ,  H05K3/28 ,  H05K3/34 ,  H05K13/00

CPC分类号： H05K3/284 ,  H05K3/3421 ,  H01L2224/48247 ,  H01L2224/48472 ,  H05K2201/10689 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49146

摘要： An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board), the projecting conductive leads of the package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with encapsulant material (e.g., polymer resin) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder. The invention has particular useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.

摘要翻译： 一种电子封装组件，其中低剖面封装焊接到有机（例如环氧树脂）衬底（例如，印刷电路板）上，封装的突出导电引线和基本上覆盖这些引线的各个导体 基底）基本上被密封剂材料（例如，聚合物树脂）覆盖，以提供焊锡引线连接的加强。 在焊料回流和固化之后，密封剂材料围绕焊料和引线接头分配，以便基本上围绕焊料，并且引线的任何部分未被焊料覆盖。 本发明对于在衬底表面上占据最小高度的薄的小外形封装（TSOP）结构特别有用。