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公开(公告)号：US20130273691A1
公开(公告)日：2013-10-17
申请号：US13445550
申请日：2012-04-12
申请人： Daniel PASCUAL , Jeremiah HEBDING , Megha RAO , Colin McDONOUGH , Douglas Duane COOLBAUGH , Joseph PICCIRILLO, JR. , Michael LIEHR
发明人： Daniel PASCUAL , Jeremiah HEBDING , Megha RAO , Colin McDONOUGH , Douglas Duane COOLBAUGH , Joseph PICCIRILLO, JR. , Michael LIEHR
IPC分类号： H01L21/50 , B23K37/04 , H01L21/762
CPC分类号： B23K1/0016 , B23K1/20 , B23K3/087 , B23K2101/42 , H01L21/6835 , H01L24/08 , H01L24/80 , H01L24/94 , H01L24/97 , H01L2221/68313 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/0401 , H01L2224/08146 , H01L2224/75315 , H01L2224/7532 , H01L2224/7598 , H01L2224/80004 , H01L2224/80203 , H01L2224/80205 , H01L2224/80357 , H01L2224/80801 , H01L2224/80895 , H01L2224/80986 , H01L2224/81191 , H01L2224/81201 , H01L2224/81898 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L2224/81 , H01L2924/00014 , H01L2224/80 , H01L2924/00
摘要： A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.
摘要翻译： 提供了一种用于将管芯结合到基底技术晶片的方法，包括：提供具有前部，后部，至少一个侧面和至少一个TSV的器件晶片，其中所述背面包含衬底材料; 提供具有前，后和至少一侧的载体晶片; 使用粘合剂粘合晶片; 从器件晶片的背面去除衬底材料和湿蚀刻，以暴露至少一个金属化方案特征; 处理器件晶片的背面以创建至少一个背面再分布层; 从载体晶片去除器件晶片; 将器件晶片切割成单个管芯; 提供基础技术晶圆; 用牺牲粘合剂涂覆基底技术晶片的前部; 将单个模具的前部放置在基底技术晶片的前部; 并将单个管芯结合到基底技术晶片。
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公开(公告)号：US08969200B2
公开(公告)日：2015-03-03
申请号：US13445636
申请日：2012-04-12
申请人： Jeremiah Hebding , Megha Rao , Colin McDonough , Matthew Smalley , Douglas Duane Coolbaugh , Joseph Piccirillo, Jr. , Stephen G. Bennett , Michael Liehr , Daniel Pascual
发明人： Jeremiah Hebding , Megha Rao , Colin McDonough , Matthew Smalley , Douglas Duane Coolbaugh , Joseph Piccirillo, Jr. , Stephen G. Bennett , Michael Liehr , Daniel Pascual
IPC分类号： H01L21/44
CPC分类号： H01L25/0652 , H01L21/76229 , H01L21/768 , H01L21/76802 , H01L21/76898 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/80 , H01L24/94 , H01L25/50 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/06181 , H01L2224/08145 , H01L2224/131 , H01L2224/80097 , H01L2224/80203 , H01L2224/80205 , H01L2224/80895 , H01L2224/9205 , H01L2224/94 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2924/1461 , H01L2924/014 , H01L2924/00014 , H01L2224/80 , H01L2924/00
摘要： An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.
摘要翻译： 提供了一种在设备接触处理之前将TSV集成到设备中的装置和方法。 该装置包括半导体层; 安装在半导体层的顶表面上的一个或多个CMOS器件; 集成到器件晶片的半导体层中的一个或多个TSV; 在TSV上施加至少一个金属层; 以及安装在所述至少一个金属层的顶层上的一个或多个接合焊盘，其中所述至少一个金属层被布置成能够将所述一个或多个接合焊盘放置在用于结合到第二器件晶片的指定位置。 该方法包括获得半导体材料晶片，在晶片上进行线前处理; 在晶片中提供一个或多个TSV; 在晶片上进行中间线处理; 并在晶片上执行线路处理的后端。
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公开(公告)号：US08697542B2
公开(公告)日：2014-04-15
申请号：US13445550
申请日：2012-04-12
申请人： Daniel Pascual , Jeremiah Hebding , Megha Rao , Colin McDonough , Douglas Duane Coolbaugh , Joseph Piccirillo, Jr. , Michael Liehr
发明人： Daniel Pascual , Jeremiah Hebding , Megha Rao , Colin McDonough , Douglas Duane Coolbaugh , Joseph Piccirillo, Jr. , Michael Liehr
CPC分类号： B23K1/0016 , B23K1/20 , B23K3/087 , B23K2101/42 , H01L21/6835 , H01L24/08 , H01L24/80 , H01L24/94 , H01L24/97 , H01L2221/68313 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/0401 , H01L2224/08146 , H01L2224/75315 , H01L2224/7532 , H01L2224/7598 , H01L2224/80004 , H01L2224/80203 , H01L2224/80205 , H01L2224/80357 , H01L2224/80801 , H01L2224/80895 , H01L2224/80986 , H01L2224/81191 , H01L2224/81201 , H01L2224/81898 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L2224/81 , H01L2924/00014 , H01L2224/80 , H01L2924/00
摘要： A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.
摘要翻译： 提供了一种用于将管芯结合到基底技术晶片的方法，包括：提供具有前部，后部，至少一个侧面和至少一个TSV的器件晶片，其中所述背面包含衬底材料; 提供具有前，后和至少一侧的载体晶片; 使用粘合剂粘合晶片; 从器件晶片的背面去除衬底材料和湿蚀刻，以暴露至少一个金属化方案特征; 处理器件晶片的背面以创建至少一个背面再分布层; 从载体晶片去除器件晶片; 将器件晶片切割成单个管芯; 提供基础技术晶圆; 用牺牲粘合剂涂覆基底技术晶片的前部; 将单个模具的前部放置在基底技术晶片的前部; 并将单个管芯结合到基底技术晶片。
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公开(公告)号：US20130270711A1
公开(公告)日：2013-10-17
申请号：US13445636
申请日：2012-04-12
申请人： Jeremiah HEBDING , Megha RAO , Colin McDONOUGH , Matthew SMALLEY , Douglas Duane COOLBAUGH , Joseph PICCIRILLO, JR. , Stephen G. BENNETT , Michael LIEHR , Daniel PASCUAL
发明人： Jeremiah HEBDING , Megha RAO , Colin McDONOUGH , Matthew SMALLEY , Douglas Duane COOLBAUGH , Joseph PICCIRILLO, JR. , Stephen G. BENNETT , Michael LIEHR , Daniel PASCUAL
IPC分类号： H01L23/538 , H01L21/762 , H01L21/50 , H01L21/768
CPC分类号： H01L25/0652 , H01L21/76229 , H01L21/768 , H01L21/76802 , H01L21/76898 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/80 , H01L24/94 , H01L25/50 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/06181 , H01L2224/08145 , H01L2224/131 , H01L2224/80097 , H01L2224/80203 , H01L2224/80205 , H01L2224/80895 , H01L2224/9205 , H01L2224/94 , H01L2224/97 , H01L2225/06524 , H01L2225/06541 , H01L2924/1461 , H01L2924/014 , H01L2924/00014 , H01L2224/80 , H01L2924/00
摘要： An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.
摘要翻译： 提供了一种在设备接触处理之前将TSV集成到设备中的装置和方法。 该装置包括半导体层; 安装在半导体层的顶表面上的一个或多个CMOS器件; 集成到器件晶片的半导体层中的一个或多个TSV; 在TSV上施加至少一个金属层; 以及安装在所述至少一个金属层的顶层上的一个或多个接合焊盘，其中所述至少一个金属层被布置成能够将所述一个或多个接合焊盘放置在用于结合到第二器件晶片的指定位置。 该方法包括获得半导体材料晶片，在晶片上进行线前处理; 在晶片中提供一个或多个TSV; 在晶片上进行中间线处理; 并在晶片上执行线路处理的后端。
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