公开(公告)号：US5063166A

公开(公告)日：1991-11-05

申请号：US506051

申请日：1990-04-09

Applicant: John B. Mooney ,  Arden Sher

Inventor： John B. Mooney ,  Arden Sher

IPC: H01L21/20

CPC classification number: H01L21/02439 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02658 ,  Y10S148/015 ,  Y10S148/155 ,  Y10S438/938

Abstract: A low dislocation density semiconductor device includes a first semiconductor layer of a III-V or II-VI semiconductor compound and alloying atoms on a non-metal substrate. The semiconductor compound usually has a large dislocation density. A predetermined position of the alloying atoms in the compound lattice structure can substantially reduce the compound dislocation density. Energy is applied to the alloying atoms so they are at the predetermined positions. The number of alloying atoms causes the semiconductor compound solubility limit to be exceeded. The layer is formed on a substrate of the III-V or II-VI semiconductor, such as gallium arsenide or another semiconductor, such as silicon or on an insulator such as sapphire. In the latter cases, the layer is formed on an intermediate layer having a lattice constant between that of the substrate and semiconductor compound. A second layer is epitaxially deposited on the first layer so both layers have virtually the same lattice constant and dislocation density. The alloying atoms are deposited by different energy assist methods, e.g. by an ion beam that irradiates the substrate, or by an energy assisted organometallic chemical vapor deposition process. The energy assist can be by ionization or optical irradiation causing topical heating of surface atoms deposited by the OMCVD process, without heating of the substrate or the underlying atoms. If the ion beam process is employed, the substrate is annealed such that the alloying atoms move from initial random locations thereof in the compound lattice to the predetermined locations.

Abstract translation: 低位错密度半导体器件包括III-V或II-VI半导体化合物的第一半导体层和非金属衬底上的合金原子。 半导体化合物通常具有大的位错密度。 复合晶格结构中的合金原子的预定位置可以显着降低复合位错密度。 能量被施加到合金原子上，使得它们处于预定位置。 合金原子的数量导致超过半导体化合物溶解度极限。 该层形成在III-V或II-VI半导体的衬底上，例如砷化镓或诸如硅之类的另一半导体，或者在诸如蓝宝石的绝缘体上。 在后一种情况下，该层形成在晶格常数在基板和半导体化合物之间的中间层上。 第二层被外延沉积在第一层上，因此两层具有几乎相同的晶格常数和位错密度。 合金原子通过不同的能量辅助方法沉积，例如 通过照射衬底的离子束，或通过能量辅助的有机金属化学气相沉积工艺。 能量辅助可以通过电离或光照射引起局部加热由OMCVD工艺沉积的表面原子，而不加热底物或下面的原子。 如果使用离子束工艺，则将衬底退火，使得合金原子从复合晶格中的初始随机位置移动到预定位置。

公开(公告)号：US4568792A

公开(公告)日：1986-02-04

申请号：US576727

申请日：1984-02-02

Applicant: John B. Mooney ,  Arden Sher

Inventor： John B. Mooney ,  Arden Sher

IPC: H01L31/0296 ,  H01L31/068 ,  H01L31/06

CPC classification number: H01L31/073 ,  H01L31/0296 ,  H01L31/068 ,  Y02E10/543 ,  Y02E10/547

Abstract: A photovoltaic cell includes doped cadmium telluride formed of tetrahedral crystalline host semiconductor material including cadmium and telluride atoms bonded by ionic, covalent, and metallic forces. The host material is alloyed with Group II or VI atoms that replace either some of the host material cadmium or telluride atoms so that the alloyed and host atoms are bonded by at least covalent and metallic forces. The alloyed atoms have bond lengths with the nearest neighboring host atoms that are less than the host bond lengths. The number of bonded alloyed atoms is such that they do not substantially affect electronic conduction properties of the host material and result in a semiconductor region having no more than a few dislocations. A semiconductor of opposite conductivity to the conductivity type of the semiconductor region forms a junction with the region. At least one metal electrode makes ohmic contact with the first region. If the cadmium telluride is p type, the alloyed atoms are selected from the group consisting essentially of zinc, sulphur, and selenum, in which case the n type semiconductor can be cadmium sulphide. The n and p type semiconductors can be of the same compound to form a homojunction.

Abstract translation: 光伏电池包括由四面体结晶主体半导体材料形成的掺杂的碲化镉，其包括通过离子，共价和金属力键合的​​镉和碲化物原子。 主体材料与替代一些主体材料镉或碲化物原子的II或VI族原子合金化，使得合金和主体原子通过至少共价和金属力键合。 合金原子具有与最近的相邻主体原子的键长度小于主体键长度。 键合合金原子的数量使得它们基本上不影响主体材料的电子传导性质，并且导致具有不超过几个位错的半导体区域。 与半导体区域的导电类型相反的导电性的半导体与该区域形成结。 至少一个金属电极与第一区域欧姆接触。 如果碲化镉为p型，合金原子选自基本上由锌，硫和硒组成的组，在这种情况下，n型半导体可以是硫化镉。 n型和p型半导体可以是相同的化合物以形成均相。

公开(公告)号：US4603258A

公开(公告)日：1986-07-29

申请号：US672365

申请日：1984-11-16

Applicant: Arden Sher ,  John B. Mooney

Inventor： Arden Sher ,  John B. Mooney

IPC: H01L27/146 ,  G01J5/20

CPC classification number: H01L27/14643

Abstract: A photocapacitive image detector array comprises a matrix of M.times.N spaced columns of relatively high carrier concentration extending between first and second opposite faces of a semiconductor substrate having a relatively low carrier concentration. N parallel spaced electrode stripes extend in the X direction on the first face and M parallel spaced semiconductor stripes of intermediate carrier concentration extend in the Y direction on the second face. Stripe k of the N stripes makes ohmic contacts with each of the M columns, where k=1,2, . . . N. Stripe p of the M semiconductor stripes makes contact with each of the N columns, where p=1, 2, . . . M. Each of the M regions has a depletion layer having a thickness adapted to be modulated by radiation from an image to be detected. M parallel spaced electrode stripes extend in the Y direction so that stripe q of electrode stripes M is in registration with semiconductor stripe q, where q=1, 2, . . . M. A composite insulating layer, including two insulating thin films, is sandwiched between the M electrode stripes and M semiconductor stripes. Thereby M.times.N pixels are formed, with each pixel being associated with a different one of the columns. The composite insulating layer and M electrodes are transparent to radiation from the image so that the image incident on the semiconductor stripes modulates the thickness of the depletion layers of the semiconductor stripes to vary the capacitance at each pixel as a function of the radiation intensity incident thereon.

Abstract translation: 光电图像检测器阵列包括在具有较低载流子浓度的半导体衬底的第一和第二相对面之间延伸的相对较高载流子浓度的M×N间隔列的矩阵。 N个平行间隔的电极条在第一面上在X方向上延伸，并且中间载体浓度的M个平行间隔的半导体条在第二面上在Y方向上延伸。 N条纹的条纹k与M列中的每一个进行欧姆接触，其中k = 1,2。 。 。 M个半导体条纹的条纹p与每个N列接触，其中p = 1,2。 。 。 M个区域中的每一个具有耗尽层，该耗尽层具有适于被来自待检测图像的辐射调制的厚度。 M个平行间隔的电极条在Y方向上延伸，使得电极条M的条纹q与半导体条纹q对齐，其中q = 1,2。 。 。 包括两个绝缘薄膜的复合绝缘层夹在M个电极条和M个半导体条之间。 由此形成M×N个像素，其中每个像素与不同的列相关联。 复合绝缘层和M电极对于来自图像的辐射是透明的，使得入射在半导体条上的图像调制半导体条的耗尽层的厚度，以改变作为入射在其上的辐射强度的函数的每个像素处的电容 。

公开(公告)号：US4343881A

公开(公告)日：1982-08-10

申请号：US281223

申请日：1981-07-06

Applicant: Arden Sher ,  John B. Mooney

Inventor： Arden Sher ,  John B. Mooney

IPC: G03G5/00 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082

CPC classification number: G03G5/0433 ,  G03G5/082

Abstract: A multilayer photoconductive assembly with an intermediate heterojunction. The assembly comprises a conductive substrate, a thin semiconductive layer formed of a material of one carrier polarity, which material has a narrow band gap. This layer is in substantially ohmic (low-resistive) contact with the conductive substrate. A light-absorbing layer is formed of a semiconductor which is thicker than the first layer and is of a carrier polarity opposite to the polarity of the first layer. The material has a band gap wider than the band gap of the first layer. The first and second semiconductive layers form a rectifying heterojunction therebetween. This enables the assembly to have a tremendously increased dark resistance and produces an assembly enabling high-speed electrophotography.

Abstract translation: 具有中间异质结的多层光电导组件。 组件包括导电衬底，由一种载体极性的材料形成的薄的半导体层，该材料具有窄的带隙。 该层与导电衬底基本上是欧姆（低电阻）的接触。 光吸收层由比第一层厚的半导体形成，并且具有与第一层的极性相反的载流子极性。 该材料具有比第一层的带隙宽的带隙。 第一和第二半导体层之间形成整流异质结。 这使得组件具有极大增加的暗电阻并且产生能够进行高速电子照相术的组件。

公开(公告)号：US5246916A

公开(公告)日：1993-09-21

申请号：US327323

申请日：1989-03-22

Applicant: John B. Mooney ,  Arden Sher

Inventor： John B. Mooney ,  Arden Sher

IPC: H01L39/24

CPC classification number: H01L39/2429 ,  Y10S505/739

Abstract: A process is disclosed for forming shaped superconductors of the metal oxide type by electrophoretic deposition of superconducting particles which comprises providing particulate superconducting material of the metal oxide type coated with a fusible binder, electrophoretically depositing such coated superconducting particles on a substrate, heating the coated substrate sufficiently to fuse the binder to the substrate, fabricating the coated substrate into a desired shape, removing the binder, and then sintering the coated substrate to sinter the superconducting particles together. In a preferred embodiment the process further comprises immersing the coated substrate in an electrostatic field during the fusion step to both orient and maintain the superconducting particles in a desired direction.

Abstract translation: 公开了一种用于通过电泳沉积超导颗粒来形成金属氧化物型的超导体的方法，其包括提供用可熔粘合剂涂覆的金属氧化物类型的微粒超导材料，在衬底上电泳沉积这种涂覆的超导颗粒，加热涂覆的基底 充分地将粘合剂熔合到基底上，将涂覆的基底制成所需的形状，去除粘合剂，然后烧结涂覆的基底以将超导颗粒烧结在一起。 在优选实施方案中，该方法还包括在熔融步骤期间将涂覆的基材浸入静电场中，以将超导颗粒定向并保持在期望的方向。

公开(公告)号：US4916088A

公开(公告)日：1990-04-10

申请号：US187939

申请日：1988-04-29

Applicant: John B. Mooney ,  Arden Sher

Inventor： John B. Mooney ,  Arden Sher

IPC: H01L21/20

CPC classification number: H01L21/0262 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02546 ,  H01L21/02658 ,  Y10S148/015 ,  Y10S148/04 ,  Y10S148/072 ,  Y10S148/097 ,  Y10S438/938

Abstract: A low dislocation density semiconductor device includes a first semiconductor layer of a III-V or II-VI semiconductor compound and alloying atoms on a non-metal substrate. The semiconductor compound usually has a large dislocation density. A predetermined position of the alloying atoms in the compound lattice structure can substantially reduce the compound dislocation density. Energy is applied to the alloying atoms so they are at the predetermined positions. The number of alloying atoms causes the semiconductor compound solubility limit to be exceeded. The layer is formed on a substrate of the III-V or II-VI semiconductor, such as gallium arsenide or another semiconductor, such as silicon or on an insulator such as sapphire. In the latter cases, the layer is formed on an intermediate layer having a lattice constant between that of the substrate and semiconductor compound. A second layer is epitaxially deposited on the first layer so both layers have virtually the same lattice constant and dislocation density. The alloying atoms are deposited by different energy assist methods, e.g. by an ion beam that irradiates the substrate, or by an energy assisted organometallic chemical vapor deposition process. The energy assist can be by ionization or optical irradiation causing topical heating of surface atoms deposited by the OMCVD process, without heating of the substrate or the underlying atoms. If the ion beam process is employed, the substrate is annealed such that the alloying atoms move from initial random locations thereof in the compound lattice to the predetermined locations.

Abstract translation: 低位错密度半导体器件包括III-V或II-VI半导体化合物的第一半导体层和非金属衬底上的合金原子。 半导体化合物通常具有大的位错密度。 复合晶格结构中的合金原子的预定位置可以显着降低复合位错密度。 能量被施加到合金原子上，使得它们处于预定位置。 合金原子的数量导致超过半导体化合物溶解度极限。 该层形成在III-V或II-VI半导体的衬底上，例如砷化镓或诸如硅之类的另一半导体，或者在诸如蓝宝石的绝缘体上。 在后一种情况下，该层形成在晶格常数在基板和半导体化合物之间的中间层上。 第二层被外延沉积在第一层上，因此两层具有几乎相同的晶格常数和位错密度。 合金原子通过不同的能量辅助方法沉积，例如 通过照射衬底的离子束，或通过能量辅助的有机金属化学气相沉积工艺。 能量辅助可以通过电离或光照射引起局部加热由OMCVD工艺沉积的表面原子，而不加热底物或下面的原子。 如果使用离子束工艺，则将衬底退火，使得合金原子从复合晶格中的初始随机位置移动到预定位置。

公开(公告)号：US5068695A

公开(公告)日：1991-11-26

申请号：US506046

申请日：1990-04-09

Applicant: John B. Mooney ,  Arden Sher

Inventor： John B. Mooney ,  Arden Sher

IPC: H01L21/20

CPC classification number: H01L21/02439 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02658

Abstract: A low dislocation density semiconductor device includes a first semiconductor layer of a III-V or II-VI semiconductor compound and alloying atoms on a non-metal substrate. The semiconductor compound usually has a large dislocation density. A predetermined position of the alloying atoms in the compound lattice structure can substantially reduce the compound dislocation density. Energy is applied to the alloying atoms so they are at the predetermined positions. The number of alloying atoms causes the semiconductor compound solubility limit to be exceeded. The layer is formed on a substrate of the III-V or II-VI semiconductor, such as gallium arsenide or another semiconductor, such as silicon or on an insulator such as sapphire. In the latter cases, the layer is formed on an intermediate layer having a lattice constant between that of the substrate and semiconductor compound. A second layer is epitaxially deposited on the first layer so both layers have virtually the same lattice constant and dislocation density. The alloying atoms are deposited by different energy assist methods, e.g. by an ion beam that irradiates the substrate, or by an energy assisted organometallic chemical vapor deposition process. The energy assist can be by ionization or optical irradiation causing topical heating of surface atoms deposited by the OMCVD process, without heating of the substrate or the underlying atoms. If the ion beam process is employed, the substrate is annealed such that the alloying atoms move from initial random locations thereof in the compound lattice to the predetermined locations.

Abstract translation: 低位错密度半导体器件包括III-V或II-VI半导体化合物的第一半导体层和非金属衬底上的合金原子。 半导体化合物通常具有大的位错密度。 复合晶格结构中的合金原子的预定位置可以显着降低复合位错密度。 能量被施加到合金原子上，使得它们处于预定位置。 合金原子的数量导致超过半导体化合物溶解度极限。 该层形成在III-V或II-VI半导体的衬底上，例如砷化镓或诸如硅之类的另一半导体，或者在诸如蓝宝石的绝缘体上。 在后一种情况下，该层形成在晶格常数在基板和半导体化合物之间的中间层上。 第二层被外延沉积在第一层上，因此两层具有几乎相同的晶格常数和位错密度。 合金原子通过不同的能量辅助方法沉积，例如 通过照射衬底的离子束，或通过能量辅助的有机金属化学气相沉积工艺。 能量辅助可以通过电离或光照射引起局部加热由OMCVD工艺沉积的表面原子，而不加热底物或下面的原子。 如果使用离子束工艺，则将衬底退火，使得合金原子从复合晶格中的初始随机位置移动到预定位置。

公开(公告)号：US4990416A

公开(公告)日：1991-02-05

申请号：US368268

申请日：1989-06-19

Applicant: John B. Mooney

Inventor： John B. Mooney

IPC: G03F7/28 ,  G03F7/40 ,  H01J9/22

CPC classification number: G03F7/28 ,  G03F7/40 ,  H01J9/225 ,  Y10S430/138

Abstract: A method for the deposition of phosphor containing materials to CRT or VFD faceplates using reversal toning is dislosed. The method incudes the steps of charging the phosphor containing particles and the surface of a patterned photoresist with a charge of the same sign so that the particles are accurately deposited directly to an uncharged transparent surface electrode on the substrate.In a preferred embodiment, glass and/or polymeric binders may be included with the phosphor containing materials to enhance adherence to the substrate.

Abstract translation: 使用反转调色剂将含磷光体材料沉积到CRT或VFD面板的方法被封闭。 该方法包括以相同符号的电荷对含荧光体颗粒和图案化光致抗蚀剂的表面进行充电的步骤，使得颗粒被精确地沉积到基板上的未充电透明表面电极上。 在优选的实施方案中，玻璃和/或聚合物粘合剂可以包含在含磷光体材料中以增强对基底的粘附。

公开(公告)号：US4529832A

公开(公告)日：1985-07-16

申请号：US581783

申请日：1984-02-21

Applicant: Arden Sher ,  John B. Mooney

Inventor： Arden Sher ,  John B. Mooney

IPC: H01L31/032 ,  H01L31/062 ,  H01L31/068 ,  H01L31/072 ,  H01L31/06

CPC classification number: H01L31/0324 ,  H01L31/062 ,  H01L31/068 ,  H01L31/072 ,  Y02E10/547 ,  Y10S438/93

Abstract: A solar cell in which the essential feature is a thin film of lead-cadmium-sulphide alloy. This alloy is preferably formed by spray pyrolysis from a solution containing the necessary ingredients. The solar cell advantageously takes the form of a homojunction constructed of two layers of lead-cadmium-sulphide alloy, with one of the layers being p-doped and the other of the layers being n-doped. The solar cell may be produced with an intrinsic layer interposed between the p-type layer and the n-type layer. The solar cell may also be made with a semiconductive layer of lead-cadmium-sulphide in contact with a metallic substrate.

Abstract translation: 一种太阳能电池，其主要特征是硫化镉合金薄膜。 该合金优选通过从含有必要成分的溶液喷雾热解形成。 太阳能电池有利地采用由两层铅 - 硫化镉合金构成的同质结的形式，其中一层是p掺杂的，另一层是n掺杂的。 太阳能电池可以用介于p型层和n型层之间的本征层制造。 太阳能电池还可以用与金属基底接触的硫化镉硫化物半导体层制成。

公开(公告)号：US4341851A

公开(公告)日：1982-07-27

申请号：US236739

申请日：1981-02-23

Applicant: John B. Mooney ,  Ivor Brodie

Inventor： John B. Mooney ,  Ivor Brodie

IPC: G03G5/043 ,  G03G5/082

CPC classification number: G03G5/082 ,  G03G5/0433

Abstract: An electrophotographic photoconductor, formed on a conductive substrate by spray pyrolysis, comprising essentially a major amount of cadmium sulphide and a minor amount of zinc sulphide. The cadmium layer is at least three microns in thickness and is formed in three zones. The zone adjacent the metal substrate, adapted to form a contact layer, bears an amount of lead sulphide; the outermost zone, adapted to absorb light, is doped with a minor amount of copper to eliminate fatigue; and the intermediate zone, which is necessary to increase the surface potential, is adapted to transport light-generated charge and is doped with a minor amount of chlorine. The process is carried on in the atmosphere with three different aqueous solutions of reagents to form the three different zones. The photoconductive layer is microcrystalline in structure and bears adsorbed oxygen.

Abstract translation: 通过喷雾热解形成在导电基底上的电子照相感光体，其基本上包含主要量的硫化镉和少量的硫化锌。 镉层的厚度至少为3微米，并形成在三个区域中。 适于形成接触层的邻近金属基底的区带有一定量的硫化铅; 适于吸收光的最外面的区域掺杂有少量的铜以消除疲劳; 并且为了增加表面电位而必需的中间区域适于运送光产生的电荷并且掺杂少量的氯。 该方法在大气中用三种不同的试剂水溶液进行，以形成三个不同的区域。 光电导层在结构上是微晶的，并具有吸附的氧气。