-
公开(公告)号:US07226860B2
公开(公告)日:2007-06-05
申请号:US10833154
申请日:2004-04-28
申请人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
发明人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
IPC分类号: H01L21/44
CPC分类号: H01L21/2885 , H01L21/76843 , H01L21/76861 , H01L21/76862 , H01L21/76873 , H01L21/76877
摘要: A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.
-
公开(公告)号:US20130335132A1
公开(公告)日:2013-12-19
申请号:US13594559
申请日:2012-08-24
IPC分类号: G06G7/18
CPC分类号: G06G7/18 , H04N5/3743 , H04N5/37457
摘要: The present invention discloses a circuit sharing time delay integrator structure. The major composing elements of this circuit sharing time delay integrator structure are: a sharing circuit, a first control block, a plurality of second control blocks and a timing set generated by a timing generator circuit. The sharing circuit can be an OP-AMP, an active load, or any of a variety of combinations used in signal accumulation applications. With the implementation of the present invention to applications of signal accumulations, the necessity of an adder circuitry is eliminated, the overall circuitry and hence the total amount of transistors required when producing the integrated circuit is massively reduced, and thus a great cost reduction and better timing and power efficiency can all be thereof achieved.
摘要翻译: 本发明公开了一种电路共享时延积分器结构。 该电路共享时延积分器结构的主要组成要素是共享电路,第一控制块,多个第二控制块和由定时发生器电路产生的定时集。 共享电路可以是OP-AMP,有源负载或用于信号积累应用中的各种组合中的任何一种。 通过本发明实现信号积累的应用,消除了加法器电路的必要性,大大降低了整体电路和因此产生集成电路所需的晶体管总量,从而大大降低了成本 定时和功率效率都可以实现。
-
公开(公告)号:US20070181434A1
公开(公告)日:2007-08-09
申请号:US11783245
申请日:2007-04-06
申请人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
发明人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
CPC分类号: H01L21/2885 , H01L21/76843 , H01L21/76861 , H01L21/76862 , H01L21/76873 , H01L21/76877
摘要: A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.
摘要翻译: 电化学沉积(ECD)的方法在衬底上提供阻挡层和种子层。 在将金属层电化学沉积在具有物理或化学表面处理工艺的电化学镀覆电池中之前,对基板的表面进行预处理。 电化学镀覆电池被盖覆盖以防止电解质溶液的蒸发。 电化学电镀单元包括具有提升密封件的衬底保持器组件,例如在提升密封件和衬底之间的接触角θ小于90°。 衬底保持器组件包括在衬底的后侧的衬底卡盘。
-
公开(公告)号:US08704580B2
公开(公告)日:2014-04-22
申请号:US13594559
申请日:2012-08-24
IPC分类号: G06G7/19
CPC分类号: G06G7/18 , H04N5/3743 , H04N5/37457
摘要: The present invention discloses a circuit sharing time delay integrator structure. The major composing elements of this circuit sharing time delay integrator structure are: a sharing circuit, a first control block, a plurality of second control blocks and a timing set generated by a timing generator circuit. The sharing circuit can be an OP-AMP, an active load, or any of a variety of combinations used in signal accumulation applications. With the implementation of the present invention to applications of signal accumulations, the necessity of an adder circuitry is eliminated, the overall circuitry and hence the total amount of transistors required when producing the integrated circuit is massively reduced, and thus a great cost reduction and better timing and power efficiency can all be thereof achieved.
摘要翻译: 本发明公开了一种电路共享时延积分器结构。 该电路共享时延积分器结构的主要组成要素是共享电路,第一控制块,多个第二控制块和由定时发生器电路产生的定时集。 共享电路可以是OP-AMP,有源负载或用于信号积累应用中的各种组合中的任何一种。 通过本发明实现信号积累的应用,消除了加法器电路的必要性,大大降低了整体电路和因此产生集成电路所需的晶体管总量,从而大大降低了成本 定时和功率效率都可以实现。
-
公开(公告)号:US20050245072A1
公开(公告)日:2005-11-03
申请号:US10833154
申请日:2004-04-28
申请人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
发明人: Hsien-Ming Lee , Jing-Cheng Lin , Shing-Chyang Pan , Ming-Hsing Tsai , Hung-Wen Su , Shih-Wei Chou , Shau-Lin Shue , Kuo-Wei Cheng , Ting-Chu Ko
IPC分类号: H01L21/288 , H01L21/4763 , H01L21/76 , H01L21/768
CPC分类号: H01L21/2885 , H01L21/76843 , H01L21/76861 , H01L21/76862 , H01L21/76873 , H01L21/76877
摘要: A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.
摘要翻译: 电化学沉积(ECD)的方法在衬底上提供阻挡层和种子层。 在将金属层电化学沉积在具有物理或化学表面处理工艺的电化学镀覆电池中之前,对基板的表面进行预处理。 电化学镀覆电池被盖覆盖以防止电解质溶液的蒸发。 电化学电镀单元包括具有提升密封件的衬底保持器组件,例如在提升密封件和衬底之间的接触角θ小于90°。 衬底保持器组件包括在衬底的后侧的衬底卡盘。
-
-
-
-