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公开(公告)号：US5945872A
公开(公告)日：1999-08-31
申请号：US965267
申请日：1997-11-06
CPC分类号： G11C27/024 , G05F3/242
摘要： A circuit that produces a gate drive voltage for a MOS transistor switch includes an input that receives a supply voltage, a regulated voltage generating circuit that produces a regulated voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the supply voltage and the regulated voltage during a first of first and second non-overlapping time intervals. The second switch connects the voltage storage element to increase the sampled voltage by another of the supply voltage and the regulated voltage to the gate drive voltage during the second non-overlapping time interval. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch during the second non-overlapping time interval. The regulated voltage generating circuit produces the regulated voltage such that a high level of the gate drive voltage exceeds the supply voltage yet is maintained less than a breakdown voltage of the MOS transistor switch.
摘要翻译： 产生用于MOS晶体管开关的栅极驱动电压的电路包括接收电源电压的输入端，产生调节电压的调节电压产生电路和电压存储元件。 第一开关在第一和第二非重叠时间间隔期间连接电压存储元件以采样电源电压和调节电压之一。 第二开关连接电压存储元件，以在第二非重叠时间间隔期间通过另一电源电压和调节电压将栅极驱动电压增加采样电压。 第三开关连接电压存储元件，以在第二非重叠时间间隔期间向MOS晶体管开关提供栅极驱动电压。 调节电压产生电路产生调节电压，使得栅极驱动电压的高电平超过电源电压，并保持小于MOS晶体管开关的击穿电压。
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公开(公告)号：US20060132239A1
公开(公告)日：2006-06-22
申请号：US11304326
申请日：2005-12-15
申请人： Daniel Kelly , Lawrence Singer
发明人： Daniel Kelly , Lawrence Singer
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , G05F3/262 , H03F2200/453 , H03F2203/45021 , H03F2203/45112 , H03F2203/45244 , H03F2203/45354 , H03F2203/45454 , H03F2203/45476 , H03F2203/45484
摘要： An input tracking current mirror for a differential amplifier system includes a current mirror having an input leg and an output leg, a differential amplifier including a first set of at least two transconductance components, each having at least one input terminal for receiving input signals, the first set of at least two transconductance components having a first common node connected to the output leg which has a first voltage that is a function of the input signals, and a tracking circuit including a second set of at least two transconductance components each having at least one input terminal for receiving the input signals, the second set of at least two transconductance components, having a second common node connected to the input leg which has a second voltage that is a function of the input signals, the tracking circuit driving the second voltage on the input leg to track the first voltage on the output leg with variations in the input signals.
摘要翻译： 用于差分放大器系统的输入跟踪电流镜包括具有输入支路和输出支路的电流镜，差分放大器，包括至少两个跨导分量的第一组，每个具有至少一个用于接收输入信号的输入端， 第一组至少两个跨导部件，具有连接到输出支路的第一公共节点，该第一公共节点具有作为输入信号的函数的第一电压，以及跟踪电路，包括至少两个跨导部件的第二组， 用于接收输入信号的一个输入端，所述第二组至少两个跨导分量，具有连接到所述输入支路的第二公共节点，所述第二公共节点具有作为所述输入信号的函数的第二电压，所述跟踪电路驱动所述第二电压 在输入支路上跟踪输入端子上的第一个电压，输入信号的变化。
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公开(公告)号：US6118326A
公开(公告)日：2000-09-12
申请号：US965266
申请日：1997-11-06
申请人： Lawrence Singer , Todd L. Books
发明人： Lawrence Singer , Todd L. Books
IPC分类号： H03K17/06 , H03K19/017 , H03K17/16
CPC分类号： H03K19/01735 , H03K17/063
摘要： A circuit that produces a gate drive voltage for a MOS transistor switch, that receives an input voltage "on" a source terminal, includes a first input that receives the input voltage, a second input that receives a bias voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the input voltage and the bias voltage during a first of first and second non-overlapping time intervals. A second switch connects the voltage storage element to increase the sampled voltage by another of the input voltage and the bias voltage to the gate drive voltage during the second non-overlapping time interval, while maintaining the gate drive voltage less than a breakdown voltage of the MOS transistor switch. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch such that a gate-to-source voltage of the MOS transistor switch is maintained approximately constant.
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公开(公告)号：US5847600A
公开(公告)日：1998-12-08
申请号：US638287
申请日：1996-04-26
申请人： Todd L. Brooks , Lawrence Singer
发明人： Todd L. Brooks , Lawrence Singer
CPC分类号： H03F3/4521 , H03F3/005 , H03F3/45188 , H03F3/45242 , H03F3/72 , H03F2203/45356 , H03F2203/45644 , H03F2203/45651 , H03F2203/45682
摘要： A two-stage switched-capacitor residue amplifier having novel circuitry in the first and second stages provides fast and accurate settling while configured with a large closed-loop gain, and also provides low power consumption while powered from a five volt supply. The invention is particularly well suited for use in a multi-stage, pipe-lined analog-to-digital converter (ADC) that converts multiple bits in the first pipeline stage. Complementary PMOS and NMOS differential pairs are used in the first and/or second stage to increase the current slew capability of the amplifier. Current mirror gain and/or positive feedback is used in the second stage to increase transonductance and bandwidth. Cascode transistors are used in the output of the first and/or second stages and active cascode gain enhancement is used in the first stage to increase dc gain and accuracy. The common mode level at the output of the second stage is controlled by injecting a pair of control currents (representative of the difference between a common-mode level actually at the output of the second stage and a desired common mode level) into a pair of mirror input nodes in the second stage. The common mode level of the first stage is controlled from a common node of a differential pair of the second stage. The two-stage amplifier of the invention provides a gain bandwidth product of 800 MHz, a closed-loop bandwidth of 50 MHz, a dc gain 90 dB, and a power consumption 80 mW.
摘要翻译： 在第一和第二阶段具有新颖电路的两级开关电容器残余放大器提供快速和准确的稳定，同时配置有大的闭环增益，并且在由五伏电源供电时也提供低功耗。 本发明特别适用于在第一流水线级中转换多个比特的多级管线模数转换器（ADC）。 互补PMOS和NMOS差分对用于第一和/或第二级以增加放大器的电流转换能力。 在第二阶段使用电流镜增益和/或正反馈来增加电导率和带宽。 串级晶体管用于第一级和/或第二级的输出，并且在第一级中使用有源共源共轭增益增强以增加直流增益和精度。 第二级输出端的共模电平通过将一对控制电流（代表第二级输出端的共模电平与期望的共模电平之间的差）代入一对 第二阶段的镜像输入节点。 第一级的共模级由第二级的差分对的公共节点控制。 本发明的两级放大器提供800MHz的增益带宽乘积，50MHz的闭环带宽，直流增益90dB，功耗80mW。
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5.发明授权
公开(公告)号：US5789981A
公开(公告)日：1998-08-04
申请号：US638195
申请日：1996-04-26
申请人： Lawrence Singer , Todd L. Brooks
发明人： Lawrence Singer , Todd L. Brooks
CPC分类号： H03F3/3001 , H03F2203/30096 , H03F2203/30129
摘要： A high-gain, low-power transconductance amplifier suitable for use in switched-capacitor circuits provides improved accuracy and high-speed operation. The transconductance amplifier includes an input circuit that receives an input voltage. A current mirror circuit is coupled to the input circuit. At least one active cascode circuit, coupled to the current mirror circuit, receives current from the current mirror circuit and provides an output current. The active cascode circuit provides gain enhancement to the transconductance amplifier by increasing the output impedance of the transconductance amplifier.
摘要翻译： 适用于开关电容电路的高增益，低功耗跨导放大器提供更高的精度和高速运行。 跨导放大器包括接收输入电压的输入电路。 电流镜电路耦合到输入电路。 耦合到电流镜电路的至少一个有源共源共栅电路从电流镜电路接收电流并提供输出电流。 有源共源共栅电路通过增加跨导放大器的输出阻抗来为跨导放大器提供增益增益。
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6.发明授权Reference buffer with multiple gain stages for large, controlled effective transconductance 失效具有多个增益级的参考缓冲器，用于大的，受控的有效跨导
公开(公告)号：US5854574A
公开(公告)日：1998-12-29
申请号：US639208
申请日：1996-04-26
申请人： Lawrence Singer , Todd L. Brooks
发明人： Lawrence Singer , Todd L. Brooks
CPC分类号： H03F3/45659 , H03F3/3028 , H03F3/45183 , H03F3/45946 , H03F2203/45068 , H03F2203/45216 , H03F2203/45352 , H03F2203/45508 , H03F2203/45644 , H03F2203/45658
摘要： A reference buffer suitable for driving switched-capacitor or resistive load circuits provides a very low output impedance. The reference buffer utilizes an amplifier with a very large and controlled transconductance configured in feedback and compensated by a load capacitance. Cascaded gain stages are used to provide a large, controlled transconductance. In one embodiment, a reference buffer amplifier includes a plurality of voltage gain amplifiers connected in cascade and at least one transconductance amplifier connected to a last-connected of the plurality of voltage gain amplifiers. The amplifier may further include at least one current mirror amplifier connected to the at least one transconductance amplifier. In another embodiment, the reference buffer amplifier includes at least one transconductance amplifier and at least one current mirror amplifier cascade-connected to the at least one transconductance amplifier. The amplifiers can be differential or single-ended.
摘要翻译： 适用于驱动开关电容或电阻负载电路的参考缓冲器提供非常低的输出阻抗。 参考缓冲器使用具有非常大的和受控跨导的放大器，其配置为反馈并由负载电容补偿。 级联增益级用于提供大的受控跨导。 在一个实施例中，参考缓冲放大器包括串联连接的多个电压增益放大器和连接到多个电压增益放大器的最后连接的至少一个跨导放大器。 放大器还可以包括连接到至少一个跨导放大器的至少一个电流镜放大器。 在另一个实施例中，参考缓冲放大器包括至少一个跨导放大器和与至少一个跨导放大器级联连接的至少一个电流镜放大器。 放大器可以是差分或单端。
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7.发明授权Differential two-stage miller compensated amplifier system with capacitive level shifting 有权差分两级米勒补偿放大器系统，具有电容电平转换公开(公告)号：US07692489B2
公开(公告)日：2010-04-06
申请号：US11305069
申请日：2005-12-16
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/086 , H03F1/14 , H03F3/45475 , H03F3/45654 , H03F3/45744 , H03F3/45968 , H03F2200/54 , H03F2203/45422 , H03F2203/45424 , H03F2203/45512 , H03F2203/45652
摘要： A differential two-stage Miller compensated amplifier system with capacitive level shifting includes a first stage differential transconductance amplifier including first and second output nodes and an output common mode voltage, a second stage differential transconductance amplifier including non-inverting and inverting inputs and outputs and an input common mode voltage, and a level shifting capacitor circuit coupled between the first and second output nodes and the non-inverting and inverting inputs for level shifting between the output common mode voltage of the first stage and the input common mode voltage of the second stage.
摘要翻译： 具有电容电平偏移的差分两级米勒补偿放大器系统包括包括第一和第二输出节点和输出共模电压的第一级差分跨导放大器，包括非反相和反相输入和输出的第二级差分跨导放大器和 输入共模电压和耦合在第一和第二输出节点之间的电平移动电容器电路和用于在第一级的输出共模电压和第二级的输入共模电压之间的电平移位的非反相和反相输入 。
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公开(公告)号：US06567025B2
公开(公告)日：2003-05-20
申请号：US10071983
申请日：2002-02-05
IPC分类号： H03M302
摘要： A multi-bit sigma-delta analog to digital converter has a quantizer, a loop filter circuit, and a digital to analog feedback circuit. The quantizer, loop filter, and digital to analog feedback circuit have a loop gain associated therewith. The quantizer and loop filter have a combined gain associated therewith. The full-scale of the digital to analog feedback circuit is varied. The combined gain of the quantizer and loop filter is also varied. More specifically, the combined gain of the quantizer and loop filter is varied in inverse proportion to the full-scale of the digital to analog feedback circuit to maintain the loop gain at a substantially constant level.
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公开(公告)号：US6060937A
公开(公告)日：2000-05-09
申请号：US393139
申请日：1999-09-09
申请人： Lawrence Singer , Todd L. Books
发明人： Lawrence Singer , Todd L. Books
IPC分类号： H03K17/06 , H03K19/017 , H03K17/16
CPC分类号： H03K19/01735 , H03K17/063
摘要： A circuit that produces a gate drive voltage for a MOS transistor switch, that receives an input voltage "on" a source terminal, includes a first input that receives the input voltage, a second input that receives a bias voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the input voltage and the bias voltage during a first of first and second non-overlapping time intervals. A second switch connects the voltage storage element to increase the sampled voltage by another of the input voltage and the bias voltage to the gate drive voltage during the second non-overlapping time interval, while maintaining the gate drive voltage less than a breakdown voltage of the MOS transistor switch. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch such that a gate-to-source voltage of the MOS transistor switch is maintained approximately constant.
摘要翻译： 产生用于MOS晶体管开关的栅极驱动电压的电路，其接收源端子上的输入电压，包括接收输入电压的第一输入端，接收偏置电压的第二输入端和电压存储元件 。 在第一和第二非重叠时间间隔期间，第一开关连接电压存储元件以采样输入电压和偏置电压之一。 第二开关连接电压存储元件，以在第二非重叠时间间隔期间通过另一个输入电压和栅极驱动电压的偏置电压来增加采样电压，同时保持栅极驱动电压小于栅极驱动电压的击穿电压 MOS晶体管开关。 第三开关连接电压存储元件以向MOS晶体管开关提供栅极驱动电压，使得MOS晶体管开关的栅极 - 源极电压保持近似恒定。
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公开(公告)号：US20060186948A1
公开(公告)日：2006-08-24
申请号：US11305540
申请日：2005-12-16
申请人： Daniel Kelly , Lawrence Singer
发明人： Daniel Kelly , Lawrence Singer
IPC分类号： G05F1/10
CPC分类号： H02M3/073
摘要： A programmable clock booster system including a clock booster circuit including at least one boost capacitor connected between a first node and a second node for sampling an input voltage in a first phase and applying a boosting voltage to said second node during a second phase, and a programmable capacitor circuit connected to said first node for providing a programmable boosted voltage on said first node during said second phase.
摘要翻译： 一种可编程时钟升压器系统，包括时钟升压电路，其包括连接在第一节点和第二节点之间的至少一个升压电容器，用于对第一阶段中的输入电压进行采样，并且在第二阶段期间将升压电压施加到所述第二节点，以及 可编程电容器电路连接到所述第一节点，用于在所述第二阶段期间在所述第一节点上提供可编程升压电压。
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