公开(公告)号：US08610493B2

公开(公告)日：2013-12-17

申请号：US13243955

申请日：2011-09-23

申请人： Yi-Gyeong Kim ,  Bong Chan Kim ,  Min-Hyung Cho ,  Jong-Kee Kwon

发明人： Yi-Gyeong Kim ,  Bong Chan Kim ,  Min-Hyung Cho ,  Jong-Kee Kwon

IPC分类号： G05F3/02

CPC分类号： H03F3/45475 ,  H03F2203/45248 ,  H03F2203/45514 ,  H03F2203/45541 ,  H03F2203/45551

摘要： Disclosed is a bias circuit which includes a bias voltage generating part configured to generate a bias voltage using a reference current and a variable current; a reference current source part configured to provide the reference current to the bias voltage generating part; and a current adjusting part configured to provide the variable current to the bias voltage generating part and to adjust the amount of the variable current according to voltage levels of at least two input signals. The bias circuit prevents an increase in power consumption and improves a slew rate at the same time.

摘要翻译： 公开了一种偏置电路，其包括被配置为使用参考电流和可变电流产生偏置电压的偏置电压产生部件; 参考电流源部，被配置为将所述参考电流提供给所述偏置电压产生部; 以及电流调节部，被配置为向所述偏置电压生成部提供所述可变电流，并且根据至少两个输入信号的电压电平来调整所述可变电流的量。 偏置电路可以防止功耗的增加，同时提高转换速率。

公开(公告)号：US08542139B2

公开(公告)日：2013-09-24

申请号：US13310606

申请日：2011-12-02

申请人： Min-Hyung Cho ,  Yi-Gyeong Kim ,  Jong-Kee Kwon

发明人： Min-Hyung Cho ,  Yi-Gyeong Kim ,  Jong-Kee Kwon

IPC分类号： H03M1/00

CPC分类号： H03K17/04106 ,  H03M1/06 ,  H03M1/66

摘要： Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state.

摘要翻译： 提供了产生用于驱动电流开关的信号的电流开关驱动电路和使用该电流开关的数模转换器。 电流开关驱动电路包括：第一PMOS晶体管，源极端子连接到电源端子，栅极端子接收输入信号，漏极端子输出驱动信号;漏极端子连接的NMOS晶体管 到第一PMOS晶体管的漏极端子，并且栅极端子接收输入信号;第二PMOS晶体管，其源极端子连接到NMOS晶体管的源极端子，栅极端子连接到偏置电压端子， 并且漏极端子连接到接地端子，并且使得允许第二PMOS晶体管恒定地处于导通状态的控制电流源。

公开(公告)号：US20130099868A1

公开(公告)日：2013-04-25

申请号：US13531437

申请日：2012-06-22

申请人： Yi-Gyeong KIM ,  Min-Hyung CHO ,  Tae Moon ROH ,  Jong-Kee KWON ,  Woo Seok YANG ,  Jongdae KIM

发明人： Yi-Gyeong KIM ,  Min-Hyung CHO ,  Tae Moon ROH ,  Jong-Kee KWON ,  Woo Seok YANG ,  Jongdae KIM

IPC分类号： H03F3/04

CPC分类号： H03F3/08

摘要： Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current.

摘要翻译： 公开了一种声音检测电路，其包括：感测单元，被配置为响应于声音信号的声压级产生AC信号; 放大单元，被配置为放大AC信号; 以及偏置电压产生单元，被配置为产生要提供给所述放大单元的偏置电压。 偏置电压产生单元包括被配置为提供功率电流的电流源; 以及电流电压转换电路，被配置为将功率电流转换成偏置电压并且减少由于功率电流引起的噪声。

公开(公告)号：US08164491B2

公开(公告)日：2012-04-24

申请号：US12783294

申请日：2010-05-19

申请人： Min Hyung Cho ,  Yi Gyeong Kim ,  Jong Kee Kwon

发明人： Min Hyung Cho ,  Yi Gyeong Kim ,  Jong Kee Kwon

IPC分类号： H03M7/32

CPC分类号： H03M7/3004 ,  H03M7/3033 ,  H03M7/304

摘要： Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size.

摘要翻译： 提供了使用其的系数乘法器和数字Δ-Σ调制器。 系数乘法器使用系数平均技术将各自的相关乘法器的输出信号的平均值作为有效系数，而不使用具有复杂结构的加法器并占据较大的码片面积。 因此，系数乘法器与典型有符号数（CSD）系数乘法器相比，具有简单的硬件结构和小的芯片面积，并且采用系数乘法器的数字Δ-Σ调制器结构简单，体积小。

公开(公告)号：US07821341B2

公开(公告)日：2010-10-26

申请号：US12507701

申请日：2009-07-22

申请人： Yi Gyeong Kim ,  Min Hyung Cho ,  Jong Kee Kwon

发明人： Yi Gyeong Kim ,  Min Hyung Cho ,  Jong Kee Kwon

IPC分类号： H03G3/10

CPC分类号： H03F3/45475 ,  H03F2203/45528 ,  H03F2203/45591

摘要： Provided are a gain control device and an amplifier using the gain control device. The gain control device includes a first input resistance unit having a first variable resistor whose resistance is linearly variable and a first fixed resistor respectively receiving a first input signal and a second input signal having a sign different from the first input signal and outputting current through a first output terminal, and a second input resistance unit having a second fixed resistor and a second variable resistor whose resistance is linearly variable respectively receiving the first input signal and the second input signal and outputting current through a second output terminal.Since the gain control device can separately perform dB-linear gain control, it is easily combined with a circuit, such as a continuous-time sigma-delta modulator (SDM), a continuous-time filter, and a continuous-time analog-to-digital converter (ADC), and enables miniaturization and low power consumption.

摘要翻译： 提供了增益控制装置和使用增益控制装置的放大器。 所述增益控制装置包括具有电阻为线性变化的第一可变电阻器和分别接收第一输入信号的第一固定电阻器和具有与第一输入信号不同的符号的第二输入信号的第一输入电阻单元， 第一输出端子和具有第二固定电阻器和第二可变电阻器的第二输入电阻单元，其电阻为线性变化，分别接收第一输入信号和第二输入信号，并通过第二输出端子输出电流。 由于增益控制装置可以单独执行dB线性增益控制，所以可以容易地与诸如连续时间Σ-Δ调制器（SDM），连续时间滤波器以及连续时间模拟到 数字转换器（ADC），并实现小型化和低功耗。

公开(公告)号：US07663403B2

公开(公告)日：2010-02-16

申请号：US11943031

申请日：2007-11-20

申请人： Min Hyung Cho ,  Kwi Dong Kim ,  Chong Ki Kwon

发明人： Min Hyung Cho ,  Kwi Dong Kim ,  Chong Ki Kwon

IPC分类号： H03K19/0175

CPC分类号： H03K19/018528 ,  H03K19/0948

摘要： Provided is a high-speed asynchronous digital signal level conversion circuit converting an input signal of a first voltage level into a signal of a second voltage level. The conversion circuit is able to operate at high speed by connecting first and second nodes, at which the input signal of the first voltage level is converted to the signal of the second voltage level, to a second power source voltage of the second voltage level for fast voltage level conversion when the voltage level of the input signal is changed.

摘要翻译： 提供了将第一电压电平的输入信号转换为第二电压电平的信号的高速异步数字信号电平转换电路。 转换电路能够通过将第一和第二节点（第一电压电平的输入信号被转换为第二电压电平的信号）连接到第二电压电平的第二电源电压， 当输入信号的电压电平改变时，进行快速电压电平转换。

公开(公告)号：US20090121909A1

公开(公告)日：2009-05-14

申请号：US12195232

申请日：2008-08-20

申请人： Yi Gyeong KIM ,  Min Hyung Cho ,  Chong Ki Kwon

发明人： Yi Gyeong KIM ,  Min Hyung Cho ,  Chong Ki Kwon

IPC分类号： H03M3/00 ,  H03M1/66 ,  H03M1/80

CPC分类号： H03M1/0665 ,  H03M1/74 ,  H03M3/464 ,  H03M3/502

摘要： Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm.

摘要翻译： 提供了动态元件匹配方法，多位数模转换器（DAC）和具有多位DAC的多位DAC和Δ-ΣDAC的Δ-Σ调制器。 动态元件匹配方法涉及防止从Δ-Σ模数转换器（ADC）的delta-sigma调制器和用于在A-Sigma模数转换器（ADC）中使用的多位DAC的周期性信号分量（带内音调） Δ-ΣDAC。 每次选择一个单位元素一次时，根据简单算法以新的顺序选择单位元素，因此单位元素不被周期性地使用。 因此，可以防止由传统的数据加权平均（DWA）算法引起的带内音调。

公开(公告)号：US07388533B2

公开(公告)日：2008-06-17

申请号：US11588455

申请日：2006-10-27

申请人： Yi Gyeong Kim ,  Chong Ki Kwon ,  Jong Dae Kim ,  Min Hyung Cho ,  Seung Chul Lee ,  Gyu Hyun Kim

发明人： Yi Gyeong Kim ,  Chong Ki Kwon ,  Jong Dae Kim ,  Min Hyung Cho ,  Seung Chul Lee ,  Gyu Hyun Kim

IPC分类号： H03M1/82 ,  H03M3/00

CPC分类号： H03M3/352 ,  H03M3/424 ,  H03M3/464

摘要： A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.

摘要翻译： 提供了一种用于Σ-Δ调制器的数模转换器（DAC）。 DAC具有使用运算放大器（OP放大器）的开关电容器结构，并且使用仅采用单端形式的一个电容器的开关方法来执行超过3电平的功能。 因此，不会发生由电容器失配引起的DAC非线性，并且DAC的输出电平的数量增加。 此外，DAC电容器可以被施加到通用DAC以增加DAC输出电平与电容器的比率。

公开(公告)号：US09077287B2

公开(公告)日：2015-07-07

申请号：US13531437

申请日：2012-06-22

申请人： Yi-Gyeong Kim ,  Min-Hyung Cho ,  Tae Moon Roh ,  Jong-Kee Kwon ,  Woo Seok Yang ,  Jongdae Kim

发明人： Yi-Gyeong Kim ,  Min-Hyung Cho ,  Tae Moon Roh ,  Jong-Kee Kwon ,  Woo Seok Yang ,  Jongdae Kim

IPC分类号： H03F99/00 ,  H03F3/08

CPC分类号： H03F3/08

摘要： Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current.

摘要翻译： 公开了一种声音检测电路，其包括：感测单元，被配置为响应于声音信号的声压级产生AC信号; 放大单元，被配置为放大AC信号; 以及偏置电压产生单元，被配置为产生要提供给所述放大单元的偏置电压。 偏置电压产生单元包括被配置为提供功率电流的电流源; 以及电流电压转换电路，被配置为将功率电流转换成偏置电压并且减少由于功率电流引起的噪声。

公开(公告)号：US08300850B2

公开(公告)日：2012-10-30

申请号：US12511361

申请日：2009-07-29

申请人： Min Hyung Cho ,  Yi Gyeong Kim ,  Jae Won Nam ,  Jong Kee Kwon

发明人： Min Hyung Cho ,  Yi Gyeong Kim ,  Jae Won Nam ,  Jong Kee Kwon

IPC分类号： H04R3/00

CPC分类号： H04R3/00

摘要： Provided is a read-out circuit that is connected to a microphone and configured to linearly amplify a current signal generated by the microphone and output the amplified current signal. The read-out circuit includes an amplification unit and a feedback resistor. The amplification unit has an amplification gain between 0 and 1. The feedback resistor is connected between input and output terminals of the amplification unit. As the amplification gain of the amplification unit becomes closer to 1, an input impedance becomes higher. A preamp of the read-out circuit can have a high input impedance due to the amplification gain, and the read-out circuit can be manufactured using a CMOS process.

摘要翻译： 提供了一种连接到麦克风并被配置为线性放大由麦克风产生的电流信号并输出​​放大的电流信号的读出电路。 读出电路包括放大单元和反馈电阻器。 放大单元的放大增益在0和1之间。反馈电阻连接在放大单元的输入和输出端之间。 随着放大单元的放大增益变得更接近于1，输入阻抗变高。 由于放大增益，读出电路的前置放大器可以具有高输入阻抗，并且读出电路可以使用CMOS工艺制造。