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24 条记录 (耗时 0.012 秒)

    Memory cell and memory device using the same
    1.
    发明授权
    Memory cell and memory device using the same 有权
    内存单元和内存设备使用相同

    公开(公告)号：US08493768B2

    公开(公告)日：2013-07-23

    申请号：US13300688

    申请日：2011-11-21

    申请人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    发明人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22

    摘要： Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

    摘要翻译： 提供一种存储单元，包括：铁电晶体管; 电连接到所述铁电晶体管的多个开关元件; 以及多个控制线，用于将各个控制信号发送到多个开关元件中的每一个，用于分别控制多个开关元件。 多个开关元件被配置为基于各个控制信号单独控制，以防止铁电晶体管的每个电极浮动。

    Method and apparatus for modeling source-drain current of thin film transistor
    2.
    发明授权
    Method and apparatus for modeling source-drain current of thin film transistor 有权
    薄膜晶体管源漏电流建模方法及设备

    公开(公告)号：US08095343B2

    公开(公告)日：2012-01-10

    申请号：US12201457

    申请日：2008-08-29

    申请人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    发明人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    IPC分类号： G06F17/11

    CPC分类号： G06F17/5036

    摘要： Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

    摘要翻译： 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据，样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时，通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值，其中当前模型是用于预测TFT的源极 - 漏极电流的模型。

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20110266542A1

    公开(公告)日：2011-11-03

    申请号：US13094933

    申请日：2011-04-27

    申请人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

    发明人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

    IPC分类号： H01L29/04 ,  H01L21/336

    CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L29/78648

    摘要： Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield.

    摘要翻译： 提供一种包括双栅晶体管的半导体器件及其制造方法。 半导体器件包括下栅极电极，下栅电极上的上栅电极，插入在下栅电极和上栅电极之间的接触插塞，并将下栅电极连接到上栅电极，功能电极 与上栅电极间隔开并形成与上栅电极相同的高度。 表现出高场效应迁移率的双栅极晶体管被施加到半导体器件，从而可以提高半导体器件的特性。 特别是，由于不需要附加的掩模或沉积工艺，所以大面积的高分辨率半导体器件既可以增加工艺成本也不会降低产量。

    MEMORY CELL AND MEMORY DEVICE USING THE SAME
    7.
    发明申请
    MEMORY CELL AND MEMORY DEVICE USING THE SAME 有权
    使用该存储单元的存储单元和存储器件

    公开(公告)号：US20120134197A1

    公开(公告)日：2012-05-31

    申请号：US13300688

    申请日：2011-11-21

    申请人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    发明人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22

    摘要： Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

    摘要翻译： 提供一种存储单元，包括：铁电晶体管; 电连接到所述铁电晶体管的多个开关元件; 以及多个控制线，用于将各个控制信号发送到多个开关元件中的每一个，用于分别控制多个开关元件。 多个开关元件被配置为基于各个控制信号单独控制，以防止铁电晶体管的每个电极浮动。

    POWER REDUCTION TELEVISION WITH PHOTO FRAME
    8.
    发明申请
    POWER REDUCTION TELEVISION WITH PHOTO FRAME 审中-公开
    电源减少电视与相框

    公开(公告)号：US20110249202A1

    公开(公告)日：2011-10-13

    申请号：US13080831

    申请日：2011-04-06

    申请人： Sang Hee PARK ,  Chi Sun Hwang ,  Min Ki Ryu

    发明人： Sang Hee PARK ,  Chi Sun Hwang ,  Min Ki Ryu

    IPC分类号： H04N5/66 ,  H04N3/14

    CPC分类号： H04N5/63 ,  H04N5/64

    摘要： A power reduction television with a photo frame is provided. The power reduction television includes a first display configured to display a first video image, a low power second display configured to display a second video image, and a display control unit configured to control the second display to display the second video image, when the first video image is not displayed through the first display.

    摘要翻译： 提供带有相框的减速电视机。 功率降低电视包括被配置为显示第一视频图像的第一显示器，被配置为显示第二视频图像的低功率第二显示器，以及显示控制单元，被配置为当第一视频图像被显示时控制第二显示器显示第二视频图像 视频图像不会通过第一个显示屏显示。

    APPARATUS FOR REACTIVE SPUTTERING DEPOSITION
    9.
    发明申请
    APPARATUS FOR REACTIVE SPUTTERING DEPOSITION 审中-公开
    反应溅射沉积装置

    公开(公告)号：US20100258437A1

    公开(公告)日：2010-10-14

    申请号：US12741667

    申请日：2008-09-02

    申请人： Woo Seok Cheong ,  Chi Sun Hwang ,  Min Ki Ryu

    发明人： Woo Seok Cheong ,  Chi Sun Hwang ,  Min Ki Ryu

    IPC分类号： C23C14/34

    CPC分类号： C23C14/0047 ,  C23C14/3464

    摘要： Provided is a reactive sputtering apparatus, and more particularly, a reactive sputtering apparatus capable of effectively ionizing a reactive gas using inductively coupled plasma (ICP). The reactive sputtering apparatus includes: a chamber having an inlet port for introducing a plasma gas thereinto and an outlet port for exhausting the gas used during reactive sputtering to the exterior; an ICP generator disposed on the chamber, ionizing a reactive gas, and injecting the ionized gas into the chamber; and at least one sputter gun located at a side surface of the chamber and supporting a target. Therefore, the reactive sputtering apparatus can improve an ionization rate of a reactive gas using inductively coupled plasma to reduce a process temperature and improve uniformity and step coverage of thin film deposition at low cost.

    摘要翻译： 提供了一种反应性溅射装置，更具体地，涉及一种使用电感耦合等离子体（ICP）能够有效地电离反应性气体的反应溅射装置。 反应性溅射装置包括：具有用于将等离子体气体引入其中的入口的室和用于将反应性溅射期间使用的气体排出到外部的出口; 设置在所述室上的ICP发生器，使反应气体电离，并将所述电离气体注入所述室中; 以及位于所述室的侧表面处并支撑靶的至少一个溅射枪。 因此，反应溅射装置可以使用电感耦合等离子体来提高反应气体的离子化速度，以降低处理温度，并以低成本提高薄膜沉积的均匀性和步骤覆盖。