公开(公告)号：US20100006837A1

公开(公告)日：2010-01-14

申请号：US12496558

申请日：2009-07-01

申请人： Doo Hee Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Hye Yong Chu ,  Kyoung Ik Cho ,  Shin Hyuk Yang ,  Chun Won Byun ,  Eun Suk Park ,  Oh Sang Kwon ,  Min Ki Ryu ,  Jae Heon Shin ,  Woo Seok Cheong ,  Sung Mook Chung ,  Jeong Ik Lee

发明人： Doo Hee Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Hye Yong Chu ,  Kyoung Ik Cho ,  Shin Hyuk Yang ,  Chun Won Byun ,  Eun Suk Park ,  Oh Sang Kwon ,  Min Ki Ryu ,  Jae Heon Shin ,  Woo Seok Cheong ,  Sung Mook Chung ,  Jeong Ik Lee

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01B1/08

CPC分类号： H01L29/7869 ,  C23C14/08 ,  H01L29/247

摘要： Provided are a composition for an oxide semiconductor thin film, a field effect transistor using the same and a method of fabricating the field effect transistor. The composition includes an aluminum oxide, a zinc oxide, an indium oxide and a tin oxide. The thin film formed of the composition is in amorphous phase. The field effect transistor having an active layer formed of the composition can have an improved electrical characteristic and be fabricated by a low temperature process.

摘要翻译： 提供了一种用于氧化物半导体薄膜的组合物，使用该组合物的场效应晶体管和制造场效应晶体管的方法。 该组合物包括氧化铝，氧化锌，氧化铟和氧化锡。 由组合物形成的薄膜是非晶相。 具有由组合物形成的有源层的场效应晶体管可以具有改进的电特性并通过低温工艺制造。

公开(公告)号：US20110266542A1

公开(公告)日：2011-11-03

申请号：US13094933

申请日：2011-04-27

申请人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

发明人： Min Ki RYU ,  Sang Hee Park ,  Chi Sun Hwang ,  Kyoung Ik Cho

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L29/78648

摘要： Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield.

摘要翻译： 提供一种包括双栅晶体管的半导体器件及其制造方法。 半导体器件包括下栅极电极，下栅电极上的上栅电极，插入在下栅电极和上栅电极之间的接触插塞，并将下栅电极连接到上栅电极，功能电极 与上栅电极间隔开并形成与上栅电极相同的高度。 表现出高场效应迁移率的双栅极晶体管被施加到半导体器件，从而可以提高半导体器件的特性。 特别是，由于不需要附加的掩模或沉积工艺，所以大面积的高分辨率半导体器件既可以增加工艺成本也不会降低产量。

公开(公告)号：US20120286271A1

公开(公告)日：2012-11-15

申请号：US13467674

申请日：2012-05-09

申请人： Him Chan OH ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu

发明人： Him Chan OH ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L21/336 ,  B82Y40/00 ,  B82Y99/00

CPC分类号： H01L29/7869

摘要： Disclosed are an oxide thin film transistor resistant to light and bias stress, and a method of manufacturing the same. The method includes forming a gate electrode on a substrate; forming a gate insulating layer on an upper part including the gate electrode; forming a source electrode and a drain electrode on the insulating layer; forming an active layer insulated from the gate electrode by the gate insulating layer and formed of an oxide semiconductor and a diffusion barrier film; and forming a protective layer on a portion of the source electrode and drain electrode and the upper part including the active layer, wherein the diffusion barrier film reduces movement of holes and prevents ionized oxygen vacancies from being diffused.

摘要翻译： 公开了耐光和偏压应力的氧化物薄膜晶体管及其制造方法。 该方法包括在基板上形成栅电极; 在包括所述栅电极的上部形成栅极绝缘层; 在绝缘层上形成源电极和漏电极; 通过所述栅极绝缘层形成与所述栅极绝缘的有源层，并由氧化物半导体和扩散阻挡膜形成; 以及在源电极和漏电极以及包括有源层的上部的一部分上形成保护层，其中扩散阻挡膜减小空穴的移动并防止电离的氧空位扩散。

公开(公告)号：US20110305062A1

公开(公告)日：2011-12-15

申请号：US12887316

申请日：2010-09-21

申请人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

发明人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations.

摘要翻译： 提供了一种存储器单元和使用该存储单元的存储器件，特别地，包括作为存储单元的铁电晶体管的非易失性非破坏性可读随机存取存储单元和使用该存储单元的存储器件。 存储单元包括具有施加了参考电压的漏极的铁电晶体管，被配置为允许铁电晶体管的源被响应于扫描信号连接到第一线的第一开关，以及被配置为 允许铁电晶体管的栅极响应于扫描信号连接到第二线。 存储器件允许随机访问并执行非破坏性读出（NDRO）操作。

公开(公告)号：US20110249202A1

公开(公告)日：2011-10-13

申请号：US13080831

申请日：2011-04-06

申请人： Sang Hee PARK ,  Chi Sun Hwang ,  Min Ki Ryu

发明人： Sang Hee PARK ,  Chi Sun Hwang ,  Min Ki Ryu

IPC分类号： H04N5/66 ,  H04N3/14

CPC分类号： H04N5/63 ,  H04N5/64

摘要： A power reduction television with a photo frame is provided. The power reduction television includes a first display configured to display a first video image, a low power second display configured to display a second video image, and a display control unit configured to control the second display to display the second video image, when the first video image is not displayed through the first display.

摘要翻译： 提供带有相框的减速电视机。 功率降低电视包括被配置为显示第一视频图像的第一显示器，被配置为显示第二视频图像的低功率第二显示器，以及显示控制单元，被配置为当第一视频图像被显示时控制第二显示器显示第二视频图像 视频图像不会通过第一个显示屏显示。

公开(公告)号：US08409935B2

公开(公告)日：2013-04-02

申请号：US13590768

申请日：2012-08-21

申请人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

发明人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

IPC分类号： H01L21/00

CPC分类号： H01L29/66742 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/7869

摘要： A method of manufacturing a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. The lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel.

摘要翻译： 一种制造透明晶体管的方法，所述透明晶体管包括形成在所述基板上的基板，源极和漏极，每个具有下透明层，金属层和上透明层的多层结构，在所述源极和漏极之间形成的沟道 电极和与通道对准的栅电极。 下透明层或上透明层由与通道相同的透明半导体层形成。

公开(公告)号：US08095343B2

公开(公告)日：2012-01-10

申请号：US12201457

申请日：2008-08-29

申请人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

发明人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

IPC分类号： G06F17/11

CPC分类号： G06F17/5036

摘要： Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

摘要翻译： 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据，样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时，通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值，其中当前模型是用于预测TFT的源极 - 漏极电流的模型。

公开(公告)号：US08269220B2

公开(公告)日：2012-09-18

申请号：US12554066

申请日：2009-09-04

申请人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

发明人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

IPC分类号： H01L29/04

CPC分类号： H01L29/66742 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/7869

摘要： Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. Here, the lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel. Thus, the use of the multi-layered transparent conductive layer can ensure transparency and conductivity, overcome a problem of contact resistance between the source and drain electrodes and a semiconductor, and improve processibility by patterning the multi-layered transparent conductive layer all at once, while deposition is performed layer by layer.

摘要翻译： 提供了一种透明晶体管，其包括形成在基板上的基板，源电极和漏电极，每个具有下透明层，金属层和上透明层的多层结构，在源极和漏极之间形成的沟道， 以及与沟道对准的栅电极。 这里，下透明层或上透明层由与通道相同的透明半导体层形成。 因此，使用多层透明导电层可以确保透明性和导电性，克服了源极和漏极之间的接触电阻和半导体的问题，并且通过一次构图多层透明导电层来提高加工性， 同时逐层进行沉积。

公开(公告)号：US20100155792A1

公开(公告)日：2010-06-24

申请号：US12554066

申请日：2009-09-04

申请人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyong Ik Cho

发明人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyong Ik Cho

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66742 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/7869

摘要： Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. Here, the lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel. Thus, the use of the multi-layered transparent conductive layer can ensure transparency and conductivity, overcome a problem of contact resistance between the source and drain electrodes and a semiconductor, and improve processibility by patterning the multi-layered transparent conductive layer all at once, while deposition is performed layer by layer.

摘要翻译： 提供了一种透明晶体管，其包括形成在基板上的基板，源电极和漏电极，每个具有下透明层，金属层和上透明层的多层结构，在源极和漏极之间形成的沟道， 以及与沟道对准的栅电极。 这里，下透明层或上透明层由与通道相同的透明半导体层形成。 因此，使用多层透明导电层可以确保透明性和导电性，克服了源极和漏极之间的接触电阻和半导体的问题，并且通过一次构图多层透明导电层来提高加工性， 同时逐层进行沉积。

公开(公告)号：US20090157372A1

公开(公告)日：2009-06-18

申请号：US12201457

申请日：2008-08-29

申请人： Jae Heon SHIN ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

发明人： Jae Heon SHIN ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

IPC分类号： G06G7/62

CPC分类号： G06F17/5036

摘要： Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

摘要翻译： 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据，样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时，通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值，其中当前模型是用于预测TFT的源极 - 漏极电流的模型。