公开(公告)号：US20100128763A1

公开(公告)日：2010-05-27

申请号：US12697677

申请日：2010-02-01

申请人： Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

发明人： Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

IPC分类号： H04B1/38

CPC分类号： H04L25/03006 ,  H04L25/03878

摘要： A communication device includes a storage unit that stores a predetermined eye mask pattern indicating a receivable range, a receiving unit that receives data from the other communication device, a waveform comparing unit for comparing a waveform of the received data with the eye mask pattern to generate comparison result data and a transmission unit for transmitting the comparison result data to the other communication device.

摘要翻译： 通信装置包括存储单元，其存储指示可接收范围的预定眼图模式，从另一通信装置接收数据的接收单元，用于将接收数据的波形与眼屏图案进行比较的波形比较单元， 比较结果数据和用于将比较结果数据发送到另一通信设备的发送单元。

公开(公告)号：US08254472B2

公开(公告)日：2012-08-28

申请号：US12697677

申请日：2010-02-01

申请人： Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

发明人： Noboru Morita ,  Michio Hibi ,  Manabu Yamazaki

IPC分类号： H04L27/00

CPC分类号： H04L25/03006 ,  H04L25/03878

摘要： A communication device includes a storage unit that stores a predetermined eye mask pattern indicating a receivable range, a receiving unit that receives data from the other communication device, a waveform comparing unit for comparing a waveform of the received data with the eye mask pattern to generate comparison result data and a transmission unit for transmitting the comparison result data to the other communication device.

摘要翻译： 通信装置包括存储单元，其存储指示可接收范围的预定眼图模式，从另一通信装置接收数据的接收单元，用于将接收数据的波形与眼屏图案进行比较的波形比较单元，生成 比较结果数据和用于将比较结果数据发送到另一通信设备的发送单元。

公开(公告)号：US07615498B2

公开(公告)日：2009-11-10

申请号：US11655261

申请日：2007-01-19

申请人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

发明人： Yoichi Sasaki ,  Koichi Ohto ,  Noboru Morita ,  Tatsuya Usami ,  Hidenobu Miyamoto

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76832

摘要： A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.

摘要翻译： 半导体器件200包括形成在半导体衬底（未示出）上的SiCN膜202，形成在其上的第一SiOC膜204，形成在其上的SiCN膜208，形成在其上的第二SiOC膜210，SiO 2膜212和SiCN膜 214。 第一SiOC膜204具有形成在其中的阻挡金属层216和通孔218，并且第二SiOC膜210具有形成在其中的阻挡金属层220和布线金属层222。 第二SiOC膜210的碳含量被调节为大于第一SiOC膜204的碳含量。这使得可以在保持绝缘夹层的低介电常数的同时，改善绝缘中间层与其它绝缘层的粘附性。

公开(公告)号：US20070045861A1

公开(公告)日：2007-03-01

申请号：US11591704

申请日：2006-11-02

申请人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

发明人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.

摘要翻译： 半导体器件具有半导体衬底和设置在其上的多层布线装置。 多层绞合装置包括其中形成有金属布线图案的至少一个绝缘层结构。 绝缘层结构包括第一SiOCH层，形成在第一SiOCH层上的第二SiOCH层和形成在第二SiOCH层上的二氧化硅（SiO 2）层。 第二SiOCH层的碳（C）密度低于第一SiOCH层的碳（C）密度，氢（H）密度低于第一SiOCH层的密度，氧（O）密度高于第一SiOCH层 。

公开(公告)号：US07563705B2

公开(公告)日：2009-07-21

申请号：US11359393

申请日：2006-02-23

申请人： Takashi Tonegawa ,  Koji Arita ,  Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Yoichi Sasaki ,  Sadayuki Ohnishi ,  Ryohei Kitao

发明人： Takashi Tonegawa ,  Koji Arita ,  Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Yoichi Sasaki ,  Sadayuki Ohnishi ,  Ryohei Kitao

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/32051 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76811 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.

摘要翻译： 一种半导体器件的制造方法，包括在包括诸如MSQ，SiC和SiCN的有机低电介质膜的绝缘层中形成通孔的步骤，然后通过阻挡金属将布线材料包埋在通孔中。 根据该方法，使用能够代替由有机成分构成的基团（甲基）并覆盖暴露的有机物的表面的He / H 2气体，在形成通孔并且在阻挡金属沉积之前进行等离子体处理 具有氢的低介电膜（MSQ）或能够分解基团（甲基）而不去除有机低介电分子的He气体。 结果，低电介质膜（MSQ）的表面被重新形成为亲水性，因此提高了与阻挡金属的粘合性，从而可以防止隔离金属的分离和划痕的发生。

公开(公告)号：US07461114B2

公开(公告)日：2008-12-02

申请号：US10645498

申请日：2003-08-22

申请人： Toshiro Nakazuru ,  Shigeaki Okutani ,  Noboru Morita

发明人： Toshiro Nakazuru ,  Shigeaki Okutani ,  Noboru Morita

IPC分类号： G06F15/00

CPC分类号： G06F17/142

摘要： A Fourier transform apparatus whose pipeline width is independent of transform point number of individual pipeline FFT circuits in each stage and composed of a preceding stage and a succeeding stage. Each of the stages includes M(power of 2)-point radix 2 pipeline FFT circuits each having two-parallel inputs/outputs in a number of a (divisor of M) which are equal in respect to the transform point number and data permutating means for data supply to the transform means of each stage so that the pipeline width of the Fourier transform apparatus is made independent of the transform point numbers of the individual pipeline FFT circuits in each stage.

摘要翻译： 一个傅立叶变换装置，其管线宽度与每个阶段各个管线FFT电路的转换点数无关，由前一级和后一级组成。 每个级包括M个（2个）点2个流水线FFT电路，每个具有两个对于转换点号相等的（除数为M）的并行输入/输出，并且数据排列装置 用于将数据提供给每个级的变换装置，使得傅立叶变换装置的管线宽度独立于每个级中各个管线FFT电路的变换点号。

公开(公告)号：US20080290522A1

公开(公告)日：2008-11-27

申请号：US12180652

申请日：2008-07-28

申请人： Sadayuki Ohnishi ,  Kouichi Owto ,  Tatsuya Usami ,  Noboru Morita ,  Kouji Arita ,  Ryouhei Kitao ,  Youichi Sasaki

发明人： Sadayuki Ohnishi ,  Kouichi Owto ,  Tatsuya Usami ,  Noboru Morita ,  Kouji Arita ,  Ryouhei Kitao ,  Youichi Sasaki

IPC分类号： H01L23/48

CPC分类号： H01L21/02126 ,  C23C16/401 ,  H01L21/02137 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/31633 ,  H01L21/76801 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum.

摘要翻译： 半导体器件包括形成在半导体衬底上或之上的层间绝缘膜。 在层间绝缘膜中形成开口并到达下层金属布线导体。 通过阻挡金属通过用含Cu金属填充开口来形成金属塞。 层间绝缘膜包括含碳氧化硅膜中具有Si-CH2键的含碳氧化硅（SiOCH）膜的绝缘膜。 绝缘膜中的Si-CH 2键（1360cm -1）与Si-CH 3键（1270cm -1）的比例在以FTIR光谱的峰高比测定的0.03〜0.05的范围内。

公开(公告)号：US20070246804A1

公开(公告)日：2007-10-25

申请号：US11534941

申请日：2006-09-25

申请人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Kazuhiko Endo

发明人： Koichi Ohto ,  Tatsuya Usami ,  Noboru Morita ,  Kazuhiko Endo

IPC分类号： H01L23/52 ,  C07F7/04

CPC分类号： H01L21/7681 ,  C23C16/30 ,  C23C16/36 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device size, there have arisen strong demands that dielectric constants should be further reduced. Furthermore, because the etching selection ratio of SiOC to SiCN as well as that of SiOC to SiC are small, if SiCN or SiC is used as the etching stopper film, the surface of the metal interconnection layer may be oxidized at the time of photoresist removal, which gives rise to a problem of high contact resistance. The present invention relates to an organic film made of one of SiOCH, SiCHN and SiCH that is formed using, as a source, a polyorganosilane whose C/Si ratio is at least 5 or greater and molecular weight is 100 or greater, and a semiconductor device wherein such an organic insulating film is used, and more particularly to a semiconductor device having a trench structure.

摘要翻译： 目前被广泛研究的SiC和SiCN的介电常数分别为4.5〜5左右，SiOC为2.8〜3.0左右。 随着器件尺寸减小引起的互连尺寸和互连间距的进一步小型化，出现了强烈的要求，即应进一步降低介电常数。 此外，由于SiOC与SiCN的蚀刻选择比以及SiOC与SiC的蚀刻选择比小，因此如果使用SiCN或SiC作为蚀刻停止膜，则金属配线层的表面在光刻胶去除时可能被氧化 ，这导致高接触电阻的问题。 本发明涉及使用以C / Si比为5以上且分子量为100以上的聚有机硅烷作为源的SiOCH，SiCHN和SiCH之一构成的有机膜，以及半导体 使用这种有机绝缘膜的装置，更具体地说涉及具有沟槽结构的半导体器件。

公开(公告)号：US07074698B2

公开(公告)日：2006-07-11

申请号：US10766921

申请日：2004-01-30

申请人： Noboru Morita ,  Tatsuya Usami ,  Koichi Ohto ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

发明人： Noboru Morita ,  Tatsuya Usami ,  Koichi Ohto ,  Sadayuki Ohnishi ,  Koji Arita ,  Ryohei Kitao ,  Yoichi Sasaki

IPC分类号： H01L21/26 ,  H01L21/42

CPC分类号： H01L21/02126 ,  C23C16/325 ,  C23C16/36 ,  C23C16/401 ,  C23C16/46 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76829 ,  H01L21/76832 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g., H2 or He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.

摘要翻译： 提供了使用PECVD方法制造半导体器件的方法，其提高了沉积的介电层对下层的粘附强度和沉积的介电层的可靠性。 在将基板放置在室中之后，将导热率为0.1W / mK以上的气体（例如H 2 H 2或He）引入到室内，从而使气体与基板接触 稳定基板的温度。 在引入气体的步骤之后，使用PECVD方法将期望的电介质层沉积在室中的衬底上或衬底上。 作为所需的介电层，优选使用具有低介电常数的介电层，例如SiCH，SiCHN或SiOCH层。

公开(公告)号：US20060141778A1

公开(公告)日：2006-06-29

申请号：US11359393

申请日：2006-02-23

申请人： Takashi Tonegawa ,  Koji Arita ,  Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Yoichi Sasaki ,  Sadayuki Ohnishi ,  Ryohei Kitao

发明人： Takashi Tonegawa ,  Koji Arita ,  Tatsuya Usami ,  Noboru Morita ,  Koichi Ohto ,  Yoichi Sasaki ,  Sadayuki Ohnishi ,  Ryohei Kitao

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/32051 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76811 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.

摘要翻译： 一种半导体器件的制造方法，包括在包括诸如MSQ，SiC和SiCN的有机低电介质膜的绝缘层中形成通孔的步骤，然后通过阻挡金属将布线材料包埋在通孔中。 根据该方法，使用能够代替由有机成分构成的基团（甲基）的He / H 2气体，在形成通路孔之后和隔离金属沉积之前进行等离子体处理 并用氢气覆盖暴露的有机低介电膜（MSQ）的表面，或者能够分解基团（甲基）而不去除有机低介电分子的He气体。 结果，低电介质膜（MSQ）的表面被重新形成为亲水性，因此提高了与阻挡金属的粘附性，从而可以防止隔离金属的分离和划痕的发生。