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公开(公告)号:US08595927B2
公开(公告)日:2013-12-03
申请号:US13408597
申请日:2012-02-29
申请人: Tsutomu Yamauchi , Satoru Kawai
发明人: Tsutomu Yamauchi , Satoru Kawai
IPC分类号: H05K3/10
CPC分类号: H05K3/0038 , H05K3/427 , H05K3/4661 , H05K2201/09563 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
摘要: A method for manufacturing a printed wiring board includes preparing a core substrate having first and second surfaces, forming a penetrating hole from the first surface toward the second surface of the substrate, forming first conductor on the first surface of the substrate, forming second conductor on the second surface of the substrate, and filling conductive material in the hole such that through-hole conductor connecting the first and second conductors is formed. The forming of the hole includes forming a first opening portion on the first-surface side of the substrate, a second opening portion from the bottom of the first portion toward the second surface, and a third opening portion from the bottom of the second portion toward the second surface, and the forming of the hole satisfies X2
摘要翻译: 一种制造印刷电路板的方法,包括制备具有第一和第二表面的芯基板,从基板的第一表面朝向第二表面形成贯穿孔,在基板的第一表面上形成第一导体,在基板的第一表面上形成第二导体 衬底的第二表面,并且将导电材料填充到孔中,使得形成连接第一和第二导体的通孔导体。 孔的形成包括在基板的第一表面侧形成第一开口部分,从第一部分的底部朝向第二表面的第二开口部分,以及从第二部分的底部到第二开口部分的第三开口部分 第二表面和孔的形成满足X2
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2.
公开(公告)号:US08197659B2
公开(公告)日:2012-06-12
申请号:US13240626
申请日:2011-09-22
申请人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
发明人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
CPC分类号: C25D5/02 , H05K3/108 , H05K3/421 , H05K3/423 , H05K3/429 , H05K3/4661 , H05K2201/0116 , H05K2201/09563 , H05K2203/025 , H05K2203/0257 , Y10T29/49124 , Y10T428/24917 , Y10T428/24926 , Y10T428/249955 , Y10T428/249958
摘要: A method for manufacturing a multilayer printed circuit board including providing a core substrate having a penetrating-hole, forming an electroless plated film on a surface of the substrate and an inner wall surface of the penetrating-hole, electrolytically plating the substrate while moving with respect to the surface of the substrate an insulating member in contact with the surface of the substrate such that an electrolytic plated film is formed on the electroless plated film, an opening space inside the penetrating-hole is filled with an electrolytic material, and a through-hole conductor structure is formed in the penetrating-hole, forming an etching resist having an opening pattern on the electrolytic plated film, and removing an exposed pattern of the electrolytic plated film exposed by the opening pattern and a pattern of the electroless plated film under the exposed pattern such that a conductor circuit is formed on the surface of the substrate.
摘要翻译: 一种多层印刷电路板的制造方法,其特征在于,具有提供具有贯通孔的芯基板,在所述基板的表面上形成无电镀膜和所述贯通孔的内壁面,对所述基板进行电解电镀,同时相对于 在所述基板的表面上与所述基板的表面接触的绝缘构件,使得在所述无电镀膜上形成电解电镀膜,所述贯通孔内的开口空间填充有电解材料, 在导电孔中形成空穴导体结构,在电解镀膜上形成具有开口图案的抗蚀剂,并且除去由开口图案露出的电解电镀膜的露出图案,以及将化学镀膜的图案 使得在基板的表面上形成导体电路。
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3.
公开(公告)号:US20090107847A1
公开(公告)日:2009-04-30
申请号:US12342866
申请日:2008-12-23
申请人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
发明人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
IPC分类号: C25D5/00
CPC分类号: C25D5/02 , H05K3/108 , H05K3/421 , H05K3/423 , H05K3/429 , H05K3/4661 , H05K2201/0116 , H05K2201/09563 , H05K2203/025 , H05K2203/0257 , Y10T29/49124 , Y10T428/24917 , Y10T428/24926 , Y10T428/249955 , Y10T428/249958
摘要: A plating method includes providing an article in a plating bath, covering a surface of the article with an insulating member in the plating bath, and electrolytically plating the article while moving one of the insulating member and the article relative to each other.
摘要翻译: 电镀方法包括在镀浴中提供物品,在电镀槽中用绝缘构件覆盖制品的表面,以及在使绝缘构件和制品相对于彼此移动中的同时对制品进行电解电镀。
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4.
公开(公告)号:US20090107711A1
公开(公告)日:2009-04-30
申请号:US12342772
申请日:2008-12-23
申请人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
发明人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
CPC分类号: C25D5/02 , H05K3/108 , H05K3/421 , H05K3/423 , H05K3/429 , H05K3/4661 , H05K2201/0116 , H05K2201/09563 , H05K2203/025 , H05K2203/0257 , Y10T29/49124 , Y10T428/24917 , Y10T428/24926 , Y10T428/249955 , Y10T428/249958
摘要: A multilayer printed circuit board has an insulation layer, a first conductor layer provided over a first side of the insulation layer, a second conductor layer provided over a second side of the insulation layer opposite to the first side, and multiple filled vias electrically connecting the first conductor layer and the second conductor layer. The filled vias have upper surfaces, respectively, and each of the upper surfaces is made such that a difference between a lowest point and a highest point of each of the upper surfaces is less than or equal to about 7 μm.
摘要翻译: 多层印刷电路板具有绝缘层,设置在绝缘层的第一侧上的第一导体层,设置在与第一侧相反的绝缘层的第二侧上的第二导体层,以及多个填充的通孔, 第一导体层和第二导体层。 填充的通孔分别具有上表面,并且每个上表面被制成使得每个上表面的最低点和最高点之间的差小于或等于约7μm。
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公开(公告)号:US20090029037A1
公开(公告)日:2009-01-29
申请号:US12186919
申请日:2008-08-06
申请人: Toru NAKAI , Satoru KAWAI
发明人: Toru NAKAI , Satoru KAWAI
IPC分类号: H05K3/28
CPC分类号: H05K3/423 , C25D5/02 , C25D5/16 , C25D5/22 , C25D7/06 , C25D17/005 , H05K3/421 , H05K3/429 , H05K2201/0394 , H05K2201/09563 , H05K2201/096 , H05K2203/0143 , H05K2203/0257 , H05K2203/1545
摘要: A plating apparatus and method to perform plating in non-through-hole openings or through-hole openings of a printed wiring board having at least either non-through holes or through-holes to form via-hole conductors or through-hole conductors. The plating method contacts a printed wiring board having the non-through holes or through-holes with a plating solution including plating ingredients, and plates metal on a surface of the printed wiring board while making contact with at least a portion of a pliable contact body.
摘要翻译: 一种电镀装置和方法,用于在具有至少一个非通孔或通孔的印刷电路板的非通孔开口或通孔开口中执行电镀以形成通孔导体或通孔导体。 电镀方法在印刷电路板的表面上与具有非通孔或通孔的印刷电路板接触,其中电镀液包括电镀成分和板金属,同时与柔性接触体的至少一部分接触 。
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6.
公开(公告)号:US07481909B2
公开(公告)日:2009-01-27
申请号:US11232906
申请日:2005-09-23
申请人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
发明人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
CPC分类号: C25D5/02 , H05K3/108 , H05K3/421 , H05K3/423 , H05K3/429 , H05K3/4661 , H05K2201/0116 , H05K2201/09563 , H05K2203/025 , H05K2203/0257 , Y10T29/49124 , Y10T428/24917 , Y10T428/24926 , Y10T428/249955 , Y10T428/249958
摘要: A plating apparatus includes a plating bath, a member provided in the plating bath and a moving device. The member is configured to cover a surface to be plated. A moving device is configured to relatively move the member or the surface to change an area of the surface covered by the member.
摘要翻译: 电镀装置包括镀浴,设置在电镀槽中的部件和移动装置。 该构件构造成覆盖待镀表面。 移动装置构造成使构件或表面相对移动以改变由构件覆盖的表面的区域。
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公开(公告)号:US20060065534A1
公开(公告)日:2006-03-30
申请号:US11232906
申请日:2005-09-23
申请人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
发明人: Toru Nakai , Satoru Kawai , Hiroshi Niwa , Yoshiyuki Iwata
CPC分类号: C25D5/02 , H05K3/108 , H05K3/421 , H05K3/423 , H05K3/429 , H05K3/4661 , H05K2201/0116 , H05K2201/09563 , H05K2203/025 , H05K2203/0257 , Y10T29/49124 , Y10T428/24917 , Y10T428/24926 , Y10T428/249955 , Y10T428/249958
摘要: A plating apparatus includes a plating bath, a member provided in the plating bath and a moving device. The member is configured to cover a surface to be plated. A moving device is configured to relatively move the member or the surface to change an area of the surface covered by the member.
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公开(公告)号:US06882393B2
公开(公告)日:2005-04-19
申请号:US10412351
申请日:2003-04-11
申请人: Satoru Kawai , Tsuyoshi Kamada
发明人: Satoru Kawai , Tsuyoshi Kamada
IPC分类号: G02F1/1333 , G02F1/139 , G02F1/13
CPC分类号: G02F1/1393 , G02F1/133707
摘要: A pair of substrates is disposed in parallel at a gap distance therebetween. Liquid crystal material containing liquid crystal molecules having negative dielectric anisotropy is filled in between the substrates. The liquid crystal molecules are homeotropically aligned. On the opposing surface of one of the substrates, pixel electrodes are disposed in a matrix form and data bus lines and gate bus lines are disposed. The gate bus line passes an inner area of each pixel electrode. Switching elements are formed on the opposing surface of the substrate. Each switching element is controlled by the gate bus line at another row. Protrusions are formed on the opposing surface of one of the substrates. The protrusions divide an area of the pixel electrode into a plurality of areas and each is bent on the gate bus line. A domain border regulating unit is formed on the opposing surface of the other of the substrates. The protrusions and domain border regulating unit define the borders of each domain.
摘要翻译: 一对基板以它们之间的间隙平行设置。 含有具有负介电各向异性的液晶分子的液晶材料填充在基板之间。 液晶分子是垂直对准的。 在一个基板的相对表面上,像素电极以矩阵形式布置,并且布置数据总线和栅极总线。 栅极总线通过每个像素电极的内部区域。 开关元件形成在基板的相对表面上。 每个开关元件由另一排的栅极总线控制。 在一个基板的相对表面上形成突起。 突起将像素电极的区域分割成多个区域,并且在栅极总线上弯曲。 在另一个基板的相对表面上形成域边界调节单元。 突起和域边界调节单元定义每个域的边界。
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公开(公告)号:US06500700B1
公开(公告)日:2002-12-31
申请号:US09675124
申请日:2000-09-28
申请人: Satoru Kawai
发明人: Satoru Kawai
IPC分类号: H01L2184
CPC分类号: H01L27/1288 , G02F1/136213 , G02F1/136286 , H01L27/1214
摘要: An object of the present invention is to provide a fabrication method of a liquid crystal display which can reduce the number of masks used in a photolithography process. According to this structure, a gate bus line and a storage capacitor wiring are formed using a first mask, and first metal films are formed on the whole surface including a sidewall insulating film. Then, etching is performed using a second mask until an active semiconductor layer in a TFT forming area on the gate bus line and in an element separation area between pixels exposes. Along with an electroplating of a metal film on the first metal films on a drain electrode, a third metal film thinner than the second metal film is formed on an active semiconductor between the drain electrode and a source electrode and to a pixel electrode except the element separation area between pixels. Finally, using a third metal film as a mask, the third metal film is removed after removing the active semiconductor layer on the element separation area between pixels.
摘要翻译: 本发明的一个目的是提供一种液晶显示器的制造方法,其可以减少在光刻工艺中使用的掩模的数量。 根据该结构,使用第一掩模形成栅极总线和辅助电容配线,在包括侧壁绝缘膜的整个表面上形成第一金属膜。 然后,使用第二掩模进行蚀刻,直到栅极总线上的TFT形成区域和像素间的元素分离区域中的有源半导体层露出。 随着在漏电极上的第一金属膜上的金属膜的电镀,在漏电极和源电极之间的有源半导体上形成比第二金属膜薄的第三金属膜,除了元件之外的像素电极 像素之间的分离区域。 最后,使用第三金属膜作为掩模,在除去像素之间的元件分离区域上的有源半导体层之后去除第三金属膜。
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公开(公告)号:US06476881B2
公开(公告)日:2002-11-05
申请号:US09778134
申请日:2001-02-06
申请人: Kiyoshi Ozaki , Kouji Tsukao , Satoru Kawai
发明人: Kiyoshi Ozaki , Kouji Tsukao , Satoru Kawai
IPC分类号: G02F1136
CPC分类号: G02F1/1309 , G02F1/136259 , G02F2001/136263
摘要: To provide a liquid crystal display device which allows disconnection defects caused in the manufacturing process to be readily repaired with a higher success rate than conventional cases so that the device can be modified into a non-defective device, and a defect repairing method therefor. In a liquid crystal display device having a lead-out portion provided at a lowermost layer bus line 1 formed on a transparent insulating substrate 6, and a pixel electrode layer 3 formed on the lead-out portion through insulating layers 2, 4, an independent intermediate conductive layer 5 is formed between the lead-out portion and said pixel electrode layer 3.
摘要翻译: 为了提供一种液晶显示装置,其允许在制造过程中引起的断开缺陷以比常规情况更高的成功率被容易地修复,使得该装置可以被修改为无缺陷装置及其缺陷修复方法。 在具有设置在形成在透明绝缘基板6上的最下层总线1上的引出部分和通过绝缘层2,4形成在引出部分上的像素电极层3的液晶显示装置中,独立的 在导出部分和像素电极层3之间形成中间导电层5。
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