公开(公告)号：US08932900B2

公开(公告)日：2015-01-13

申请号：US13216369

申请日：2011-08-24

申请人： Tsun-Kai Tsao ,  Ming-Huei Shen ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

发明人： Tsun-Kai Tsao ,  Ming-Huei Shen ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

IPC分类号： H01L21/8239 ,  H01L45/00

CPC分类号： H01L45/06 ,  H01L45/144 ,  H01L45/1683

摘要： A fine pitch phase change random access memory (“PCRAM”) design and method of fabricating same are disclosed. One embodiment is a phase change memory (“PCM”) cell comprising a spacer defining a rectangular reaction area and a phase change material layer disposed within the reaction area. The PCM cell further comprises a protection layer disposed over the GST film layer and within the area defined by the spacer; and a capping layer disposed over the protection layer and the spacer.

摘要翻译： 公开了一种细间距相变随机存取存储器（“PCRAM”）设计及其制造方法。 一个实施例是相变存储器（“PCM”）单元，其包括限定矩形反应区域的间隔区和设置在反应区域内的相变材料层。 PCM单元进一步包括设置在GST膜层之上并在由间隔物限定的区域内的保护层; 以及设置在所述保护层和间隔物上方的覆盖层。

公开(公告)号：US08610227B2

公开(公告)日：2013-12-17

申请号：US12903871

申请日：2010-10-13

申请人： Shih Pei Chou ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

发明人： Shih Pei Chou ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

IPC分类号： H01L31/0232

CPC分类号： H01L27/14627 ,  H01L27/14621 ,  H01L27/14685

摘要： Provided is an image sensor device. The image sensor device includes a pixel formed in a substrate. The image sensor device includes a first micro-lens embedded in a transparent layer over the substrate. The first micro-lens has a first upper surface that has an angular tip. The image sensor device includes a color filter that is located over the transparent layer. The image sensor device includes a second micro-lens that is formed over the color filter. The second micro-lens has a second upper surface that has an approximately rounded profile. The pixel, the first micro-lens, the color filter, and the second micro-lens are all at least partially aligned with one another in a vertical direction.

摘要翻译： 提供了一种图像传感器装置。 图像传感器装置包括形成在基板中的像素。 图像传感器装置包括嵌入在基板上的透明层中的第一微透镜。 第一微透镜具有具有角尖的第一上表面。 图像传感器装置包括位于透明层上方的滤色器。 图像传感器装置包括形成在滤色器上的第二微透镜。 第二微透镜具有第二上表面，其具有近似圆形的轮廓。 像素，第一微透镜，滤色器和第二微透镜在垂直方向上至少部分地彼此对准。

公开(公告)号：US08273625B2

公开(公告)日：2012-09-25

申请号：US12757172

申请日：2010-04-09

申请人： Ming-Huei Shen ,  Tsun-Kai Tsao ,  Shih-Chang Liu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

发明人： Ming-Huei Shen ,  Tsun-Kai Tsao ,  Shih-Chang Liu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC分类号： H01L21/336

CPC分类号： H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/42328 ,  H01L29/7881

摘要： A semiconductor structure is provided. The semiconductor structure includes a first floating gate on the semiconductor substrate, the floating gate having a concave side surface; a first control gate on the first floating gate; a first spacer adjacent to the first control gate; a first word line adjacent a first side of the first floating gate with a first distance; and an erase gate adjacent a second side of the first floating gate with a second distance less than the first distance, the second side being opposite the first side.

摘要翻译： 提供半导体结构。 半导体结构包括半导体衬底上的第一浮置栅极，浮置栅极具有凹面侧面; 第一个浮动门上的第一个控制门; 与所述第一控制栅极相邻的第一间隔件; 与所述第一浮动栅极的第一侧相邻的第一字线，具有第一距离; 以及与所述第一浮动栅极的第二侧相邻的擦除栅极，其具有小于所述第一距离的第二距离，所述第二侧与所述第一侧相对。

公开(公告)号：US20120235280A1

公开(公告)日：2012-09-20

申请号：US13047468

申请日：2011-03-14

申请人： Wei-Tung HUANG ,  Chun-Tsung KUO ,  Shih-Chang LIU ,  Yeur-Luen TU

发明人： Wei-Tung HUANG ,  Chun-Tsung KUO ,  Shih-Chang LIU ,  Yeur-Luen TU

IPC分类号： H01L29/735 ,  H01L21/331

CPC分类号： H01L29/165 ,  H01L21/8249 ,  H01L29/66242 ,  H01L29/7378

摘要： An integrated circuit includes a bipolar transistor disposed over a substrate. The bipolar transistor includes a base electrode disposed around at least one germanium-containing layer. An emitter electrode is disposed over the at least one germanium-containing layer. At least one isolation structure is disposed between the emitter electrode and the at least one germanium-containing layer. A top surface of the at least one isolation structure is disposed between and electrically isolating a top surface of the emitter electrode from a top surface of the at least one germanium-containing layer.

摘要翻译： 集成电路包括设置在衬底上的双极晶体管。 双极晶体管包括设置在至少一个含锗层周围的基极。 发射极电极设置在所述至少一个含锗层上。 至少一个隔离结构设置在发射电极和至少一个含锗层之间。 所述至少一个隔离结构的顶表面设置在所述发射电极的顶表面与所述至少一个含锗层的顶表面之间并将其电隔离。

公开(公告)号：US20120091549A1

公开(公告)日：2012-04-19

申请号：US12903871

申请日：2010-10-13

申请人： Shih Pei Chou ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

发明人： Shih Pei Chou ,  Shih-Chang Liu ,  Yeur-Luen Tu ,  Chia-Shiung Tsai

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14627 ,  H01L27/14621 ,  H01L27/14685

摘要： Provided is an image sensor device. The image sensor device includes a pixel formed in a substrate. The image sensor device includes a first micro-lens embedded in a transparent layer over the substrate. The first micro-lens has a first upper surface that has an angular tip. The image sensor device includes a color filter that is located over the transparent layer. The image sensor device includes a second micro-lens that is formed over the color filter. The second micro-lens has a second upper surface that has an approximately rounded profile. The pixel, the first micro-lens, the color filter, and the second micro-lens are all at least partially aligned with one another in a vertical direction.

摘要翻译： 提供了一种图像传感器装置。 图像传感器装置包括形成在基板中的像素。 图像传感器装置包括嵌入在基板上的透明层中的第一微透镜。 第一微透镜具有具有角尖的第一上表面。 图像传感器装置包括位于透明层上方的滤色器。 图像传感器装置包括形成在滤色器上的第二微透镜。 第二微透镜具有第二上表面，其具有近似圆形的轮廓。 像素，第一微透镜，滤色器和第二微透镜在垂直方向上至少部分地彼此对准。

公开(公告)号：US07563675B2

公开(公告)日：2009-07-21

申请号：US11782491

申请日：2007-07-24

申请人： Shih-Chang Liu ,  Yuan-Hung Liu ,  Chia-Shiung Tsai

发明人： Shih-Chang Liu ,  Yuan-Hung Liu ,  Chia-Shiung Tsai

IPC分类号： H01L21/8247

CPC分类号： H01L21/32137 ,  H01L21/32115 ,  H01L27/11521

摘要： A method is disclosed for etching a polysilicon material in a manner that prevents formation of an abnormal polysilicon profile. The method includes providing a substrate with a word line and depositing a polysilicon layer over said substrate and word line. An organic bottom antireflective coating (BARC) layer is then deposited over said polysilicon layer. A ladder etch is performed to remove the BARC layer and a portion of the polysilicon layer. The ladder etch consists of a series of etch cycles, with each cycle including a breakthrough etch and a soft landing etch. The breakthrough and soft landing etches are performed using different etchant gases, and at different source and bias powers, pressures, gas flow rates, and periods of time. The ladder etch results in a smooth polysilicon surface without abrupt steps.

摘要翻译： 公开了以防止形成异常多晶硅轮廓的方式蚀刻多晶硅材料的方法。 该方法包括提供具有字线的衬底并在所述衬底和字线上沉积多晶硅层。 然后在所述多晶硅层上沉积有机底部抗反射涂层（BARC）层。 执行梯形蚀刻以去除BARC层和多晶硅层的一部分。 梯形蚀刻由一系列蚀刻循环组成，每个循环包括穿透蚀刻和软着色蚀刻。 使用不同的蚀刻剂气体，不同的源和偏压功率，压力，气体流速和时间段进行突破和软着陆蚀刻。 梯形蚀刻导致光滑的多晶硅表面而没有突然的步骤。

公开(公告)号：US07144773B1

公开(公告)日：2006-12-05

申请号：US11141902

申请日：2005-06-01

申请人： Shih-Chang Liu ,  Chi-Hsin Lo ,  Gwo-Yuh Shiau ,  Chia-Shiung Tsai

发明人： Shih-Chang Liu ,  Chi-Hsin Lo ,  Gwo-Yuh Shiau ,  Chia-Shiung Tsai

IPC分类号： H04L21/336 ,  H04L21/8242 ,  H04L29/788 ,  H04L29/76

CPC分类号： H01L21/76224 ,  H01L21/823481 ,  H01L27/115 ,  H01L27/11521

摘要： A method for forming a split gate flash device is provided. In one embodiment, a semiconductor substrate with a dielectric layer formed thereover is provided. A conductor layer is formed overlying the dielectric layer. A masking layer is deposited overlying the conductor layer. A light sensitive layer is formed overlying the masking layer. The light sensitive layer is patterned and etched to form a pattern of openings therein. The masking layer and the conductor layer are etched according to the pattern of openings in the light sensitive layer. The conductor layer is etched at the outer surface area between the conductor layer and the dielectric layer to form undercuts. The dielectric layer is etched to form a notch profile at the outer surface area between the conductor layer and the dielectric layer and portions of the substrate are etched to form a plurality of trenches. An isolation layer is filled over the plurality of trenches and the masking layer. The masking layer and portions of the conductor layer and isolation layer are etched away, wherein a portion of the isolation layer is preserved in the notch profile.

摘要翻译： 提供了一种用于形成分离栅极闪光装置的方法。 在一个实施例中，提供了其上形成介电层的半导体衬底。 形成覆盖在电介质层上的导体层。 掩蔽层沉积在导体层上。 形成覆盖掩模层的光敏层。 对感光层进行图案化和蚀刻以在其中形成开口图案。 掩模层和导体层根据光敏层中的开口图案进行蚀刻。 在导体层和电介质层之间的外表面区域处蚀刻导体层以形成底切。 蚀刻电介质层以在导体层和电介质层之间的外表面区域形成切口轮廓，并且蚀刻衬底的部分以形成多个沟槽。 隔离层填充在多个沟槽和掩蔽层上。 掩模层和导体层和隔离层的部分被蚀刻掉，其中隔离层的一部分保留在凹口轮廓中。

公开(公告)号：US20060163686A1

公开(公告)日：2006-07-27

申请号：US11044813

申请日：2005-01-26

申请人： Shih-Chang Liu ,  Wen-Ting Chu ,  Chien-Ming Ku ,  Chi-Hsin Lo ,  Chia-Shiung Tsai ,  Chia-Ta Hsieh

发明人： Shih-Chang Liu ,  Wen-Ting Chu ,  Chien-Ming Ku ,  Chi-Hsin Lo ,  Chia-Shiung Tsai ,  Chia-Ta Hsieh

IPC分类号： H01L21/76 ,  H01L29/00

CPC分类号： H01L27/11521 ,  H01L21/76224 ,  H01L27/10894 ,  H01L27/11

摘要： A method is provided for fabrication of a semiconductor substrate having regions isolated from each other by shallow trench isolation (STI) structures protruding above a surface of the substrate by a step height. The method includes the steps of forming a bottom antireflective coating (BARC) layer overlying the surface of a semiconductor substrate and the surface of STI structures; etching back a portion of the BARC layer overlying at least one of the STI structures, and partially etching back the at least one of the STI structures, to reduce the step height by which the STI structure protrudes above the surface of the substrate; and removing a remaining portion of the BARC layer between adjacent STI structures. The method may be used to fabricate semiconductor devices including memory cells that have improved reliability.

摘要翻译： 提供了一种用于制造半导体衬底的方法，该半导体衬底具有通过在衬底的表面上突出台阶高度的浅沟槽隔离（STI）结构彼此隔离的区域。 该方法包括以下步骤：形成覆盖在半导体衬底的表面上的底部抗反射涂层（BARC）层和STI结构的表面; 蚀刻覆盖所述STI结构中的至少一个的所述BARC层的一部分，并且部分地蚀刻所述STI结构中的所述至少一个，以降低所述STI结构在所述衬底的表面上方突出的台阶高度; 以及去除相邻STI结构之间的BARC层的剩余部分。 该方法可用于制造包括具有改进的可靠性的存储器单元的半导体器件。

公开(公告)号：US5933343A

公开(公告)日：1999-08-03

申请号：US158221

申请日：1998-09-22

申请人： Qun Lu ,  Paul E. Grandmont ,  Shih-Chang Liu

发明人： Qun Lu ,  Paul E. Grandmont ,  Shih-Chang Liu

IPC分类号： H02M3/00 ,  H05K1/14 ,  H02M1/00

CPC分类号： H05K1/144 ,  H02M3/00 ,  H02M7/003

摘要： A multi-deck power converter module assembly for connection with a substrate (e.g., a host board) having connection regions disposed on its surface includes a second circuit board positioned over a first circuit board, the second circuit board having apertures extending from an upper surface to a lower surface of the second circuit board. At least two rail members are positioned over the second circuit board, each rail member having a first and a second plurality of holes. A pair of spacers are disposed between the first and second circuit boards, each spacer extending through one of the apertures of the second circuit board and received within one of the first plurality of holes of one of the rail members. Terminal pins are attached to the first circuit board, at least one terminal pin extending through the second circuit board and a corresponding one of the second plurality of holes for connection to one of the connection regions on the substrate. Each of the second plurality of holes is sized to allow the rail members to be slidably positioned over the terminal pins during assembly of the power converter module.

摘要翻译： 用于与具有设置在其表面上的连接区域的基板（例如，主板）连接的多层电力转换器模块组件包括位于第一电路板上的第二电路板，第二电路板具有从上表面 到第二电路板的下表面。 至少两个轨道构件定位在第二电路板上方，每个轨道构件具有第一和第二多个孔。 一对间隔件设置在第一和第二电路板之间，每个间隔件延伸穿过第二电路板的一个孔并被接纳在一个轨道构件的第一多个孔中的一个孔内。 端子销附接到第一电路板，延伸穿过第二电路板的至少一个端子引脚和用于连接到基板上的一个连接区域的第二多个孔中的相应一个。 第二多个孔中的每一个的尺寸被设计成允许轨道构件在组装功率转换器模块期间可滑动地定位在端子销上方。

公开(公告)号：US08987033B2

公开(公告)日：2015-03-24

申请号：US13196560

申请日：2011-08-02

申请人： Ching-Chung Su ,  Shih-Chang Liu ,  Shih Pei Chou ,  Chia-Shiung Tsai ,  Chun-Tsung Kuo ,  Wen-I Hsu ,  Yi-Shin Chu

发明人： Ching-Chung Su ,  Shih-Chang Liu ,  Shih Pei Chou ,  Chia-Shiung Tsai ,  Chun-Tsung Kuo ,  Wen-I Hsu ,  Yi-Shin Chu

IPC分类号： H01L21/00 ,  H01L27/146

CPC分类号： H01L27/1463

摘要： A method includes forming a blocking layer over a substrate, and etching the blocking layer to form a trench in the blocking layer. A dielectric layer is formed, wherein the dielectric layer comprises a first portion over the blocking layer, and a second portion in the trench. After the step of forming the dielectric layer, an implantation is performed to implant an impurity into the substrate to form a deep well region. After the implantation, the dielectric layer and the blocking layer are removed.

摘要翻译： 一种方法包括在衬底上形成阻挡层，并蚀刻阻挡层以在阻挡层中形成沟槽。 形成介电层，其中电介质层包括阻挡层上的第一部分和沟槽中的第二部分。 在形成介电层的步骤之后，进行注入以将杂质注入衬底以形成深阱区。 在植入之后，去除介电层和阻挡层。