Resistance value calculation method
    2.
    发明申请
    Resistance value calculation method 有权
    电阻值计算方法

    公开(公告)号:US20050177334A1

    公开(公告)日:2005-08-11

    申请号:US11052788

    申请日:2005-02-09

    CPC分类号: G06F17/5036

    摘要: The resistance value of a supply line (Rline), the resistance value of a decoupling capacitor (Rcap), and the resistance value of a transistor (Rmos) are separately calculated from mask layout information 31 of a semiconductor integrated circuit. The resistance value between external terminals (Ri) is calculated from the resistance value Rline, the resistance value Rcap, and the resistance value Rmos.

    摘要翻译: 根据半导体集成电路的掩模布局信息31分别计算供给线的电阻值(Rline),去耦电容器的电阻值(Rcap)和晶体管的电阻值(Rmos)。 根据电阻值Rline,电阻值Rcap和电阻值Rmos计算外部端子(Ri)之间的电阻值。

    Method for analyzing power supply noise of semiconductor integrated circuit
    3.
    发明申请
    Method for analyzing power supply noise of semiconductor integrated circuit 审中-公开
    分析半导体集成电路电源噪声的方法

    公开(公告)号:US20050114054A1

    公开(公告)日:2005-05-26

    申请号:US10988833

    申请日:2004-11-16

    CPC分类号: G01R29/26

    摘要: Based on design data of a semiconductor integrated circuit, an impedance related to a power supply wire is calculated, and based on the calculated impedance, a frequency characteristic of power supply noise is analyzed. In calculation of an impedance, an impedance between power supplies which are different in potential, e.g., a main power supply and a ground, may be calculated. Alternatively, an impedance between power supplies which are substantially the same in potential, e.g., a main power supply and an N-well power supply, may be calculated. The calculated impedance includes a wire capacitance between power supply wires, a substrate resistance, an impedance of a package connected to the power supply wires, and so on. Thus, it is possible to provide a method for analyzing power supply noise of a semiconductor integrated circuit, which can be executed at an early stage of a design process with a small amount of calculation.

    摘要翻译: 基于半导体集成电路的设计数据,计算与电源线相关的阻抗,并且基于所计算的阻抗来分析电源噪声的频率特性。 在计算阻抗时,可以计算电位不同的电源之间的阻抗,例如主电源和接地。 或者,可以计算电位基本相同的电源之间的阻抗,例如主电源和N阱电源。 所计算的阻抗包括电源线之间的线电容,衬底电阻,连接到电源线的封装的阻抗等。 因此,可以提供一种用于分析半导体集成电路的电源噪声的方法,其可以在少量计算的设计过程的早期阶段执行。

    WELDING SYSTEM AND WELDING METHOD
    4.
    发明申请
    WELDING SYSTEM AND WELDING METHOD 审中-公开
    焊接系统和焊接方法

    公开(公告)号:US20110284508A1

    公开(公告)日:2011-11-24

    申请号:US13111211

    申请日:2011-05-19

    IPC分类号: B23K26/00

    CPC分类号: B23K31/125

    摘要: A welding system has: a welding mechanism, a reception laser light source, a reception optical mechanism, an interferometer, a data recording/analysis mechanism and a data recording/analysis mechanism. The reception laser light source generates reception laser light so as to irradiate the object to be welded with the reception laser light for the purpose of detecting a reflected ultrasonic wave obtained as a result of reflection of a transmission ultrasonic wave. The reception optical mechanism transmits, during or after welding operation, the reception laser light generated from the reception laser light source to the surface of the object to be welded for irradiation while moving, together with the welding mechanism, relative to the object to be welded and collects laser light scattered/reflected at the surface of the object to be welded.

    摘要翻译: 焊接系统具有:焊接机构,接收激光光源,接收光学机构,干涉仪,数据记录/分析机构和数据记录/分析机构。 为了检测作为发送超声波的反射而得到的反射超声波,接收激光光源产生接收激光以照射被接收激光的被焊物体。 接收光学机构在焊接操作期间或之后将从接收激光光源产生的接收激光与焊接机构相对于被焊接物体一起移动而被发射到被焊接物体的表面 并收集在待焊接物体的表面上散射/反射的激光。

    Electro-migration verifying apparatus, electro-migration verifying method, data structure and netlist used in the same
    5.
    发明授权
    Electro-migration verifying apparatus, electro-migration verifying method, data structure and netlist used in the same 有权
    电迁移验证装置,电迁移验证方法,数据结构和使用的网表

    公开(公告)号:US08042080B2

    公开(公告)日:2011-10-18

    申请号:US11882344

    申请日:2007-08-01

    申请人: Shozo Hirano

    发明人: Shozo Hirano

    IPC分类号: G06F17/50 G06F9/455

    CPC分类号: G06F17/5036

    摘要: An electro-migration verifying method is comprised of: a data inputting process step; a netlist updating process step (first process operation) for updating a netlist which is constructed by a wiring line parasitic element and a device element based upon a current density limit value database, a characteristic variation database, and wiring line current information; a current density calculating process step (second process operation) for calculating current density of the wiring line parasitic element from a device current and the updated netlist; a wiring line current information updating process step (third process operation) for updating the wiring line current information based upon the current density; a current density limit value comparing/judging process step (fourth process operation) for judging whether or not a current density value is located within the current density limit value based upon the updated wiring line current information and the current density limit value database; an electro-migration verifying process step constituted by the first process operation up to a fifth process operation of a step judging process step (fifth process operation) for judging a repetition process operation from step information; and a result outputting process step.

    摘要翻译: 电迁移验证方法包括:数据输入处理步骤; 网表列表更新处理步骤(第一处理操作),用于基于当前密度限值数据库,特征变化数据库和布线线路信息更新由布线线路寄生元件和设备元件构成的网表; 电流密度计算处理步骤(第二处理操作),用于从器件电流和更新的网表计算布线线路寄生元件的电流密度; 基于电流密度更新布线线路电流信息的布线线路电流信息更新处理步骤(第三处理操作); 电流密度限制值比较/判定处理步骤(第四处理操作),用于基于更新的布线线路电流信息和当前密度限制值数据库来判断电流密度值是否位于电流密度极限值内; 一种电迁移验证处理步骤,由第一处理操作构成,直到第五处理操作,用于从步骤信息判断重复处理操作的步骤判断处理步骤(第五处理操作); 和结果输出处理步骤。

    Design method for semiconductor integrated circuit suppressing power supply noise
    6.
    发明授权
    Design method for semiconductor integrated circuit suppressing power supply noise 有权
    半导体集成电路抑制电源噪声的设计方法

    公开(公告)号:US07278124B2

    公开(公告)日:2007-10-02

    申请号:US11024470

    申请日:2004-12-30

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5036 G06F17/5063

    摘要: An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

    摘要翻译: 基于半导体集成电路的设计数据计算电源线的阻抗,获得所计算的阻抗的频率特性,并且基于获得的频率特性改变半导体集成电路的设计。 作为上述阻抗,可以计算诸如电源和地之间的电位不同的电源之间的阻抗,或者在诸如电源和N之间的电位基本上相同的电源之间的阻抗 - 可以计算电源。 通过设计修改,布线方法,焊盘的数量,电源的分离,封装的类型,电感元件的特性,基板结构,电线之间的距离,去耦电容,电线的长度, 并且例如电阻元件的特性被改变。

    Method for estimating EMI in a semiconductor device
    7.
    发明授权
    Method for estimating EMI in a semiconductor device 有权
    用于估计半导体器件中的EMI的方法

    公开(公告)号:US07120551B2

    公开(公告)日:2006-10-10

    申请号:US11052788

    申请日:2005-02-09

    IPC分类号: G06F19/00

    CPC分类号: G06F17/5036

    摘要: The resistance value of a supply line (Rline), the resistance value of a decoupling capacitor (Rcap), and the resistance value of a transistor (Rmos) are separately calculated from mask layout information of a semiconductor integrated circuit. The resistance value between external terminals (Ri) is calculated from the resistance value Rline, the resistance value Rcap, and the resistance value Rmos.

    摘要翻译: 根据半导体集成电路的掩模布局信息分别计算供给线的电阻值(Rline),去耦电容器的电阻值(Rcap)和晶体管的电阻值(Rmos)。 根据电阻值Rline,电阻值Rcap和电阻值Rmos计算外部端子(Ri)之间的电阻值。

    Design method for semiconductor integrated circuit suppressing power supply noise
    8.
    发明申请
    Design method for semiconductor integrated circuit suppressing power supply noise 有权
    半导体集成电路抑制电源噪声的设计方法

    公开(公告)号:US20050149894A1

    公开(公告)日:2005-07-07

    申请号:US11024470

    申请日:2004-12-30

    CPC分类号: G06F17/5036 G06F17/5063

    摘要: An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

    摘要翻译: 基于半导体集成电路的设计数据计算电源线的阻抗,获得所计算的阻抗的频率特性,并且基于获得的频率特性改变半导体集成电路的设计。 作为上述阻抗,可以计算诸如电源和地之间的电位不同的电源之间的阻抗,或者在诸如电源和N之间的电位基本上相同的电源之间的阻抗 - 可以计算电源。 通过设计修改,布线方法,焊盘的数量,电源的分离,封装的类型,电感元件的特性,基板结构,电线之间的距离,去耦电容,电线的长度, 并且例如电阻元件的特性被改变。

    Electro-migration verifying apparatus, electro-migration verifying method, data structure and netlist used in the same
    10.
    发明申请
    Electro-migration verifying apparatus, electro-migration verifying method, data structure and netlist used in the same 有权
    电迁移验证装置,电迁移验证方法,数据结构和使用的网表

    公开(公告)号:US20080034336A1

    公开(公告)日:2008-02-07

    申请号:US11882344

    申请日:2007-08-01

    申请人: Shozo Hirano

    发明人: Shozo Hirano

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5036

    摘要: An electro-migration verifying method is comprised of: a data inputting process step; a netlist updating process step (first process operation) for updating a netlist which is constructed by a wiring line parasitic element and a device element based upon a current density limit value database, a characteristic variation database, and wiring line current information; a current density calculating process step (second process operation) for calculating current density of the wiring line parasitic element from a device current and the updated netlist; a wiring line current information updating process step (third process operation) for updating the wiring line current information based upon the current density; a current density limit value comparing/judging process step (fourth process operation) for judging whether or not a current density value is located within the current density limit value based upon the updated wiring line current information and the current density limit value database; an electro-migration verifying process step constituted by the first process operation up to a fifth process operation of a step judging process step (fifth process operation) for judging a repetition process operation from step information; and a result outputting process step.

    摘要翻译: 电迁移验证方法包括:数据输入处理步骤; 网表列表更新处理步骤(第一处理操作),用于基于当前密度限值数据库,特征变化数据库和布线线路信息更新由布线线路寄生元件和设备元件构成的网表; 电流密度计算处理步骤(第二处理操作),用于从器件电流和更新的网表计算布线线路寄生元件的电流密度; 基于电流密度更新布线线路电流信息的布线线路电流信息更新处理步骤(第三处理操作); 电流密度限制值比较/判定处理步骤(第四处理操作),用于基于更新的布线线路电流信息和当前密度限制值数据库来判断电流密度值是否位于电流密度极限值内; 一种电迁移验证处理步骤,由第一处理操作构成,直到第五处理操作,用于从步骤信息判断重复处理操作的步骤判断处理步骤(第五处理操作); 和结果输出处理步骤。