公开(公告)号：US20090249691A1

公开(公告)日：2009-10-08

申请号：US11883442

申请日：2006-02-01

Applicant: Toru Akiyama ,  Fumihiko Kiso ,  Shinji Tanaka ,  Hirofumi Okazaki ,  Fumihiko Hanayama ,  Kazunori Sato ,  Takahiro Nishida ,  Hiroshi Takezaki ,  Akio Ueda ,  Makoto Takeda

Inventor： Toru Akiyama ,  Fumihiko Kiso ,  Shinji Tanaka ,  Hirofumi Okazaki ,  Fumihiko Hanayama ,  Kazunori Sato ,  Takahiro Nishida ,  Hiroshi Takezaki ,  Akio Ueda ,  Makoto Takeda

IPC: C10J3/06 ,  C10J3/20

CPC classification number: F23G5/02 ,  C10J3/487 ,  C10J3/506 ,  C10J2200/15 ,  C10J2300/09 ,  C10J2300/0903 ,  C10J2300/0909 ,  C10J2300/093 ,  C10J2300/1807 ,  F23G2201/301 ,  F23G2201/40 ,  F23G2201/80

Abstract: Apparatus for gasifying a solid fuel that supplies a solid fuel such as coal by dry condition to a gasification furnace of an entrained-bed type is constructed so as to be able to collect the char discharged from the gasification furnace and re-supply the char to the furnace without using a lock hopper and without changing the char into slurry form.The char discharged from the gasification furnace along with produced gases 53 produced in the gasification furnace is brought into contact with water by a gas cooler 9 and collected. After being dehydrated by a dehydrator 10, the collected char is loaded into a mill 2 or a raw-coal bunker 1. For loading into the raw-coal bunker 1, the char is dried by a drying machine 14, preferably, after the dehydration.According to the present invention, a mixture of the collected char and water can be re-supplied to the gasification furnace without using a lock hopper or a dry feeder. After being dehydrated, the char preferably is further dried and then supplied to the gasification furnace. Since a great deal of moisture is not supplied to the inside of the gasification furnace, it is possible to prevent a temperature of the gasification furnace from decreasing, and thus improve gas conversion efficiency.

Abstract translation: 将通过干燥状态将固体燃料例如煤供给到固定床型的气化炉的固体燃料的装置被构造成能够收集从气化炉排出的炭并将炭再供给 炉子不使用封闭料斗，而不改变焦炭成浆状。 从气化炉排出的焦炭以及在气化炉中产生的生成气体53通过气体冷却器9与水接触并收集。 在脱水机10脱水后，收集的炭被装载到磨机2或原煤仓1中。为了装载到原煤仓1中，优选用干燥机14干燥焦炭，脱水后 。 根据本发明，可以将收集的炭和水的混合物重新供给气化炉，而不使用锁定料斗或干式进料器。 脱水后，优选进一步干燥，然后供给到气化炉。 由于不向气化炉内部供给大量的水分，因此能够防止气化炉的温度下降，从而提高气体转换效率。

公开(公告)号：US06567490B1

公开(公告)日：2003-05-20

申请号：US09273182

申请日：1999-03-19

Applicant: Koji Hayashi ,  Toru Akiyama

Inventor： Koji Hayashi ,  Toru Akiyama

IPC: H03D324

CPC classification number: H03K5/135 ,  H03K5/133

Abstract: A pulse delay circuit includes a delay circuit, a plurality of selectors and a plurality of synchronous circuits. The delay circuit includes a plurality of series connected delay elements for delaying a clock signal and generating a plurality of delay clock signals. Each of the selectors is connected to the plurality of delay elements and selects one of the plurality of the delay clock signals in accordance with an associated selection signal. The plurality of synchronous circuits receive pulse signals and the selected delay clock signals and generating a plurality of synchronous pulse signals that are synchronized with the selected delay clock signals, respectively.

Abstract translation: 脉冲延迟电路包括延迟电路，多个选择器和多个同步电路。 延迟电路包括多个串联连接的延迟元件，用于延迟时钟信号并产生多个延迟时钟信号。 每个选择器连接到多个延迟元件，并根据相关选择信号选择多个延迟时钟信号中的一个。 多个同步电路分别接收脉冲信号和所选择的延迟时钟信号并产生与所选择的延迟时钟信号同步的多个同步脉冲信号。

公开(公告)号：US5166805A

公开(公告)日：1992-11-24

申请号：US488385

申请日：1990-02-23

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N5/93

CPC classification number: H04N5/93

Abstract: In a disk player that provides a fast scanning mode in which only selected tracks are tracked by a playback head under closed loop control, a circuit for eliminating the image signal when adjacent tracks have uncorrelated images and the head is under open loop control.

Abstract translation: 在提供快速扫描模式的盘播放器中，其中只有选择的轨道由闭环控制下的回放头跟踪，当相邻轨道具有不相关的图像并且头部处于开环控制下时，用于消除图像信号的电路。

公开(公告)号：US4882625A

公开(公告)日：1989-11-21

申请号：US271580

申请日：1988-11-15

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N11/20 ,  H04N7/015 ,  H04N9/64 ,  H04N11/04

CPC classification number: H04N9/646

Abstract: An improved definition television (IDTV) set including a motion sensing circuit for sensing motion of images and generating a motion sensing signal, a motion adaptive Y/C separating circuit separating a composite video signal into a luminance signal and a chrominance signal on the basis of the motion sensing signal, chroma demodulation and matrix circuit generating three primary color signals of red, green, and blue from separate luminance and chrominance signals separated at the Y/C separating circuit, and a motion adaptive scanning line converting circuit for converting a line scanning method of the three primary color signals to a progressive line scanning, while effecting a field or line interpolation operation to the three primary color signals. The television set is characterized by a first selector for alternatively supplying external luminance and chrominance signals supplied from the outside or the separate luminance and chrominance signals to the chroma demodulation and matrix circuit, and a second selector for alternatively supplying, the external luminance signal or a summing signal of said external luminance and chrominance signals, or the composite video signal to the motion sensing circuit.

Abstract translation: 一种改进的清晰度电视（IDTV）集合，其包括用于感测图像的运动和产生运动感测信号的运动感测电路，基于复合视频信号将复合视频信号分离为亮度信号和色度信号的运动自适应Y / C分离电路 运动感测信号，色度解调和矩阵电路，从在Y / C分离电路分离的分离的亮度和色度信号产生红色，绿色和蓝色的三原色信号，以及运动自适应扫描线转换电路，用于转换线扫描 同时对三原色信号进行场或线插值操作，将三原色信号的方法转换为逐行扫描。 该电视机的特征在于：第一选择器，用于从外部提供外部亮度和色度信号，或将单独的亮度和色度信号提供给色度解调和矩阵电路;以及第二选择器，用于交替地提供外部亮度信号或 所述外部亮度和色度信号的合成信号，或复合视频信号到运动感测电路。

公开(公告)号：US4688103A

公开(公告)日：1987-08-18

申请号：US714325

申请日：1985-03-21

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N9/893 ,  H04N9/87

CPC classification number: H04N9/893

Abstract: An apparatus for the color synchronization of reproduced video signals, including a phase-locked loop (PLL) circuit. The PLL circuit detects a phase difference between a reproduced video signal (which may be a PAL video signal), and the output of a voltage-controlled oscillator within the PLL circuit, and has an internal loop filter which operates such that, when the apparatus is in an external synchronization mode, a high frequency component of the detected phase difference is used to control the time-base error of a variable delay line in the apparatus. Control means are included for placing the apparatus in external or internal synchronization mode, depending on the presence or absence of an external control signal. Further means are included for substantially precisely holding the phase inversion condition of a PAL video signal.

Abstract translation: 一种用于再现视频信号的颜色同步的装置，包括锁相环（PLL）电路。 PLL电路检测再现视频信号（其可以是PAL视频信号）与PLL电路内的压控振荡器的输出之间的相位差，并且具有内部环路滤波器，其操作使得当该装置 在外部同步模式中，使用检测的相位差的高频分量来控制装置中的可变延迟线的时基误差。 根据外部控制信号的存在或不存在，包括用于将设备置于外部或内部同步模式的控制装置。 包括用于基本上精确地保持PAL视频信号的相位转换条件的装置。

公开(公告)号：US4667338A

公开(公告)日：1987-05-19

申请号：US739781

申请日：1985-05-31

Applicant: Kenji Toyonaga ,  Yoshihito Higashitsutsumi ,  Akihiro Yanai ,  Toru Akiyama

Inventor： Kenji Toyonaga ,  Yoshihito Higashitsutsumi ,  Akihiro Yanai ,  Toru Akiyama

IPC: H03K5/1252 ,  H03K23/00

CPC classification number: H03K5/1252

Abstract: A noise elimination circuit for eliminating noise signals from data given by a binary form includes a modulo in up/down counter having a first input for receiving binary data, a second input for receiving clock pulses and output for producing a counted signal. The counter is effected to count up in response to the clock pulses when the binary data is a HIGH, and to count down in response to said clock pulses when the binary data is a LOW. A decoder is provided which has inputs for receiving the counted signal, a first output for producing an indication signal when the counted signal corresponds to a first predetermined number i, and a second output for producing an indication signal when the counted signal corresponds to a second predetermined number j, in which i is equal to or greater than zero, j is greater than i and n is equal to or greater than j. A flip-flop is provided which has a reset terminal connected to the first output of the decoder, a set terminal connected to the second output of the decoder and an output for producing a data with noise signals being eliminated.

Abstract translation: 用于从由二进制形式给出的数据中消除噪声信号的噪声消除电路包括具有用于接收二进制数据的第一输入的上/下计数器模块，用于接收时钟脉冲的第二输入和用于产生计数信号的输出。 当二进制数据为高电平时，计数器响应于时钟脉冲进行计数，并且当二进制数据为低电平时响应于所述时钟脉冲递减计数。 提供了一种解码器，其具有用于接收计数信号的输入端，当计数信号对应于第一预定数量i时产生指示信号的第一输出端和用于当计数信号对应于第二预定数量值时产生指示信号的第二输出端 预定数量j，其中i等于或大于零，j大于i且n等于或大于j。 提供了一种触发器，其具有连接到解码器的第一输出的复位端子，连接到解码器的第二输出端的设置端子和用于产生具有噪声信号的数据的输出被消除。

公开(公告)号：US4584614A

公开(公告)日：1986-04-22

申请号：US522704

申请日：1983-08-12

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N9/87 ,  H04N9/873 ,  H04N9/89

CPC classification number: H04N9/873

Abstract: A chroma signal phase correction circuitry to be used in a video information signal playback system for playing back the video information recorded on a recording medium, having a special playback mode of operation for jumping from one portion of recording tracks to the other, comprises a plurality of phase correction channel having a substantially constant frequency amplitude characteristics and a phase characteristics satisfying a condition that the difference between the phase shift values of each of the phase correction channel is equal to the difference between the phase of the color subcarrier signals of the color video signals from adjacent two recording track portions, and a switching means for selecting one of the phase correction channels for allowing the color video signal to pass therethrough, whereby compensating for the phase shift of the chroma signal during the jump operation while maintaining a phase of a luminance signal component of the color video signal.

Abstract translation: 在用于再现记录在记录介质上的视频信息的视频信息信号播放系统中使用的色度信号相位校正电路，具有用于从记录轨迹的一部分跳跃到另一个的特殊重放操作模式，包括多个 具有基本上恒定的频率幅度特性的相位校正通道和相位特性，该相位特性满足每个相位校正通道的相移值之差等于彩色视频的彩色副载波信号的相位差 来自相邻的两个记录轨道部分的信号，以及用于选择相位校正通道中的一个用于允许彩色视频信号通过的切换装置，由此补偿跳跃操作期间色度信号的相移，同时保持相位 彩色视频信号的亮度信号分量。

公开(公告)号：US06493305B1

公开(公告)日：2002-12-10

申请号：US09273617

申请日：1999-03-22

Applicant: Koji Hayashi ,  Toru Akiyama

Inventor： Koji Hayashi ,  Toru Akiyama

IPC: G11B509

CPC classification number: G11B7/00456 ,  G11B20/10 ,  H03K5/06 ,  H03K5/133 ,  H03K5/1565 ,  H03K2005/00039 ,  H03K2005/00097 ,  H03L7/0805 ,  H03L7/0995 ,  H03L7/18

Abstract: A pulse width control circuit is used to control the pulse with of a modulation signal to be written to a recording medium, such as a CD-R. The circuit controls both the leading and trailing edges of the modulation signal. The circuit includes a first delay circuit including multiple series connected first inverters for delaying the modulation signal and generating multiple first delay signals. The first delay signals are input to a first selector, which selects one of the first delay signals. A first logic circuit receives the selected first delay signal and the modulation signal and performs a first logic operation. The output of the first logic circuit is input to a second delay circuit, which includes multiple series connected second inverters for delaying the first logic circuit output signal, and generating multiple second delay signals. A second selector selects one of the plurality of delayed logic signals in accordance with the second selection signal. A second logic circuit receives the selected second delay signal and the first logic circuit output signal and performs a second logical operation, thereby generating a pulse width controlled modulation signal. The first delay circuit and first selector control the leading edge of the modulation signal, and the second delay circuit and the second selector control the trailing edge of the modulation signal.

Abstract translation: 使用脉冲宽度控制电路来控制具有要写入诸如CD-R的记录介质的调制信号的脉冲。 电路控制调制信号的前沿和后沿。 该电路包括第一延迟电路，包括多个串联连接的第一反相器，用于延迟调制信号并产生多个第一延迟信号。 第一延迟信号被输入到选择第一延迟信号之一的第一选择器。 第一逻辑电路接收所选择的第一延迟信号和调制信号，并执行第一逻辑运算。 第一逻辑电路的输出被输入到第二延迟电路，该第二延迟电路包括多个串联的第二反相器，用于延迟第一逻辑电路输出信号，并产生多个第二延迟信号。 第二选择器根据第二选择信号选择多个延迟逻辑信号中的一个。 第二逻辑电路接收所选择的第二延迟信号和第一逻辑电路输出信号，并执行第二逻辑运算，从而产生脉宽调制调制信号。 第一延迟电路和第一选择器控制调制信号的前沿，第二延迟电路和第二选择器控制调制信号的后沿。

公开(公告)号：US5251042A

公开(公告)日：1993-10-05

申请号：US878979

申请日：1992-05-06

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N7/015 ,  H04N7/045 ,  H04N9/64 ,  H04N9/68 ,  H04N9/80 ,  H04N9/81 ,  H04N9/85 ,  H04N11/04 ,  H04N9/79 ,  H04N11/14

CPC classification number: H04N7/045 ,  H04N9/81

Abstract: A component video signal transmitting apparatus for suppressing any adverse affects caused by noises which are mixed with FM signals which are transmitted after component video signals are frequency modulated. After the color difference signals in the component video signals are previously expanded in level in a high level region, they are frequency modulated and transmitted. The high level expanded color difference signals extracted by demodulation of the transmitted signals are compressed in level at the high level region.

公开(公告)号：US5204744A

公开(公告)日：1993-04-20

申请号：US637734

申请日：1991-01-07

Applicant: Toru Akiyama

Inventor： Toru Akiyama

IPC: H04N5/253 ,  G11B27/026 ,  G11B27/10 ,  G11B27/30 ,  H04N5/765 ,  H04N5/78 ,  H04N5/781 ,  H04N5/85 ,  H04N5/91 ,  H04N5/93 ,  H04N9/79

CPC classification number: G11B27/3027 ,  G11B27/026 ,  G11B27/10 ,  H04N5/91 ,  H04N5/93

Abstract: A frame number and an instruction signal are inserted in each frame in a video signal. The instruction signal is selected from a predetermined number of field combination instructing signals in each frame, each of the signals represents a combination mode of two fields in the frame. The frame number and the field combination instructing signal are detected. In response to a still signal, a detected frame number and a picture in two fields instructed by a detected field combination instructing signal are stored in a memory for reproducing the picture.