Indirect stimulation of an integrated circuit die
    1.
    发明授权
    Indirect stimulation of an integrated circuit die 失效
    间接刺激集成电路管芯

    公开(公告)号:US06870379B1

    公开(公告)日:2005-03-22

    申请号:US10164739

    申请日:2002-06-06

    CPC分类号: G01R31/311

    摘要: Analysis of a semiconductor die is enhanced by the stimulation the die and the detection of a response to the stimulation. According to an example embodiment of the present invention, a semiconductor die is analyzed using indirect stimulation of a portion of the die, and detecting a response therefrom. First, selected portion of circuitry within the die is stimulated. The stimulation of the selected portion induces a second portion of circuitry within the die to generate an external emission. The emission is detected and the die is analyzed therefrom. In one particular implementation, a response from the selected portion is inhibited from interfering with the detection of the emission from the second portion of circuitry.

    摘要翻译: 通过刺激模具和检测对刺激的响应来增强半导体管芯的分析。 根据本发明的示例性实施例,使用间接刺激芯片的一部分并且从其检测响应来分析半导体管芯。 首先,刺激模具内的电路的选定部分。 所选部分的刺激引起管芯内的电路的第二部分以产生外部发射。 检测发射并从中分析模具。 在一个具体实现中,来自所选择的部分的响应被禁止干扰来自电路的第二部分的发射的检测。

    Three-dimensional tomography
    2.
    发明授权
    Three-dimensional tomography 有权
    三维断层扫描

    公开(公告)号:US07088852B1

    公开(公告)日:2006-08-08

    申请号:US09833247

    申请日:2001-04-11

    IPC分类号: G06K9/00

    CPC分类号: G01N23/2251

    摘要: Defect analysis of a semiconductor die is enhanced in a manner that makes possible the viewing of spatial manifestations of the defect from virtually any angle. According to an example embodiment of the present invention, substrate is removed from a semiconductor die while simultaneously obtaining images of the portions of the die from which substrate is being removed. The images are taken at various points in the substrate removal process, recorded and combined together to form a three-dimensional image of selected portions of the die. The image is then used to view the selected portions, and the nature of one or more defects therein are analyzed.

    摘要翻译: 增强半导体裸片的缺陷分析,使得可以从几乎任何角度观察缺陷的空间表现。 根据本发明的示例性实施例,从半导体管芯移除衬底,同时获得正在去除衬底的管芯的部分的图像。 在基板去除过程中的各个点拍摄图像,记录并组合在一起,以形成模具的所选部分的三维图像。 然后使用该图像来查看所选择的部分,并且分析其中的一个或多个缺陷的性质。

    Laser intrusive technique for locating specific integrated circuit current paths
    3.
    发明授权
    Laser intrusive technique for locating specific integrated circuit current paths 失效
    用于定位特定集成电路电流路径的激光入侵技术

    公开(公告)号:US06617862B1

    公开(公告)日:2003-09-09

    申请号:US10084100

    申请日:2002-02-27

    申请人: Victoria J. Bruce

    发明人: Victoria J. Bruce

    IPC分类号: G01R3128

    CPC分类号: G01R31/311 G01R31/31905

    摘要: A method and apparatus for locating integrated circuit defects associated with different aspects of the integrated circuit industry. The integrated circuit is configured in a known failing mode, with a first power supply providing a constant voltage and variable current. Next, one or more additional dedicated power supplies are connected to various points of interest throughout the integrated circuit, wherein these dedicated power supplies have a preset current and the voltage is allowed to vary. The integrated circuit is then scanned with a laser beam, which induces current changes on in the integrated circuit especially in defective areas. These current changes then cause voltage changes on the dedicated power supplies. When such a voltage change occurs on the dedicated power supplies, its position is noted.

    摘要翻译: 用于定位与集成电路工业的不同方面相关联的集成电路缺陷的方法和装置。 集成电路配置在已知的故障模式中,第一电源提供恒定电压和可变电流。 接下来,一个或多个附加的专用电源连接到整个集成电路中的各个兴趣点,其中这些专用电源具有预置电流并允许电压变化。 然后用激光束扫描集成电路,这在集成电路中特别是在缺陷区域中引起电流变化。 这些电流变化会导致专用电源上的电压变化。 当专用电源发生这种电压变化时,会注意其位置。

    Quadrant avalanche photodiode time-resolved detection
    4.
    发明授权
    Quadrant avalanche photodiode time-resolved detection 失效
    象限雪崩光电二极管时间分辨检测

    公开(公告)号:US06483327B1

    公开(公告)日:2002-11-19

    申请号:US09409088

    申请日:1999-09-30

    IPC分类号: G01R31302

    CPC分类号: G01R1/071 G01R31/311

    摘要: A method and system providing spatial and timing resolution for photoemission microscopy of an integrated circuit. A microscope having an objective lens forming a focal plane is arranged to view the integrated circuit, and an aperture element having an aperture is optically aligned in the back focal plane of the microscope. The aperture element is positioned for viewing a selected area of the integrated circuit. A position-sensitive avalanche photo-diode is optically aligned with the aperture to detect photoemissions when test signals are applied to the integrated circuit.

    摘要翻译: 一种为集成电路的光电显微镜提供空间和时序分辨率的方法和系统。 具有形成焦平面的物镜的显微镜被布置成观看集成电路,并且具有孔的孔径元件在显微镜的后焦平面中被光学对准。 光圈元件被定位成用于观看集成电路的选定区域。 位置敏感的雪崩光电二极管与孔径光学对准以在测试信号被施加到集成电路时检测光电发射。

    Emission microscope
    5.
    发明授权
    Emission microscope 失效
    排放显微镜

    公开(公告)号:US5301006A

    公开(公告)日:1994-04-05

    申请号:US826992

    申请日:1992-01-28

    申请人: Victoria J. Bruce

    发明人: Victoria J. Bruce

    摘要: An emission microscope system includes in various embodiments a catadioptric optical microscope and/or a computer automated optical dispensing system and/or a cryogenically cooled back thinned CCD camera. The system also includes a computer controlled data acquisition system with specially tailored software.

    摘要翻译: 放射显微镜系统在各种实施例中包括反射折射光学显微镜和/或计算机自动光学分配系统和/或低温冷却背部薄化CCD照相机。 该系统还包括具有专门定制软件的计算机控制数据采集系统。

    Resistivity analysis
    6.
    发明授权
    Resistivity analysis 有权
    电阻率分析

    公开(公告)号:US07062399B1

    公开(公告)日:2006-06-13

    申请号:US09586518

    申请日:2000-06-02

    IPC分类号: G01R31/14

    CPC分类号: G01R31/2875 G01R31/311

    摘要: According to an example embodiment of the present invention a semiconductor die having a resistive electrical connection is analyzed. Heat is directed to the die as the die is undergoing a state-changing operation to cause a failure due to suspect circuitry. The die is monitored, and a circuit path that electrically changes in response to the heat is detected and used to detect that a particular portion therein of the circuit is resistive. In this manner, the detection and localization of a semiconductor die defect that includes a resistive portion of a circuit path is enhanced.

    摘要翻译: 根据本发明的示例性实施例,分析具有电阻电连接的半导体管芯。 当芯片正在进行状态改变操作以引起可疑电路引起的故障时,热量被引导到芯片。 监测管芯,并且检测并响应于热而电变化的电路路径以检测其中电路中的特定部分是电阻性的。 以这种方式,增强了包括电路路径的电阻部分的半导体管芯缺陷的检测和定位。

    Trench-filled probe point for a semiconductor device
    7.
    发明授权
    Trench-filled probe point for a semiconductor device 失效
    用于半导体器件的沟槽探针点

    公开(公告)号:US06545490B1

    公开(公告)日:2003-04-08

    申请号:US09383782

    申请日:1999-08-26

    申请人: Victoria J. Bruce

    发明人: Victoria J. Bruce

    IPC分类号: G01R3126

    CPC分类号: G01R31/2884 G01R31/307

    摘要: A semiconductor device is manufactured and tested post-manufacture using a probe point extending into the backside of a flip-chip device. During manufacture, a trench is formed in a portion of the backside of the device. At least a portion of the trench is filled with conductive material to provide a probe. After the device is manufactured, circuitry adjacent the probe point is tested. The testing includes milling the backside of the semiconductor device to access the probe, and then coupling energy from the probe to acquire a waveform.

    摘要翻译: 使用延伸到倒装芯片器件的背面的探针点在制造后制造和测试半导体器件。 在制造期间,在装置的背面的一部分中形成沟槽。 沟槽的至少一部分填充有导电材料以提供探针。 器件制造完成后,测试与探针点相邻的电路。 测试包括铣削半导体器件的背面以访问探针,然后耦合来自探针的能量以获取波形。

    Internal anti-reflective coating for interference reduction
    8.
    发明授权
    Internal anti-reflective coating for interference reduction 失效
    内部抗反射涂层,用于减少干扰

    公开(公告)号:US06410349B1

    公开(公告)日:2002-06-25

    申请号:US09385774

    申请日:1999-08-30

    IPC分类号: H01L2166

    CPC分类号: G01R31/311

    摘要: According to an example embodiment of the present invention, an electronic circuit is formed upon a front side surface of a semiconductor device having a back side opposite the front side. At least one layer of antireflective material is formed within substrate in the semiconductor device. The circuit is stimulated and a response is analyzed. The use of the antireflective layer reduces interference generated by reflections and improves the ability to analyze the circuit.

    摘要翻译: 根据本发明的示例性实施例,电子电路形成在具有与前侧相对的背面的半导体器件的前侧表面上。 在半导体器件中的衬底内形成至少一层抗反射材料。 电路被刺激并且分析响应。 使用抗反射层减少了由反射产生的干扰,并提高了分析电路的能力。

    Analyzing an electronic circuit formed upon a frontside surface of a
semiconductor substrate by detecting radiation exiting a backside
surface coated with an antireflective material
    10.
    发明授权
    Analyzing an electronic circuit formed upon a frontside surface of a semiconductor substrate by detecting radiation exiting a backside surface coated with an antireflective material 失效
    通过检测从涂覆有抗反射材料的背面露出的辐射来分析形成在半导体衬底的前表面上的电子电路

    公开(公告)号:US6107107A

    公开(公告)日:2000-08-22

    申请号:US052221

    申请日:1998-03-31

    摘要: Various methods are described for analyzing an electronic circuit formed upon a frontside surface of a semiconductor substrate having opposed frontside and backside surfaces. Each method includes forming a layer of an antireflective coating material upon the backside surface of the substrate prior to detecting electromagnetic radiation emanating from the backside surface. The layer of an antireflective coating material reduces reflections which contribute to background noise levels. As a result of reduced background noise levels, the detection capabilities of the methods and the resolutions of any scanned images produced using the methods are improved. A first method includes forming a layer of an antireflective coating material upon the backside surface of the substrate, directing a beam of electromagnetic radiation toward the backside surface of the substrate, and detecting an electrical response from the electronic circuit. A second method includes the forming of the layer of an antireflective coating material upon the backside surface of the substrate, directing the beam of electromagnetic radiation toward the backside surface of the substrate, and detecting a portion of the beam of electromagnetic radiation reflected by the electronic circuit. A third method includes forming the layer of antireflective coating material upon the backside surface of the substrate, supplying electrical power to the electronic circuit such that any crystalline defects within the electronic circuit result in the emission of electromagnetic radiation, and detecting a portion of the electromagnetic radiation exiting the semiconductor substrate through the backside surface.

    摘要翻译: 描述了用于分析形成在具有相对的前侧和后侧表面的半导体衬底的前侧表面上的电子电路的各种方法。 每种方法包括在检测从背面发出的电磁辐射之前在基板的背面形成抗反射涂层材料层。 抗反射涂层的层减少了有助于背景噪声水平的反射。 由于背景噪声水平的降低,使用这些方法产生的任何扫描图像的方法和分辨率的检测能力都得到了改善。 第一种方法包括在衬底的背面形成一层抗反射涂层材料,将一束电磁辐射引导到衬底的背面,并检测来自电子电路的电响应。 第二种方法包括在衬底的背面形成抗反射涂层的层,将电磁辐射束引向衬底的背面,并且检测由电子反射的电磁辐射束的一部分 电路。 第三种方法包括在基板的背面形成抗反射涂层层,向电子电路供电,使得电子电路内的任何晶体缺陷导致电磁辐射的发射,以及检测电磁波的一部分 通过背面离开半导体衬底的辐射。