摘要:
An active device array substrate and a fabricating method thereof are provided. A first patterned conductive layer including separated scan line patterns is formed on a substrate. Each scan line pattern includes a first and second scan lines adjacent to each other. Both the first and the second scan lines have first and second contacts. An open inspection on the scan line patterns is performed. Channel layers are formed on the substrate. A second patterned conductive layer including data lines interlaced with the first and second scan lines, sources and drains located above the channel layers, and connectors is formed on the substrate. The sources electrically connect the data lines correspondingly. At least one of the connectors electrically connects the first and second scan lines, so as to form a loop in each scan line pattern. Pixel electrodes electrically connected to the drains are formed.
摘要:
An active device array substrate and a fabricating method thereof are provided. A first patterned conductive layer including separated scan line patterns is formed on a substrate. Each scan line pattern includes a first and second scan lines adjacent to each other. Both the first and the second scan lines have first and second contacts. An open inspection on the scan line patterns is performed. Channel layers are formed on the substrate. A second patterned conductive layer including data lines interlaced with the first and second scan lines, sources and drains located above the channel layers, and connectors is formed on the substrate. The sources electrically connect the data lines correspondingly. At least one of the connectors electrically connects the first and second scan lines, so as to form a loop in each scan line pattern. Pixel electrodes electrically connected to the drains are formed.
摘要:
A metal interconnect structure includes a plurality of first plugs adjacent to each other, a first metal line extending in a first direction and contacting each first plug to form a first section with a tapered second section in between, and a second plug adjacent to the second section, both in a second direction normal to the first direction.
摘要:
An overlay mark formed on a photomask, comprising a first rectangular region, a second rectangular region, a third rectangular region, and a fourth rectangular region, each rectangular region having the same pattern configuration, a longer side of the first rectangular region and a longer side of the third rectangular region being parallel to each other, and a longer side of the second rectangular region and a longer side of the fourth rectangular region being parallel to each other, the longer side of the first rectangular region being perpendicular to the longer side of the second rectangular region; wherein each pattern configuration has at least two different pattern elements allowing other pattern elements be chosen to align when any one of the pattern elements on the substrate was damaged during process.
摘要:
Disclosed is a test mask structure. The test mask structure of the present invention comprises at least an array pattern region, in a certain proportion to the final product, having a first pattern density according to the certain proportion; and at least one test mask pattern region having a second pattern density. In the test mask structure of the present invention, the required pattern density is obtained by adjusting the area of the array pattern region and the area of the test mask pattern region according to the first pattern density and the second pattern density.
摘要:
A method of preventing repeated collapse in a reworked photoresist layer. First, oxygen-containing plasma is applied to remove a collapsed photoresist. Because the plasma containing oxygen reacts with a bottom anti-reflect layer comprising SiOxNy, some acids are produced on the bottom anti-reflect layer, resulting in undercutting in a subsequently reworked photoresist. Next, an alkaline solution treatment is performed on the anti-reflect layer after the collapsed photoresist layer is removed. Finally, the reworked photoresist with is formed on the anti-reflect layer, without undercutting.
摘要翻译:防止再加工的光致抗蚀剂层中的重复塌陷的方法。 首先,施加含氧等离子体以除去塌陷的光致抗蚀剂。 因为含有氧的等离子体与包含SiO x N y Y y的底部防反射层反应,所以在底部防反射层上产生一些酸,导致在 随后再加工光致抗蚀剂。 接下来,在去除塌陷的光致抗蚀剂层之后,在抗反射层上进行碱性溶液处理。 最后,在反射层上形成返工光致抗蚀剂,而没有底切。
摘要:
A lock. The lock includes an inner handle assembly, a latch bolt, and an outer handle assembly. The outer handle assembly includes an outer handle, an outer spindle, an actuating sleeve rotatably mounted in the outer spindle and having two guide slots each having an inclined section and a horizontal section, a locking plate mounted in the actuating sleeve and including two wings, and an unlatching member operably connected to the latch bolt. Each wing is extended through an associated guide slot into an associated positioning slot in the outer spindle. When the lock is in an unlocked state, the unlatching member is engaged with the locking plate to allow joint rotation. When the lock is in a locked state, the unlatching member is disengaged from the unlatching member such that the unlatching member is not turned when the outer handle is turned.
摘要:
A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting a first ion into the revealed first etching layer to form a first doped area; and implanting a second ion into the revealed first etching layer to form a second doped area, wherein the first doped area is independent from the second doped area is provided.
摘要:
A method of forming a patterned photoresist layer. First, an anti-reflection coating layer is formed on a substrate. Next, a first bake is performed. A photoresist layer is then formed on the anti-reflection coating layer. Exposure is performed. A second bake is performed, wherein the temperature difference between the first bake and the second bake is about 35 ° C.˜55 ° C. Finally, development is performed. The patterned photoresist layer features have perfect profiles in accordance with this invention.