Abstract:
An oscillator circuit includes a field effect transistor and a resonant circuit having a first terminal connected to the field effect transistor. The resonant circuit includes an inductance and a capacitance and has a second terminal for connecting to a radiator. The field effect transistor includes a gate electrode coupled to a source of gate voltage, a source electrode, a drain electrode and a graphene channel disposed between the source electrode and the drain electrode and electrically connected thereto. The graphene channel is disposed relative to the gate electrode for being biased by the gate electrode into a negative differential resistance region of operation. The oscillator circuit is capable of generating a continuous wave THz frequency signal, and is further capable of being enabled and disabled by the bias applied to the gate electrode.
Abstract:
An apparatus for processing a substrate contains a processing chamber and a substrate support assembly. The substrate support assembly is disposed within said processing chamber and adapted to support the substrate thereon while said processing is carried out, the substrate support assembly comprising at least two selectively joinable and interdigitable substrate support fixtures.
Abstract:
A method for synthesizing a thin film, the method containing the steps of: (a) providing a substrate support assembly containing at least two selectively interdigitable substrate support fixtures; (b) loading a substrate for thin film synthesis onto said at least two fixtures; (c) interdigitating said at least two fixtures; (d) positioning said at least two fixtures in a reaction chamber and forming a thin film on a surface of the substrate; and (e) unloading the substrate from said at least two fixtures.
Abstract:
A transistor structure is provided which includes a graphene layer located on an insulating layer, a first metal portion overlying a portion of the graphene layer, a second metal portion contacting and overhanging the first metal portion, a first electrode contacting a portion of the graphene layer and laterally offset from a first sidewall of the first metal portion by a lateral spacing, and a second electrode contacting another portion of the graphene layer and laterally offset from a second sidewall of the first metal portion by the lateral spacing.
Abstract:
A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.
Abstract:
A semiconductor-on-insulator structure and a method of forming the silicon-on-insulator structure including an integrated graphene layer are disclosed. In an embodiment, the method comprises processing a silicon material to form a buried oxide layer within the silicon material, a silicon substrate below the buried oxide, and a silicon-on-insulator layer on the buried oxide. A graphene layer is transferred onto the silicon-on-insulator layer. Source and drain regions are formed in the silicon-on-insulator layer, and a gate is formed above the graphene. In one embodiment, the processing includes growing a respective oxide layer on each of first and second silicon sections, and joining these silicon sections together via the oxide layers to form the silicon material. The processing, in an embodiment, further includes removing a portion of the first silicon section, leaving a residual silicon layer on the bonded oxide, and the graphene layer is positioned on this residual silicon layer.
Abstract:
In general, in one aspect, a graphene film is used as a protective layer for current collectors in electrochemical energy conversion and storage devices. The graphene film inhibits passivation or corrosion of the underlying metals of the current collectors without adding additional weight or volume to the devices. The graphene film is highly conductive so the coated current collectors maintain conductivity as high as that of underlying metals. The protective nature of the graphene film enables less corrosion resistant, less costly and/or lighter weight metals to be utilized as current collectors. The graphene film may be formed directly on Cu or Ni current collectors using chemical vapor deposition (CVD) or may be transferred to other types of current collectors after formation. The graphene film coated current collectors may be utilized in batteries, super capacitors, dye-sensitized solar cells, and fuel and electrolytic cells.
Abstract:
A carbon-based semiconductor device includes a substrate, source/drain contacts, a graphene channel, a dielectric layer, and a gate. The source/drain contacts are formed on the substrate. The graphene channel is formed on the substrate connecting the source contact and the drain contact. The dielectric layer is formed on the graphene channel with a molecular beam deposition process. The gate contact is formed over the graphene channel and on the dielectric. The gate contact is in a non-overlapping position with the source and drain contacts leaving exposed sections of the graphene channel between the gate contact and the source and drain contacts.
Abstract:
Graphene or carbon nanotube-based transistor devices and techniques for the fabrication thereof are provided. In one aspect, a transistor is provided. The transistor includes a substrate; a carbon-based material on the substrate, wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor; a patterned organic buffer layer over the portion of the carbon-based material that serves as the channel region of the transistor; a conformal high-k gate dielectric layer disposed selectively on the patterned organic buffer layer; metal source and drain contacts formed on the portions of the carbon-based material that serve as the source and drain regions of the transistor; and a metal top-gate contact formed on the high-k gate dielectric layer.
Abstract:
An apparatus for performing film deposition, comprises an energy source, a plurality of process tubes, and a gas manifold. The energy source is adapted to direct energy into a cylindrical space. The plurality of process tubes, in turn, pass through this cylindrical space. To perform the film deposition, the gas manifold is operative to introduce a respective gas flow into each of the plurality of process tubes.