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    APPARATUS FOR PRODUCING LAMINATED BODY
    1.
    发明申请
    APPARATUS FOR PRODUCING LAMINATED BODY 有权
    用于生产层压体的装置

    公开(公告)号：US20120240854A1

    公开(公告)日：2012-09-27

    申请号：US13413919

    申请日：2012-03-07

    申请人： Munetaka HAYAKAWA ,  Kaoru ITO ,  Yasuhiko TAKAHASHI

    发明人： Munetaka HAYAKAWA ,  Kaoru ITO ,  Yasuhiko TAKAHASHI

    IPC分类号： C23C16/455

    CPC分类号： C23C16/545 ,  B05D1/60 ,  B05D7/04 ,  B05D7/50 ,  B05D2252/02 ,  C23C14/562 ,  C23C16/042

    摘要： An apparatus is provided that can stably produce a laminated body including a vapor-deposited polymer film having a predetermined composition and thickness on a film substrate. The apparatus includes: a film substrate supply means 46 that supplies a film substrate 15 on an outer peripheral surface of a rotary drum 35 in a vacuum chamber 24; a plurality of blowoff members 64 positioned around the rotary drum 35, each of the plurality of blowoff members including a vapor outlet 66 opening inside the vacuum chamber 24 to the outer peripheral surface of the rotary drum 35 and an inner space constituting a deposition chamber; and at least one monomer vapor supply means 84 arranged to supply plural kinds of monomer vapor into the deposition chamber and blowoff the plural kinds of monomer vapor from the vapor outlet of each of the plurality of blowoff members.

    摘要翻译： 提供一种可以在膜基板上稳定地制造包括具有预定组成和厚度的气相沉积聚合物膜的层压体的装置。 该装置包括：薄膜基板供给装置46，其在真空室24中的旋转滚筒35的外周面上供给薄膜基板15; 多个排气构件64位于旋转鼓35周围，多个排气构件中的每一个包括在真空室24内部向旋转滚筒35的外周表面开口的蒸汽出口66和构成沉积室的内部空间; 以及至少一个单体蒸气供给装置84，其被配置为将多种单体蒸气供应到沉积室中，并从多个吹排构件中的每一个的蒸汽出口吹出多种单体蒸气。

    Protein involved in G protein-coupled receptor mediated signal transduction with ability to mediate signal transduction from a dopamine D1 receptor or an adenosine A2A receptor to an adenylate cyclase and utilization thereof
    2.
    发明授权
    Protein involved in G protein-coupled receptor mediated signal transduction with ability to mediate signal transduction from a dopamine D1 receptor or an adenosine A2A receptor to an adenylate cyclase and utilization thereof 失效
    涉及G蛋白偶联受体介导的信号转导的蛋白质，其能够介导从多巴胺D1受体或腺苷A2A受体到腺苷酸环化酶的信号转导及其利用

    公开(公告)号：US07893203B2

    公开(公告)日：2011-02-22

    申请号：US12118247

    申请日：2008-05-09

    申请人： Yasuhiko Takahashi ,  Yasuo Matsumoto ,  Kenji Oeda

    发明人： Yasuhiko Takahashi ,  Yasuo Matsumoto ,  Kenji Oeda

    IPC分类号： C07K14/47

    CPC分类号： C07K14/4722

    摘要： A novel protein (Gm1) includes an amino acid sequence part having a high homology with a domain having a high homology with a GTP binding site and a GTPase site conserved among G protein α subunits and a trimer forming domain conserved among G protein α subunits. The Gm1 protein is involved in signal transduction via a G protein-coupled receptor (GPCR) stimulation. The Gm1 protein is expressed intensively in human brain, thymus, testes, spleen, small intestine, uterus and heart. A method for screening for a substance capable of regulating a cellular signal transduction employs a polynucleotide encoding the Gm1 protein.

    摘要翻译： 一种新型蛋白质（Gm1）包括与G蛋白α亚基保守的G蛋白α亚基和三聚体形成结构域在G蛋白α亚基中保守的与GTP结合位点和GTP酶位点高度同源的结构域具有高度同源性的氨基酸序列部分。 Gm1蛋白通过G蛋白偶联受体（GPCR）刺激参与信号转导。 Gm1蛋白在人脑，胸腺，睾丸，脾脏，小肠，子宫和心脏中都集中表达。 筛选能够调节细胞信号转导的物质的方法采用编码Gm1蛋白的多核苷酸。

    G Proteins, Polynucleotides Encoding the Same and Utilization Thereof
    5.
    发明申请
    G Proteins, Polynucleotides Encoding the Same and Utilization Thereof 失效
    G蛋白，编码它们的多核苷酸及其利用

    公开(公告)号：US20080233126A1

    公开(公告)日：2008-09-25

    申请号：US12118247

    申请日：2008-05-09

    申请人： Yasuhiko Takahashi ,  Yasuo Matsumoto ,  Kenji Oeda

    发明人： Yasuhiko Takahashi ,  Yasuo Matsumoto ,  Kenji Oeda

    IPC分类号： A61K39/395 ,  C07K14/00 ,  C07H21/00 ,  C07K16/18 ,  C12Q1/68 ,  A61P43/00 ,  G01N33/53 ,  C12Q1/02 ,  A61K38/00 ,  A61K31/70

    CPC分类号： C07K14/4722

    摘要： A novel protein (Gm1) includes an amino acid sequence part having a high homology with a domain having a high homology with a GTP binding site and a GTPase site conserved among G protein α subunits and a trimer forming domain conserved among G protein α subunits. The Gm1 protein is involved in signal transduction via a G protein-coupled receptor (GPCR) stimulation. The Gm1 protein is expressed intensively in human brain, thymus, testes, spleen, small intestine, uterus and heart. A method for screening for a substance capable of regulating a cellular signal transduction employs a polynucleotide encoding the Gm1 protein.

    摘要翻译： 一种新型蛋白质（Gm1）包括与G蛋白α亚基保守的G蛋白α亚基和三聚体形成结构域在G蛋白α亚基中保守的与GTP结合位点和GTP酶位点高度同源的结构域具有高同源性的氨基酸序列部分。 Gm1蛋白通过G蛋白偶联受体（GPCR）刺激参与信号转导。 Gm1蛋白在人脑，胸腺，睾丸，脾脏，小肠，子宫和心脏中都集中表达。 筛选能够调节细胞信号转导的物质的方法采用编码Gm1蛋白的多核苷酸。

    Semiconductor memory device and semiconductor integrated circuit
    6.
    发明申请
    Semiconductor memory device and semiconductor integrated circuit 失效

    公开(公告)号：US20080068877A1

    公开(公告)日：2008-03-20

    申请号：US11979128

    申请日：2007-10-31

    申请人： Yasuhiko Takahashi ,  Takayuki Tanaka

    发明人： Yasuhiko Takahashi ,  Takayuki Tanaka

    IPC分类号： G11C11/00

    CPC分类号： H01L27/1203 ,  G11C11/412 ,  H01L27/1104 ,  Y10S257/903 ,  Y10S257/904

    摘要： In a semiconductor memory device, third and fourth transistors are configured as a vertical structure. The third transistor is laminated over a first transistor, and the fourth transistor is laminated over a second transistor, whereby a reduction in cell area is achieved. A voltage, which is set on the condition that the difference between a source potential applied to each of the first and second transistors and the potential of a select level of a word line becomes greater than or equal to a threshold voltage of each of the third and fourth transistors, is supplied to a source electrode of each of the first and second transistors, to thereby perform “0” write compensation.

    Semiconductor memory device and a method of manufacturing the same
    8.
    发明授权
    Semiconductor memory device and a method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US07279754B2

    公开(公告)日：2007-10-09

    申请号：US10465550

    申请日：2003-06-20

    申请人： Masahiro Moniwa ,  Hiraku Chakihara ,  Kousuke Okuyama ,  Yasuhiko Takahashi

    发明人： Masahiro Moniwa ,  Hiraku Chakihara ,  Kousuke Okuyama ,  Yasuhiko Takahashi

    IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L27/11 ,  G11C11/412 ,  H01L27/1104

    摘要： A memory cell of a SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly consist of a square pole laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this sequence, a gate insulating film of silicon oxide formed on the surface of the side wall of the laminate, and a gate electrode formed so as to cover the side wall of the laminate. The vertical MISFETs are perfect depletion type MISFETs.

    摘要翻译： SRAM的存储单元具有两个驱动MISFET和两个垂直MISFET。 p沟道垂直MISFET形成在n沟道驱动MISFET的上方。 垂直MISFET分别主要由以下顺序层叠的下半导体层，中间半导体层和上半导体层形成的方形极板层叠，形成在层叠体的侧壁表面上的氧化硅栅极绝缘膜，以及 形成为覆盖层叠体的侧壁的栅电极。 垂直MISFET是完全耗尽型MISFET。

    Heater control method and storage apparatus
    9.
    发明申请
    Heater control method and storage apparatus 有权
    加热器控制方法和存储装置

    公开(公告)号：US20070019319A1

    公开(公告)日：2007-01-25

    申请号：US11267122

    申请日：2005-11-04

    申请人： Yasuhiko Takahashi ,  Yoshihiro Amemiya

    发明人： Yasuhiko Takahashi ,  Yoshihiro Amemiya

    IPC分类号： G11B21/02 ,  G11B27/36

    CPC分类号： G11B21/21 ,  G11B5/6005 ,  G11B5/6064

    摘要： A heater control method for carries out an ON/OFF control with respect to a built-in heater of a head, by turning the heater ON during a time corresponding to consecutive read operation time and write operation time, and turning the heater OFF during a time corresponding to a read operation time after a write operation time.

    摘要翻译： 一种加热器控制方法，用于通过在与连续的读取操作时间和写入操作时间相对应的时间内将加热器导通，并且在a的期间关闭加热器，从而对头部的内置加热器进行ON / OFF控制 时间对应于写操作时间之后的读操作时间。

    Semiconductor memory device and semiconductor integrated circuit
    10.
    发明申请
    Semiconductor memory device and semiconductor integrated circuit 有权

    公开(公告)号：US20070014169A1

    公开(公告)日：2007-01-18

    申请号：US11522904

    申请日：2006-09-19

    申请人： Yasuhiko Takahashi ,  Takayuki Tanaka

    发明人： Yasuhiko Takahashi ,  Takayuki Tanaka

    IPC分类号： G11C7/00

    CPC分类号： H01L27/1203 ,  G11C11/412 ,  H01L27/1104 ,  Y10S257/903 ,  Y10S257/904

    摘要： In a semiconductor memory device, third and fourth transistors are configured as a vertical structure. The third transistor is laminated over a first transistor, and the fourth transistor is laminated over a second transistor, whereby a reduction in cell area is achieved. A voltage, which is set on the condition that the difference between a source potential applied to each of the first and second transistors and the potential of a select level of a word line becomes greater than or equal to a threshold voltage of each of the third and fourth transistors, is supplied to a source electrode of each of the first and second transistors, to thereby perform “0” write compensation.