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    Complementary spin transistor logic circuit
    3.
    发明授权
    Complementary spin transistor logic circuit 有权
    互补自旋晶体管逻辑电路

    公开(公告)号：US08125247B2

    公开(公告)日：2012-02-28

    申请号：US12899778

    申请日：2010-10-07

    申请人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jun Woo Choi

    发明人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jun Woo Choi

    IPC分类号： H03K19/091 ,  H01L21/02

    CPC分类号： H03K19/091 ,  B82Y10/00 ,  G11C11/16 ,  H03K19/18

    摘要： There is provided a complementary spin transistor logic circuit, including: a parallel spin transistor that includes a magnetized first source, a first drain magnetized in parallel with the magnetization direction of the first source, a first channel layer and a first gate electrode; and an anti-parallel spin transistor that includes a magnetized second source, a second drain magnetized in anti-parallel with the magnetization direction of the second source, a second channel layer and a second gate electrode, wherein the first gate electrode and the second gate electrode are connected to a common input terminal.

    摘要翻译： 提供了一种互补自旋晶体管逻辑电路，包括：并联自旋晶体管，其包括磁化的第一源，与第一源的磁化方向平行磁化的第一漏极，第一沟道层和第一栅电极; 以及反并联自旋晶体管，其包括磁化的第二源极，与所述第二源极的磁化方向反并联的第二漏极，第二沟道层和第二栅电极，其中所述第一栅电极和所述第二栅极 电极连接到公共输入端子。

    Spin transistor using double carrier supply layer structure
    4.
    发明授权
    Spin transistor using double carrier supply layer structure 有权
    旋转晶体管采用双载体供电层结构

    公开(公告)号：US08058676B2

    公开(公告)日：2011-11-15

    申请号：US12342426

    申请日：2008-12-23

    申请人： Hyung Jun Kim ,  Hyun Cheol Koo ,  Joon Yeon Chang ,  Suk Hee Han ,  Kyung Ho Kim

    发明人： Hyung Jun Kim ,  Hyun Cheol Koo ,  Joon Yeon Chang ,  Suk Hee Han ,  Kyung Ho Kim

    IPC分类号： H01L29/76

    CPC分类号： H01L29/66984 ,  H01L29/7785

    摘要： A spin transistor includes a semiconductor substrate including a channel layer having a 2-dimensional electron gas structure and upper and lower cladding layers disposed respectively in upper and lower sides of the channel layer; ferromagnetic source and drain electrodes formed on the semiconductor substrate and disposed spaced apart from each other; a gate electrode disposed between the source electrode and the drain electrode and having a gate voltage applied thereto in order to control the spin of electrons passed through the channel layer; a first carrier supply layer disposed between the lower cladding layer and the channel layer to supply carriers to the channel layer; and a second carrier supply layer disposed between the upper cladding layer and the channel layer to supply carriers to the channel layer.

    摘要翻译： 自旋晶体管包括：半导体衬底，包括具有二维电子气体结构的沟道层和分别设置在沟道层的上侧和下侧的上和下包层; 形成在所述半导体衬底上并且彼此间隔开的铁磁源极和漏极; 栅电极，设置在源电极和漏电极之间并且施加栅极电压以控制通过沟道层的电子的自旋; 第一载流子供给层，设置在所述下包层和所述沟道层之间，以向所述沟道层提供载流子; 以及第二载体供给层，其设置在所述上​​包层和所述沟道层之间，以将载流子供应到所述沟道层。

    SPIN TRANSISTOR USING DOUBLE CARRIER SUPPLY LAYER STRUCTURE
    5.
    发明申请
    SPIN TRANSISTOR USING DOUBLE CARRIER SUPPLY LAYER STRUCTURE 有权
    使用双载波供电层结构的旋转晶体管

    公开(公告)号：US20100084633A1

    公开(公告)日：2010-04-08

    申请号：US12342426

    申请日：2008-12-23

    申请人： Hyung Jun Kim ,  Hyun Cheol Koo ,  Joon Yeon Chang ,  Suk Hee Han ,  Kyung Ho Kim

    发明人： Hyung Jun Kim ,  Hyun Cheol Koo ,  Joon Yeon Chang ,  Suk Hee Han ,  Kyung Ho Kim

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66984 ,  H01L29/7785

    摘要： A spin transistor includes a semiconductor substrate including a channel layer having a 2-dimensional electron gas structure and upper and lower cladding layers disposed respectively in upper and lower sides of the channel layer; ferromagnetic source and drain electrodes formed on the semiconductor substrate and disposed spaced apart from each other; a gate electrode disposed between the source electrode and the drain electrode and having a gate voltage applied thereto in order to control the spin of electrons passed through the channel layer; a first carrier supply layer disposed between the lower cladding layer and the channel layer to supply carriers to the channel layer; and a second carrier supply layer disposed between the upper cladding layer and the channel layer to supply carriers to the channel layer.

    摘要翻译： 自旋晶体管包括：半导体衬底，包括具有二维电子气体结构的沟道层和分别设置在沟道层的上侧和下侧的上和下包层; 形成在所述半导体衬底上并且彼此间隔开的铁磁源极和漏极; 栅电极，设置在源电极和漏电极之间并且施加栅极电压以控制通过沟道层的电子的自旋; 第一载流子供给层，设置在所述下包层和所述沟道层之间，以向所述沟道层提供载流子; 以及第二载体供给层，其设置在所述上​​包层和所述沟道层之间，以将载流子供应到所述沟道层。

    Spin Transistor Using Epitaxial Ferromagnet-Semiconductor Junction
    6.
    发明申请
    Spin Transistor Using Epitaxial Ferromagnet-Semiconductor Junction 有权
    使用外延铁磁半导体结的旋转晶体管

    公开(公告)号：US20090152606A1

    公开(公告)日：2009-06-18

    申请号：US12233488

    申请日：2008-09-18

    申请人： Hyun Cheol KOO ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Kyung Ho Kim

    发明人： Hyun Cheol KOO ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Kyung Ho Kim

    IPC分类号： H01L29/51 ,  H01L21/00

    CPC分类号： H01L29/205 ,  B82Y10/00 ,  H01L29/122 ,  H01L29/66984 ,  Y10S977/933

    摘要： A spin transistor conducive to the miniaturization and large scale integration of devices, because a magnetization direction of a source and a drain is determined by a direction of the epitaxial growth of a ferromagnet. The spin transistor includes a semiconductor substrate having a channel layer formed thereinside; ferromagnetic source and drain epitaxially grown on the semiconductor substrate and magnetized in a longitudinal direction of the channel layer due to magnetocrystalline anisotropy—the source and drain being disposed spaced apart from each other in a channel direction and magnetized in the same direction—; and a gate disposed between the source and the drain to be insulated with the semiconductor substrate and formed on the semiconductor substrate to control the spin of electrons that are passed through the channel layer.

    摘要翻译： 有助于器件的小型化和大规模集成的自旋晶体管，因为源极和漏极的磁化方向由铁磁体的外延生长的方向决定。 自旋晶体管包括其内部形成有沟道层的半导体衬底; 外延生长在半导体衬底上的铁磁源极和漏极，并且由于磁晶各向异性而在沟道层的纵向上被磁化 - 源极和漏极沿沟道方向彼此间隔开并沿相同方向被磁化; 以及设置在源极和漏极之间的栅极，与半导体衬底绝缘并形成在半导体衬底上，以控制通过沟道层的电子的自旋。

    COMPLEMENTARY SPIN TRANSISTOR LOGIC CIRCUIT
    7.
    发明申请
    COMPLEMENTARY SPIN TRANSISTOR LOGIC CIRCUIT 有权
    补充旋转晶体管逻辑电路

    公开(公告)号：US20110279146A1

    公开(公告)日：2011-11-17

    申请号：US12899778

    申请日：2010-10-07

    申请人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jun Woo Choi

    发明人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jun Woo Choi

    IPC分类号： H03K19/091

    CPC分类号： H03K19/091 ,  B82Y10/00 ,  G11C11/16 ,  H03K19/18

    摘要： There is provided a complementary spin transistor logic circuit, including: a parallel spin transistor that includes a magnetized first source, a first drain magnetized in parallel with the magnetization direction of the first source, a first channel layer and a first gate electrode; and an anti-parallel spin transistor that includes a magnetized second source, a second drain magnetized in anti-parallel with the magnetization direction of the second source, a second channel layer and a second gate electrode, wherein the first gate electrode and the second gate electrode are connected to a common input terminal.

    摘要翻译： 提供了一种互补自旋晶体管逻辑电路，包括：并联自旋晶体管，其包括磁化的第一源，与第一源的磁化方向平行磁化的第一漏极，第一沟道层和第一栅电极; 以及反并联自旋晶体管，其包括磁化的第二源极，与所述第二源极的磁化方向反并联的第二漏极，第二沟道层和第二栅电极，其中所述第一栅电极和所述第二栅极 电极连接到公共输入端子。

    Spin transistor using perpendicular magnetization
    8.
    发明授权
    Spin transistor using perpendicular magnetization 有权
    旋转晶体管使用垂直磁化

    公开(公告)号：US07994555B2

    公开(公告)日：2011-08-09

    申请号：US11949659

    申请日：2007-12-03

    申请人： Hyun-Cheol Koo ,  Suk-Hee Han ,  Joon-Yeon Chang ,  Hyung-Jun Kim ,  Jin-Seock Ma

    发明人： Hyun-Cheol Koo ,  Suk-Hee Han ,  Joon-Yeon Chang ,  Hyung-Jun Kim ,  Jin-Seock Ma

    IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： G11C11/16 ,  H01L29/20 ,  H01L29/66984

    摘要： A spin transistor useful for device miniaturization and high-density integration is provided. The spin transistor includes: a semiconductor substrate including a channel layer; ferromagnetic source and drain disposed on the semiconductor substrate to be separated from each other and to be magnetized in a direction perpendicular to a surface of the channel layer; a gate formed on the semiconductor substrate between the source and the drain to adjust spins of electrons passing through the channel layer, wherein spin-polarized electrons are injected from the source to the channel layer, and the electrons injected into the channel layer pass though the channel layer and are injected into the drain, and wherein the spins of the electrons passing through the channel layer undergo precession due to a spin-orbit coupling induced magnetic field according to a voltage of the gate.

    摘要翻译： 提供了用于器件小型化和高密度集成的自旋晶体管。 自旋晶体管包括：包括沟道层的半导体衬底; 设置在半导体衬底上的铁磁源极和漏极彼此分离并沿垂直于沟道层表面的方向被磁化; 形成在源极和漏极之间的半导体衬底上的栅极，以调节通过沟道层的电子的旋转，其中自旋极化电子从源极注入沟道层，并且注入沟道层的电子通过 沟道层并且注入到漏极中，并且其中通过沟道层的电子的自旋由于根据栅极的电压的自旋 - 轨道耦合感应磁场而进行进动。

    RECONFIGURABLE LOGIC DEVICE USING SPIN ACCUMULATION AND DIFFUSION
    9.
    发明申请
    RECONFIGURABLE LOGIC DEVICE USING SPIN ACCUMULATION AND DIFFUSION 有权
    使用旋转累积和扩展的可重构逻辑器件

    公开(公告)号：US20110042648A1

    公开(公告)日：2011-02-24

    申请号：US12684586

    申请日：2010-01-08

    申请人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jang Hae Ku

    发明人： Hyun Cheol Koo ,  Suk Hee Han ,  Joon Yeon Chang ,  Hyung Jun Kim ,  Jang Hae Ku

    IPC分类号： H01L29/82 ,  H01L29/66

    CPC分类号： H01L29/66984 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L29/0665 ,  H01L29/1606 ,  H01L29/7783

    摘要： A logic device includes: a substrate having a channel layer; two input terminal patterns of ferromagnetic material formed on the substrate and spaced apart from each other along a longitudinal direction of the channel layer so as to serve as the input terminals of a logic gate; and an output terminal pattern of ferromagnetic material formed on the substrate and disposed between the two input terminal patterns to serve as an output terminal of the logic gate. The output terminal pattern reads an output voltage by using spin accumulation and diffusion of electron spins which are injected into the channel layer from the input terminal patterns.

    摘要翻译： 逻辑器件包括：具有沟道层的衬底; 铁磁材料的两个输入端子图案形成在基板上并且沿着沟道层的纵向方向彼此间隔开，以便用作逻辑门的输入端; 以及形成在所述基板上并且设置在所述两个输入端子图案之间以用作所述逻辑门的输出端子的铁磁材料的输出端子图案。 输出端子图案通过使用从输入端子图案注入到沟道层中的电子自旋的自旋累积和扩散来读取输出电压。