公开(公告)号：US09064925B2

公开(公告)日：2015-06-23

申请号：US13625591

申请日：2012-09-24

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Arnost Kopta ,  Christoph Von Arx ,  Maxi Andenna

IPC: H01L29/739 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/4232 ,  H01L29/7395

Abstract: A power semiconductor device is disclosed with layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side. The device can include a drift layer, a first base layer in direct electrical contact to the emitter electrode, a first source region embedded into the first base layer which contacts the emitter electrode and has a higher doping concentration than the drift layer, a first gate electrode in a same plane and lateral to the first base layer, a second base layer in the same plane and lateral to the first base layer, a second gate electrode on top of the emitter side, and a second source region electrically insulated from the second base layer, the second source region and the drift layer by a second insulating layer.

Abstract translation: 在发射极侧的发射电极和集电极侧的集电极之间公开了具有不同导电类型的功率半导体器件。 该器件可以包括漂移层，与发射极直接电接触的第一基极层，嵌入到与发射极电极接触并且具有比漂移层更高的掺杂浓度的第一基极层中的第一源极区域，第一栅极 电极在同一平面中并且与第一基底层相对，第二基底层在同一平面中并且与第一基底层相对，第二栅电极位于发射极侧顶部，第二源极区域与第二基极层电绝缘 基极层，第二源极区域和漂移层通过第二绝缘层。

公开(公告)号：US09324708B2

公开(公告)日：2016-04-26

申请号：US13716803

申请日：2012-12-17

Applicant: ABB Technology AG

Inventor： Liutauras Storasta ,  Arnost Kopta ,  Munaf Rahimo

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC classification number: H01L27/088 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7395 ,  H01L29/7396

Abstract: An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer.

Abstract translation: 具有在发射极侧具有发射极的晶片和集电极侧的集电极，第（n-）掺杂漂移层，n掺杂的第一区，p掺杂的基极层，n 掺杂的源极区和栅电极，所有这些都形成在发射极和集电极之间。 发射极电极在接触区域内接触基极层和源极区域。 有源半导体单元形成在晶片内，并且包括相对于发射极电极的接触区域的发射极侧处于正交投影的层。 该器件还包括一个p掺杂的阱，它被布置在与基极层相同的平面中，但是在活性电池的外部。 阱直接或经由基底层至少一个电连接到发射极电极。

公开(公告)号：US09105680B2

公开(公告)日：2015-08-11

申请号：US14149412

申请日：2014-01-07

Applicant: ABB TECHNOLOGY AG

Inventor： Maxi Andenna ,  Munaf Rahimo ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/66348 ,  H01L29/7395

Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括在集电极侧的集电极层，漂移层，第二导电类型的基极层，布置在基底层上朝向发射极侧的第一源极区域，设置在基极层的侧面并延伸的沟槽栅电极 漂移层比基层更深，井底侧布置在基层上并且比基层更深地延伸到漂移层中，围绕基层的增强层，以便使基层与漂移层完全分离，并且 阱，覆盖阱并通过第二电绝缘层与阱分离的导电层，以及在导电层顶部具有凹陷的第三绝缘层，使得导电层与发射极电气接触。

公开(公告)号：US20130099279A1

公开(公告)日：2013-04-25

申请号：US13716803

申请日：2012-12-17

Applicant: ABB Technology AG

Inventor： Liutauras Storasta ,  Arnost Kopta ,  Munaf Rahimo

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7395 ,  H01L29/7396

Abstract: An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer.

Abstract translation: 具有在发射极侧具有发射极的晶片和集电极侧的集电极，第（n-）掺杂漂移层，n掺杂的第一区，p掺杂的基极层，n 掺杂的源极区和栅电极，所有这些都形成在发射极和集电极之间。 发射极电极在接触区域内接触基极层和源极区域。 有源半导体单元形成在晶片内，并且包括相对于发射极电极的接触区域的发射极侧处于正交投影的层。 该器件还包括一个p掺杂的阱，它被布置在与基极层相同的平面中，但是在活性电池的外部。 阱直接或经由基底层至少一个电连接到发射极电极。

公开(公告)号：US09153676B2

公开(公告)日：2015-10-06

申请号：US14154736

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层，包括漂移层，与发射极电气接触并与漂移层完全分离的基极层，布置在基极层上的发射极侧的第一和第二源极区域，并且电接触发射极 电极，以及第一和第二沟槽栅电极。 第一沟槽栅极电极通过第一绝缘层与基极层，第一源极区域和漂移层分离。 在发射电极，第一源极区域，基极层和漂移层之间形成通道。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层将基底层与漂移层分开。 第二沟槽栅电极通过第三绝缘层与基极层，增强层和漂移层分离。

公开(公告)号：US09099520B2

公开(公告)日：2015-08-04

申请号：US14154790

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L21/33 ,  H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括漂移层，与发射电极电接触并与漂移层分离的基极层，布置在基底层上朝向发射极侧并电接触发射极的第一源极区域和布置在侧面上的第一沟槽栅电极 并且通过第一绝缘层与基底层，第一源极区域和漂移层分离。 一个通道在发射电极，第一源极区域，基极层和漂移层之间离开。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层在与发射极侧平行的平面中分离基底层与漂移层。 接地栅电极包括第二接地沟槽栅电极和导电层。

公开(公告)号：US09006041B2

公开(公告)日：2015-04-14

申请号：US14046156

申请日：2013-10-04

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Arnost Kopta ,  Thomas Clausen ,  Maxi Andenna

IPC: H01L21/332 ,  H01L21/8224 ,  H01L29/76 ,  H01L29/00 ,  H01L27/082 ,  H01L29/66 ,  H01L29/08 ,  H01L29/36 ,  H01L29/739 ,  H01L29/861

CPC classification number: H01L29/66325 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

Abstract: A method for manufacturing a bipolar punch-through semiconductor device is disclosed, which includes providing a wafer having a first and a second side, wherein on the first side a high-doped layer of the first conductivity type having constant high doping concentration is arranged; epitaxially growing a low-doped layer of the first conductivity type on the first side; performing a diffusion step by which a diffused inter-space region is created at the inter-space of the layers; creating at least one layer of the second conductivity type on the first side; and reducing the wafer thickness within the high-doped layer on the second side so that a buffer layer is created, which can include the inter-space region and the remaining part of the high-doped layer, wherein the doping profile of the buffer layer decreases steadily from the doping concentration of the high-doped region to the doping concentration of the drift layer.

Abstract translation: 公开了一种制造双极穿通半导体器件的方法，其包括提供具有第一和第二侧的晶片，其中在第一侧上布置具有恒定的高掺杂浓度的第一导电类型的高掺杂层; 在第一侧上外延生长第一导电类型的低掺杂层; 执行扩散步骤，通过该扩散步骤在层的间隔处产生扩散的空间间区域; 在第一侧产生至少一层第二导电类型; 并且减小第二侧上的高掺杂层内的晶片厚度，从而形成缓冲层，其可以包括空间间区域和高掺杂层的剩余部分，其中缓冲层的掺杂分布 从高掺杂区域的掺杂浓度稳定地降低到漂移层的掺杂浓度。

公开(公告)号：US20140124831A1

公开(公告)日：2014-05-08

申请号：US14154790

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf RAHIMO ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括漂移层，与发射电极电接触并与漂移层分离的基极层，布置在基底层上朝向发射极侧并电接触发射极的第一源极区域和布置在侧面上的第一沟槽栅电极 并且通过第一绝缘层与基底层，第一源极区域和漂移层分离。 一个通道在发射电极，第一源极区域，基极层和漂移层之间离开。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层在与发射极侧平行的平面中分离基底层与漂移层。 接地栅电极包括第二接地沟槽栅电极和导电层。