公开(公告)号：US09825158B2

公开(公告)日：2017-11-21

申请号：US15151334

申请日：2016-05-10

Applicant: ABB Technology AG

Inventor： Chiara Corvasce

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/063 ,  H01L29/0642 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4238

Abstract: An IGBT is provided having a first gate unit having first trench gates with first conductive layers and planar gates with second conductive layers. A second gate unit having a second trench gates may be connected to the emitter electrode, with the first and second conductive layers forming a first shape closed in itself and enclosing the second gate unit. Third trench gates are arranged between a planar gate and the second gate unit such that first and third trench gates are connected and form a second shape closed in itself by which the second gate unit is enclosed. P+ doped bars below the planar gale contact the emitter electrode with each third trench gate separating a bar and a planar gate electrode from the second gate unit, with a p doped base layer separating the second gate unit from the enclosing second shape.

公开(公告)号：US20160300904A1

公开(公告)日：2016-10-13

申请号：US15184261

申请日：2016-06-16

Applicant: ABB Technology AG

Inventor： Marina Antoniou ,  Florin Udrea ,  Iulian Nistor ,  Munaf Rahimo ,  Chiara Corvasce

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/0619 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

Abstract: A termination region of an IGBT is described, in which surface p-rings are combined with oxide/polysilicon-filled trenches, buried p-rings and surface field plates, so as to obtain an improved distribution of potential field lines in the termination region. The combination of surface ring termination and deep ring termination offers a significant reduction in the amount silicon area which is required for the termination region.

Abstract translation: 描述了IGBT的终端区域，其中表面p环与氧化物/多晶硅填充的沟槽，埋入的p环和表面场板组合，以便获得终止区域中的电位场线的改进的分布。 表面环终止和深环终止的组合提供了终端区域所需的硅面积的显着减少。

公开(公告)号：US20160254376A1

公开(公告)日：2016-09-01

申请号：US15151334

申请日：2016-05-10

Applicant: ABB Technology AG

Inventor： Chiara Corvasce

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/7397 ,  H01L29/063 ,  H01L29/0642 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4238

Abstract: An IGBT is provided having a first gate unit having first trench gates with first conductive layers and planar gates with second conductive layers. A second gate unit having a second trench gates may be connected to the emitter electrode, with the first and second conductive layers forming a first shape closed in itself and enclosing the second gate unit. Third trench gates are arranged between a planar gate and the second gate unit such that first and third trench gates are connected and form a second shape closed in itself by which the second gate unit is enclosed. P+ doped bars below the planar gale contact the emitter electrode with each third trench gate separating a bar and a planar gate electrode from the second gate unit, with a p doped base layer separating the second gate unit from the enclosing second shape.

Abstract translation: 提供具有第一栅极单元的IGBT，该第一栅极单元具有带有第一导电层的第一沟槽栅极和具有第二导电层的平面栅极。 具有第二沟槽栅极的第二栅极单元可以连接到发射极电极，其中第一和第二导电层本身形成封闭的第一形状并且包围第二栅极单元。 第三沟槽栅极被布置在平面栅极和第二栅极单元之间，使得第一和第三沟槽栅极被连接并且形成封闭的第二形状，第二栅极单元被封闭。 平面阵列下方的P +掺杂条与发射极电极接触，每个第三沟槽栅极与第二栅极单元分隔条和平面栅电极，p掺杂的基极层将第二栅极单元与封闭的第二形状分开。

公开(公告)号：US09153676B2

公开(公告)日：2015-10-06

申请号：US14154736

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层，包括漂移层，与发射极电气接触并与漂移层完全分离的基极层，布置在基极层上的发射极侧的第一和第二源极区域，并且电接触发射极 电极，以及第一和第二沟槽栅电极。 第一沟槽栅极电极通过第一绝缘层与基极层，第一源极区域和漂移层分离。 在发射电极，第一源极区域，基极层和漂移层之间形成通道。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层将基底层与漂移层分开。 第二沟槽栅电极通过第三绝缘层与基极层，增强层和漂移层分离。

公开(公告)号：US09099520B2

公开(公告)日：2015-08-04

申请号：US14154790

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L21/33 ,  H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括漂移层，与发射电极电接触并与漂移层分离的基极层，布置在基底层上朝向发射极侧并电接触发射极的第一源极区域和布置在侧面上的第一沟槽栅电极 并且通过第一绝缘层与基底层，第一源极区域和漂移层分离。 一个通道在发射电极，第一源极区域，基极层和漂移层之间离开。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层在与发射极侧平行的平面中分离基底层与漂移层。 接地栅电极包括第二接地沟槽栅电极和导电层。

公开(公告)号：US20140124831A1

公开(公告)日：2014-05-08

申请号：US14154790

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf RAHIMO ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括漂移层，与发射电极电接触并与漂移层分离的基极层，布置在基底层上朝向发射极侧并电接触发射极的第一源极区域和布置在侧面上的第一沟槽栅电极 并且通过第一绝缘层与基底层，第一源极区域和漂移层分离。 一个通道在发射电极，第一源极区域，基极层和漂移层之间离开。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层在与发射极侧平行的平面中分离基底层与漂移层。 接地栅电极包括第二接地沟槽栅电极和导电层。

公开(公告)号：US09105680B2

公开(公告)日：2015-08-11

申请号：US14149412

申请日：2014-01-07

Applicant: ABB TECHNOLOGY AG

Inventor： Maxi Andenna ,  Munaf Rahimo ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/66348 ,  H01L29/7395

Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括在集电极侧的集电极层，漂移层，第二导电类型的基极层，布置在基底层上朝向发射极侧的第一源极区域，设置在基极层的侧面并延伸的沟槽栅电极 漂移层比基层更深，井底侧布置在基层上并且比基层更深地延伸到漂移层中，围绕基层的增强层，以便使基层与漂移层完全分离，并且 阱，覆盖阱并通过第二电绝缘层与阱分离的导电层，以及在导电层顶部具有凹陷的第三绝缘层，使得导电层与发射极电气接触。

公开(公告)号：US20140370665A1

公开(公告)日：2014-12-18

申请号：US14477229

申请日：2014-09-04

Applicant: ABB Technology AG

Inventor： Munaf RAHIMO ,  Chiara Corvasce ,  Jan Vobecky ,  Yoichi Otani

IPC: H01L29/66 ,  H01L21/283 ,  H01L21/324 ,  H01L21/225

CPC classification number: H01L29/66325 ,  H01L21/2251 ,  H01L21/283 ,  H01L21/324 ,  H01L29/0834 ,  H01L29/45 ,  H01L29/456 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/8613

Abstract: A method for manufacturing a power semiconductor device is disclosed which can include: providing a wafer of a first conductivity type; and applying on a second main side of the wafer at least one of a dopant of the first conductivity type for forming a layer of the first conductivity type and a dopant of a second conductivity type for forming a layer of the second conductivity type. A Titanium layer with a metal having a melting point above 1300° C. is then deposited on the second main side. The Titanium deposition layer is annealed so that simultaneously an intermetal compound layer is formed at the interface between the Titanium deposition layer and the wafer and the dopant is diffused into the wafer. A first metal electrode layer is created on the second main side.

Abstract translation: 公开了一种用于制造功率半导体器件的方法，其可以包括：提供第一导电类型的晶片; 以及在所述晶片的第二主侧上施加用于形成第一导电类型的第一导电类型的掺杂剂和用于形成第二导电类型的层的第二导电类型的掺杂剂中的至少一种。 然后将具有熔点高于1300℃的金属的钛层沉积在第二主侧上。 钛沉积层进行退火，从而在钛沉积层和晶片之间的界面处同时形成金属间化合物层，并且掺杂剂扩散到晶片中。 在第二主面上形成第一金属电极层。