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    METHOD FOR MANUFACTURING AN ETCH STOP LAYER AND MEMS SENSOR COMPRISING AN ETCH STOP LAYER
    2.
    发明申请
    METHOD FOR MANUFACTURING AN ETCH STOP LAYER AND MEMS SENSOR COMPRISING AN ETCH STOP LAYER 有权

    公开(公告)号：US20210214216A1

    公开(公告)日：2021-07-15

    申请号：US17056201

    申请日：2019-05-08

    Applicant: ams AG

    Inventor： Alessandro FAES ,  Sophie GUILLEMIN ,  Joerg SIEGERT ,  Karl TUTTNER

    IPC: B81C1/00

    Abstract: The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes comprises depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
    3.
    发明申请
    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR 审中-公开

    公开(公告)号：US20200313031A1

    公开(公告)日：2020-10-01

    申请号：US16756025

    申请日：2018-10-15

    Applicant: ams AG

    Inventor： Gregor TOSCHKOFF ,  Thomas BODNER ,  Franz SCHRANK ,  Miklos LABODI ,  Joerg SIEGERT ,  Martin SCHREMS

    IPC: H01L31/18 ,  G01J1/04 ,  G01J1/02 ,  H01L31/0216 ,  H01L31/02 ,  H01L31/0203

    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench. Each optical sensor comprises an optical sensor element, and the light entrance surface is free of electrical contacts and at least partially free of the opaque material above the optical sensor elements. Furthermore, an optical sensor is provided.

    METHOD OF PRODUCING A REMOVABLE WAFER CONNECTION AND CARRIER FOR WAFER SUPPORT
    4.
    发明申请
    METHOD OF PRODUCING A REMOVABLE WAFER CONNECTION AND CARRIER FOR WAFER SUPPORT 有权
    生产可移动波浪连接的方法和用于波形支持的载波

    公开(公告)号：US20150348817A1

    公开(公告)日：2015-12-03

    申请号：US14654471

    申请日：2013-12-19

    Applicant: AMS AG

    Inventor： Thomas BODNER ,  Joerg SIEGERT ,  Martin SCHREMS

    IPC: H01L21/683

    CPC classification number: H01L21/6835 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10T156/10 ,  Y10T156/1111

    Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the centre of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

    Abstract translation: 浮雕结构形成在用于容纳晶片的载体的表面上，该晶片通过与载体接触的可移除的粘合剂固定到载体上。 可以在空间上限制在载体的中心的浮雕结构降低了晶片和载体之间的粘合强度。 如果适当地选择粘合剂并且在升高的温度下维持晶片和载体之间的连接，则可以在通常为300℃或更高的温度下进行进一步的工艺步骤。 粘合剂接头随后的机械分离由载体上的浮雕结构促进。

    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA
    5.
    发明申请
    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA 有权

    公开(公告)号：US20220059434A1

    公开(公告)日：2022-02-24

    申请号：US17415167

    申请日：2019-12-20

    Applicant: ams AG

    Inventor： Bernhard LOEFFLER ,  Thomas BODNER ,  Joerg SIEGERT

    IPC: H01L23/48 ,  H01L23/522 ,  H01L23/31 ,  H01L23/528 ,  H01L21/768

    Abstract: An intermetal dielectric and metal layers embedded in the intermetal dielectric are arranged on a substrate of semiconductor material. A via hole is formed in the substrate, and a metallization contacting a contact area of one of the metal layers is applied in the via hole. The metallization, the metal layer comprising the contact area and the intermetal dielectric are partially removed at the bottom of the via hole in order to form a hole penetrating the intermetal dielectric and extending the via hole. A continuous passivation is arranged on sidewalls within the via hole and the hole, and the metallization contacts the contact area around the hole. Thus the presence of a thin membrane of layers, which is usually formed at the bottom of a hollow through-substrate via, is avoided.

    SEMICONDUCTOR DEVICE WITH PHOTONIC AND ELECTRONIC FUNCTIONALITY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE WITH PHOTONIC AND ELECTRONIC FUNCTIONALITY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190025505A1

    公开(公告)日：2019-01-24

    申请号：US15757645

    申请日：2016-08-25

    Applicant: ams AG

    Inventor： Jochen KRAFT ,  Joerg SIEGERT

    IPC: G02B6/12 ,  H01L23/522 ,  H01L21/48 ,  H01L23/00 ,  G02B6/13

    Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.

    SEMICONDUCTOR DEVICE WITH INTEGRATED MIRROR AND METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH INTEGRATED MIRROR
    8.
    发明申请
    SEMICONDUCTOR DEVICE WITH INTEGRATED MIRROR AND METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH INTEGRATED MIRROR 有权
    具有集成镜的半导体器件及其制造具有集成反射镜的半导体器件的方法

    公开(公告)号：US20160334572A1

    公开(公告)日：2016-11-17

    申请号：US15101406

    申请日：2014-11-17

    Applicant: AMS AG

    Inventor： Jochen KRAFT ,  Joerg SIEGERT ,  Ewald STUECKLER

    IPC: G02B6/122 ,  G02B6/132

    CPC classification number: G02B6/122 ,  G02B6/12004 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/43 ,  G02B2006/12104

    Abstract: The semiconductor device comprises a substrate (1) of semiconductor material, a dielectric layer (2) above the substrate, a waveguide (3) arranged in the dielectric layer, and a mirror region (4) arranged on a surface of a mirror support (5) integrated on the substrate. A mirror is thus formed facing the waveguide. The surface of the mirror support and hence the mirror are inclined with respect to the waveguide.

    Abstract translation: 半导体器件包括半导体材料的衬底（1），衬底上的电介质层（2），布置在电介质层中的波导（3）和布置在反射镜支撑体的表面上的反射镜区域（4） 5）集成在基板上。 因此形成面向波导的反射镜。 反射镜支撑体的表面，因此反射镜相对于波导管倾斜。

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