公开(公告)号：US09477596B2

公开(公告)日：2016-10-25

申请号：US14754433

申请日：2015-06-29

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F12/0253 ,  G06F12/0238 ,  G06F12/0246 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.

公开(公告)号：US20150301938A1

公开(公告)日：2015-10-22

申请号：US14754433

申请日：2015-06-29

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F12/0253 ,  G06F12/0238 ,  G06F12/0246 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.

Abstract translation: 公开了用于具有非易失性存储器（“NVM”）的系统的逻辑块地址（“LBA”）位图使用的系统和方法。 位图可以存储在系统的易失性存储器中，其中位图可以存储一个或多个逻辑地址的映射状态。 通过使用位图，系统可以确定LBA的映射状态，而无需访问NVM。 此外，系统可以使用最小的NVM访问来更新LBA的映射状态。 通过减少NVM访问次数，系统可以避免触发垃圾收集过程，从而提高整体系统性能。

公开(公告)号：US09063732B2

公开(公告)日：2015-06-23

申请号：US14076674

申请日：2013-11-11

Applicant: Apple Inc.

Inventor： Matthew J. Byom ,  Vadim Khmelnitsky ,  Hugo B. Fiennes ,  Arjun Kapoor

IPC: G06F1/32 ,  G06F3/06 ,  G06F9/50 ,  G11C16/30

CPC classification number: G06F1/3225 ,  G06F1/3275 ,  G06F1/329 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/5094 ,  G11C16/30 ,  Y02D10/14 ,  Y02D10/154 ,  Y02D10/22 ,  Y02D10/24

Abstract: Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold.

Abstract translation: 公开了用于使用分配多个并发NVM操作随时间推移的功率限制方案来限制非易失性存储器（NVM）的功率消耗的系统和方法。 这提供了一个“电流消耗上限”，用于确定NVM的电流消耗上限，从而消除峰值功率事件。 在一个实施例中，可以通过接收适合用作从多个系统源中的至少一个调整当前阈值的因素的数据来限制NVM的功耗。 当前阈值可以小于能够被NVM消耗的峰值电流，并且可以基于所接收的数据进行调整。 可以使用功率限制方案，其限制执行的并行NVM操作的数量，使得NVM的累积电流消耗不超过调整的电流阈值。

公开(公告)号：US20140068296A1

公开(公告)日：2014-03-06

申请号：US14076674

申请日：2013-11-11

Applicant: Apple Inc.

Inventor： Matthew J. Byom ,  Vadim Khmelnitsky ,  Hugo B. Fiennes ,  Arjun Kapoor

IPC: G06F1/32

CPC classification number: G06F1/3225 ,  G06F1/3275 ,  G06F1/329 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/5094 ,  G11C16/30 ,  Y02D10/14 ,  Y02D10/154 ,  Y02D10/22 ,  Y02D10/24

Abstract: Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold.

Abstract translation: 公开了用于使用分配多个并发NVM操作随时间推移的功率限制方案来限制非易失性存储器（NVM）的功率消耗的系统和方法。 这提供了一个“电流消耗上限”，用于确定NVM的电流消耗上限，从而消除峰值功率事件。 在一个实施例中，可以通过接收适合用作从多个系统源中的至少一个调整当前阈值的因素的数据来限制NVM的功耗。 当前阈值可以小于能够被NVM消耗的峰值电流，并且可以基于所接收的数据进行调整。 可以使用功率限制方案，其限制执行的并行NVM操作的数量，使得NVM的累积电流消耗不超过调整的电流阈值。

公开(公告)号：US20130212318A1

公开(公告)日：2013-08-15

申请号：US13725671

申请日：2012-12-21

Applicant: Apple Inc.

Inventor： Tahoma Toelkes ,  Nir Jacob Wakrat ,  Kenneth L. Herman ,  Barry Corlett ,  Vadim Khmelnitsky ,  Anthony Fai ,  Daniel Jeffrey Post ,  Hsiao Thio

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F12/0607 ,  G06F2212/1016 ,  G06F2212/7208

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract translation: 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。

公开(公告)号：US20130132653A1

公开(公告)日：2013-05-23

申请号：US13740620

申请日：2013-01-14

Applicant: APPLE INC.

Inventor： Daniel J. Post ,  Matthew J. Byom ,  Vadim Khmelnitsky ,  Nir Jacob Wakrat ,  Kenneth Herman

IPC: G06F12/02 ,  G06F3/06 ,  G06F11/10

CPC classification number: G06F3/0643 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/0652 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0246 ,  G06F2212/7202 ,  G11C29/52

Abstract: Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.

Abstract translation: 公开了用于分割用于存储在诸如闪存的非易失性存储器（“NVM”）中的数据的系统和方法。 在一些实施例中，可以将优先级分配给正在存储的数据，并且可以基于优先级逻辑地划分数据。 例如，文件系统可以识别用于较高优先级数据的第一预定范围内的逻辑地址，并且在较低优先权数据的第二预定范围内识别逻辑地址，诸如使用联合文件系统。 使用逻辑地址，NVM驱动器可以确定正在存储的数据的优先级，并且可以基于优先级处理（例如，编码）数据。 NVM驱动程序可以将数据与NVM一起存储在标识符中，并且标识符可以指示在相关数据上使用的处理技术。

公开(公告)号：US09841917B2

公开(公告)日：2017-12-12

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

公开(公告)号：US20160092110A1

公开(公告)日：2016-03-31

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

Abstract translation: 公开了用于配置非易失性存储器（“NVM”）的系统和方法。 在一些实施例中，NVM的每个块可以包括可以被编码（例如，游程长度编码）和动态尺寸的块内容表（“TOC”）。 因此，当用户数据被编程到块时，块TOC的大小可以被同时重新计算并且仅在必要时增加。 在一些实施例中，NVM接口可以使用存储在上下文信息中的编织序列和与块的每个页面相关联的至少一个编织序列来确定在系统启动之后跨块的页面是否重播。

公开(公告)号：US20140297935A1

公开(公告)日：2014-10-02

申请号：US14305488

申请日：2014-06-16

Applicant: Apple Inc.

Inventor： Daniel J. Post ,  Nir Jacob Wakrat ,  Vadim Khmelnitsky

IPC: G06F12/02

CPC classification number: G06F3/0643 ,  G06F11/1417 ,  G06F11/1435 ,  G06F12/0246 ,  G06F17/30218

Abstract: Systems and methods are disclosed for mount-time reconciliation of data availability. During system boot-up, a non-volatile memory (“NVM”) driver can be enumerated, and an NVM driver mapping can be obtained. The NVM driver mapping can include the actual availability of LBAs in the NVM. A file system can then be mounted, and a file system allocation state can be generated. The file system allocation state can indicate the file system's view of the availability of LBAs. Subsequently, data availability reconciliation can be performed. That is, the file system allocation state and the NVM driver mapping can be overlaid and compared with one another in order to expose any discrepancies.

Abstract translation: 披露了数据可用性的安装时间调节的系统和方法。 在系统启动期间，可以列举非易失性存储器（“NVM”）驱动程序，并且可以获得NVM驱动程序映射。 NVM驱动程序映射可以包括NVM中LBA的实际可用性。 然后可以安装文件系统，并且可以生成文件系统分配状态。 文件系统分配状态可以指示文件系统对LBA可用性的视图。 随后，可以执行数据可用性协调。 也就是说，文件系统分配状态和NVM驱动程序映射可以被叠加并相互比较，以便暴露任何差异。

公开(公告)号：US08806151B2

公开(公告)日：2014-08-12

申请号：US13676729

申请日：2012-11-14

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Nir Jacob Wakrat ,  Tahoma Toelkes ,  Daniel Jeffrey Post ,  Anthony Fai

IPC: G06F13/00 ,  G06F13/28 ,  G06F12/02

CPC classification number: G06F12/0246

Abstract: Multipage preparation commands for non-volatile memory systems are disclosed. The multipage preparation commands supply data that can be used to prepare a non-volatile memory device for forthcoming multipage program operations. A host controller can use the commands ahead of a multipage program operation to optimize usage of a multipage program command. The non-volatile memory device can use the commands to configure the non-volatile memory in preparation for a subsequent operation, such as changing a command order or using the most optimized command set for the subsequent operation.

Abstract translation: 公开了用于非易失性存储器系统的多位准备命令。 多功能准备命令提供可用于准备非易失性存储器设备的数据，用于即将进行的多页程序操作。 主机控制器可以使用多页面程序操作之前的命令来优化多页面程序命令的使用。 非易失性存储器件可以使用这些命令来配置非易失性存储器以准备随后的操作，例如改变命令顺序或使用用于后续操作的最优化的命令集。