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1.SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 审中-公开
Title translation: 用于高速,低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号:US20170005056A1
公开(公告)日:2017-01-05
申请号:US15266752
申请日:2016-09-15
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路(“IC”)封装基板,能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧,并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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公开(公告)号:US09853016B2
公开(公告)日:2017-12-26
申请号:US15435719
申请日:2017-02-17
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/065 , H01L25/00 , H01L23/498
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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公开(公告)号:US09466571B2
公开(公告)日:2016-10-11
申请号:US14802750
申请日:2015-07-17
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/538 , H01L23/498 , H01L23/00 , H01L23/60 , H01L23/528 , H01L21/48 , H01L25/00 , H01L21/56 , H01L25/065 , H01L25/18 , H01L23/552
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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4.SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 审中-公开
Title translation: 用于高速,低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号:US20150325560A1
公开(公告)日:2015-11-12
申请号:US14802750
申请日:2015-07-17
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/18 , H01L23/00 , H01L23/60 , H01L21/56 , H01L21/48 , H01L25/065 , H01L25/00 , H01L23/498 , H01L23/528
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路(“IC”)封装基板,能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧,并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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公开(公告)号:US20170162546A1
公开(公告)日:2017-06-08
申请号:US15435719
申请日:2017-02-17
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/065 , H01L23/498 , H01L25/00
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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6.Systems and methods for high-speed, low-profile memory packages and pinout designs 有权
Title translation: 用于高速,低调内存封装和引脚排列设计的系统和方法公开(公告)号:US09583452B2
公开(公告)日:2017-02-28
申请号:US15266752
申请日:2016-09-15
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路(“IC”)封装基板,能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧,并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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7.Systems and methods for high-speed, low-profile memory packages and pinout designs 有权
Title translation: 用于高速,低调内存封装和引脚排列设计的系统和方法公开(公告)号:US09087846B2
公开(公告)日:2015-07-21
申请号:US13801722
申请日:2013-03-13
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/538 , H01L23/498 , H01L25/065 , H01L25/18
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路(“IC”)封装基板,能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧,并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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8.SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 有权
Title translation: 用于高速,低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号:US20140264906A1
公开(公告)日:2014-09-18
申请号:US13801722
申请日:2013-03-13
Applicant: APPLE INC.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/538
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路(“IC”)封装基板,能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧,并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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9.UNIFIED PCB DESIGN FOR SSD APPLICATIONS, VARIOUS DENSITY CONFIGURATIONS, AND DIRECT NAND ACCESS 审中-公开
Title translation: 统一的PCB设计适用于SSD应用,各种密度配置和直接NAND访问公开(公告)号:US20140264904A1
公开(公告)日:2014-09-18
申请号:US13801104
申请日:2013-03-13
Applicant: Apple Inc.
Inventor: Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/498 , H01L21/50
CPC classification number: H01L23/49827 , H01L23/5384 , H01L25/105 , H01L2924/0002 , H05K1/0268 , H05K1/181 , H05K3/282 , H05K2201/10159 , H05K2201/10545 , H05K2201/10553 , Y02P70/611 , H01L2924/00
Abstract: Memory systems and methods for creating the same are disclosed. The memory systems can include pairs of IC packages mounted on either side of a system substrate. Contacts formed on the IC packages can be communicatively coupled with contacts of a paired IC package using vias that extend through the system substrate. The IC packages can further communicate with a controller mounted on one side of the system substrate using the vias as well as conductive traces formed in the system substrate.
Abstract translation: 公开了用于创建其的存储器系统和方法。 存储器系统可以包括安装在系统基板两侧的IC封装对。 形成在IC封装上的触点可以通过使用延伸穿过系统基板的通孔与成对IC封装的触点通信耦合。 IC封装可以使用通孔以及形成在系统基板中的导电迹线进一步与安装在系统基板一侧的控制器进行通信。
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