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1.
公开(公告)号:US11374112B2
公开(公告)日:2022-06-28
申请号:US16000125
申请日:2018-06-05
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle
IPC: H01L21/02 , H01L29/66 , H01L21/285 , H01L29/78 , H01L29/167 , H01L29/08 , H01L23/535 , H01L29/165 , H01L29/45 , H01L29/161
Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
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公开(公告)号:US20210358741A1
公开(公告)日:2021-11-18
申请号:US17317965
申请日:2021-05-12
Applicant: ASM IP Holding B.V.
Inventor: Amir Kajbafvala , Peter Westrom , Joe Margetis , Xin Sun , Caleb Miskin , Yen Lin Leow , Yanfu Lu
Abstract: A method of forming a silicon germanium layer on a surface of a substrate and a system for forming a silicon germanium layer are disclosed. Examples of the disclosure provide a method that includes providing a plurality of growth precursors to control and/or promote parasitic gas-phase and surface reactions, such that greater control of the film (e.g., thickness and/or composition) uniformity can be realized.
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公开(公告)号:US20200224309A1
公开(公告)日:2020-07-16
申请号:US16816078
申请日:2020-03-11
Applicant: ASM IP Holding B.V.
Inventor: Sonti Sreeram , John Tolle , Joe Margetis , Junwei Su
IPC: C23C16/455
Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.
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公开(公告)号:US10262859B2
公开(公告)日:2019-04-16
申请号:US15863340
申请日:2018-01-05
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle , Gregory Bartlett , Nupur Bhargava
IPC: H01L21/02 , C23C16/455 , C23C16/24
Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.
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5.
公开(公告)号:US20190027583A1
公开(公告)日:2019-01-24
申请号:US16000125
申请日:2018-06-05
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle
IPC: H01L29/66 , H01L29/78 , H01L29/165 , H01L29/167 , H01L29/08 , H01L29/45 , H01L23/535 , H01L21/02 , H01L21/285
Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
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公开(公告)号:US11168395B2
公开(公告)日:2021-11-09
申请号:US16816078
申请日:2020-03-11
Applicant: ASM IP Holding B.V.
Inventor: Sonti Sreeram , John Tolle , Joe Margetis , Junwei Su
IPC: C23C16/455
Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.
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7.
公开(公告)号:US10446393B2
公开(公告)日:2019-10-15
申请号:US15957565
申请日:2018-04-19
Applicant: ASM IP Holding B.V.
Inventor: Nupur Bhargava , John Tolle , Joe Margetis , Matthew Goodman , Robert Vyne
Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.
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公开(公告)号:US10388509B2
公开(公告)日:2019-08-20
申请号:US15627189
申请日:2017-06-19
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle
IPC: H01L21/02 , H01L29/161 , H01L21/67 , H01L21/768
Abstract: A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.
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9.
公开(公告)号:US20190027584A1
公开(公告)日:2019-01-24
申请号:US16000156
申请日:2018-06-05
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle
IPC: H01L29/66 , H01L29/78 , H01L29/165 , H01L29/167 , H01L29/08 , H01L29/45 , H01L23/535 , H01L21/02 , H01L21/285
Abstract: A method for selectively depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The method may further include, exposing the substrate to at least one Group IV precursor, and exposing the substrate to at least one Group IIIA halide dopant precursor. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
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公开(公告)号:US20170372884A1
公开(公告)日:2017-12-28
申请号:US15627189
申请日:2017-06-19
Applicant: ASM IP Holding B.V.
Inventor: Joe Margetis , John Tolle
IPC: H01L21/02 , H01L21/67 , H01L21/768
CPC classification number: H01L21/02005 , H01L21/0245 , H01L21/02452 , H01L21/02502 , H01L21/02507 , H01L21/02532 , H01L21/02535 , H01L21/0262 , H01L21/67167 , H01L21/7688 , H01L29/161
Abstract: A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.
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