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1.发明申请Method of Forming Electrically Isolated Structures Using Thin Dielectric Coatings 审中-公开使用薄介电涂层形成电隔离结构的方法公开(公告)号：US20100051466A1
公开(公告)日：2010-03-04
申请号：US12506547
申请日：2009-07-21
CPC分类号： A61N1/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , C25D1/20 , C25D5/022 , G01R1/0483 , G01R1/06716 , G01R1/07357 , G01R31/2886 , H05K3/467 , H05K3/4682
摘要： Electrochemical fabrication processes and apparatus for producing multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers including operations for providing coatings of dielectric material that isolate at least portions of a first conductive material from (1) other portions of the first conductive material, (2) a second conductive material, or (3) another dielectric material, and wherein the thickness of the dielectric coatings are thin compared to the thicknesses of the layers used in forming the structures. In some preferred embodiments, portions of each individual layer are encapsulated by dielectric material while in other embodiments only boundaries between distinct regions of materials are isolated from one another by dielectric barriers.
摘要翻译： 用于生产多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层，包括用于提供将第一导电材料的至少一部分与 （1）第一导电材料的其它部分，（2）第二导电材料或（3）另一种电介质材料，并且其中电介质涂层的厚度与用于形成结构的层的厚度相比较薄。 在一些优选实施例中，每个单独层的部分被电介质材料包封，而在其它实施例中，材料的不同区域之间的边界通过电介质屏障彼此隔离。
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2.发明授权公开(公告)号：US09244101B2
公开(公告)日：2016-01-26
申请号：US12431680
申请日：2009-04-28
CPC分类号： G01R3/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , C25D5/02 , C25D5/10 , G01R1/06716 , G01R1/06744 , G01R1/06755 , H01L21/4853
摘要： Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
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3.发明申请公开(公告)号：US20150368820A9
公开(公告)日：2015-12-24
申请号：US12431680
申请日：2009-04-28
CPC分类号： G01R3/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , C25D5/02 , C25D5/10 , G01R1/06716 , G01R1/06744 , G01R1/06755 , H01L21/4853
摘要： Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
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4.发明申请Multi-Layer, Multi-Material Fabrication Methods for Producing Micro-Scale and Millimeter-Scale Devices with Enhanced Electrical and/or Mechanical Properties 有权用于生产具有增强的电气和/或机械性能的微尺度和毫米级装置的多层，多材料制造方法公开(公告)号：US20110132767A1
公开(公告)日：2011-06-09
申请号：US12906970
申请日：2010-10-18
申请人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
发明人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
CPC分类号： G01R1/06716 , B33Y10/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , G01R1/06744 , G01R1/06755 , G01R3/00 , H01L21/4853
摘要： Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.
摘要翻译： 本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法。 其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件（例如微探针）的电化学制造方法，其完全涂覆形成探针的每个层的表面，包括中间层区域。 本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如微针）的电化学制造方法，其中涂层材料围绕结构的每一层定位，而不将涂层材料定位在相互之间， 层区域。 这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料，并且每个层还形成有牺牲材料，该牺牲材料在形成所述结构的所有层之后被去除。 在一些实施例中，芯材料可以是真正的结构材料，而在其它实施例中，其可以仅是功能性结构材料（即，如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料，则该材料将被除去。
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5.发明申请Electrochemical Fabrication Methods for Producing Multilayer Structures Including the use of Diamond Machining in the Planarization of Deposits of Material 审中-公开用于生产多层结构的电化学制造方法包括在材料沉积物平面化中使用金刚石加工公开(公告)号：US20090020433A1
公开(公告)日：2009-01-22
申请号：US12121625
申请日：2008-05-15
申请人： Adam L. Cohen , Uri Frodis , Michael S. Lockard , Ananda H. Kumar , Gang Zhang , Dennis R. Smalley
发明人： Adam L. Cohen , Uri Frodis , Michael S. Lockard , Ananda H. Kumar , Gang Zhang , Dennis R. Smalley
IPC分类号： C25D5/48
CPC分类号： C25D1/003 , B81C1/00492 , B81C99/0065 , B81C2201/0104 , B81C2201/0197 , C25D5/02 , C25D5/022 , C25D5/10 , C25D21/12 , H01L21/2885 , H01L21/76885
摘要： Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures are disclosed which include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which are useful in Electrochemical fabrication and which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb), where the first material or materials are the structural materials and the second is the sacrificial material). Some embodiments focus on methods for reducing tool wear when using diamond machining to planarize structures being electrochemically fabricated using difficult-to-machine materials (e.g. by depositing difficult to machine material selectively and potentially with little excess plating thickness, and/or pre-machining depositions to within a small increment of desired surface level (e.g. using lapping or a rough cutting operation) and then using diamond fly cutting to complete he process, and/or forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.
摘要翻译： 公开了用于形成单层和多层中尺度和微结构的电化学制造方法，其包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例集中于可用于电化学制造的牺牲和结构材料的系统，并且可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn， 和Au和Sn-Pb），其中第一材料或材料是结构材料，第二材料是牺牲材料）。 一些实施例着重于在使用金刚石加工来平面化使用难以加工的材料进行电化学制造的结构（例如，通过沉积难以加工材料选择性且潜在地具有少量多余电镀厚度和/或预加工沉积 到所需表面水平的小增量（例如使用研磨或粗切割操作），然后使用金刚石飞切切割来完成其加工，和/或从硬质材料的薄壁区域形成结构或部分结构 而不是结构材料的宽固体区域。
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6.发明申请Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 有权形成具有减小的应力和/或曲率的三维结构的方法公开(公告)号：US20120222960A1
公开(公告)日：2012-09-06
申请号：US13409950
申请日：2012-03-01
申请人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
发明人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
IPC分类号： C25D5/02
CPC分类号： B81C1/00666 , C25D5/022
摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。
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7.发明申请Electrochemical Fabrication Methods for Producing Multilayer Structures Including the use of Diamond Machining in the Planarization of Deposits of Material 审中-公开用于生产多层结构的电化学制造方法包括在材料沉积物平面化中使用金刚石加工公开(公告)号：US20120114861A1
公开(公告)日：2012-05-10
申请号：US13253856
申请日：2011-10-05
申请人： Adam L. Cohen , Uri Frodis , Michael S. Lockard , Ananda H. Kumar , Gang Zhang , Dennis R. Smalley
发明人： Adam L. Cohen , Uri Frodis , Michael S. Lockard , Ananda H. Kumar , Gang Zhang , Dennis R. Smalley
CPC分类号： C25D1/003 , B81C1/00492 , B81C99/0065 , B81C2201/0104 , B81C2201/0197 , C25D5/02 , C25D5/022 , C25D5/10 , C25D21/12 , H01L21/2885 , H01L21/76885
摘要： Electrochemical fabrication methods for forming single and multilayer mesoscale and microscale structures include the use of diamond machining (e.g. fly cutting or turning) to planarize layers. Some embodiments focus on systems of sacrificial and structural materials which can be diamond machined with minimal tool wear (e.g. Ni—P and Cu, Au and Cu, Cu and Sn, Au and Cu, Au and Sn, and Au and Sn—Pb). Some embodiments provide for reducing tool wear when using difficult-to-machine materials by (1) depositing difficult to machine materials selectively and potentially with little excess plating thickness and/or (2) pre-machining depositions to within a small increment of desired surface level (e.g. using lapping) and then using diamond fly cutting to complete the process, and/or (3) forming structures or portions of structures from thin walled regions of hard-to-machine material as opposed to wide solid regions of structural material.
摘要翻译： 用于形成单层和多层中尺度和微结构结构的电化学制造方法包括使用金刚石加工（例如飞切或车削）来平坦化层。 一些实施例侧重于牺牲和结构材料的系统，其可以以最小的工具磨损（例如Ni-P和Cu，Au和Cu，Cu和Sn，Au和Cu，Au和Sn以及Au和Sn-Pb）进行金刚石加工， 。 一些实施例提供了通过（1）选择性地沉积难以加工的材料并且潜在地以很少的镀层厚度沉积和/或（2）预加工沉积到期望表面的小增量内，以便在使用难加工材料时减少刀具磨损 （例如使用研磨），然后使用金刚石飞切切割来完成该过程，和/或（3）从硬质材料的薄壁区域形成与结构材料的宽固体区域相反的结构或部分结构。
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8.发明申请Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 审中-公开形成具有减小的应力和/或曲率的三维结构的方法公开(公告)号：US20110147223A1
公开(公告)日：2011-06-23
申请号：US13006814
申请日：2011-01-14
申请人： Ananda H. Kumar , Jorge Sotelo Alberran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
发明人： Ananda H. Kumar , Jorge Sotelo Alberran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
CPC分类号： B81C1/00666 , C25D5/022
摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
摘要翻译： 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。
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9.发明申请Electrochemical Fabrication Process for Forming Multilayer Multimaterial Microprobe Structures 有权用于形成多层多材料微结构的电化学制造工艺公开(公告)号：US20090320990A1
公开(公告)日：2009-12-31
申请号：US12431680
申请日：2009-04-28
CPC分类号： G01R3/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , C25D5/02 , C25D5/10 , G01R1/06716 , G01R1/06744 , G01R1/06755 , H01L21/4853
摘要： Some embodiments of the invention are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.
摘要翻译： 本发明的一些实施方案涉及由芯材料和部分涂覆探针的表面的材料形成的微针的电化学制造。 其它实施方案涉及由核心材料形成的微结构的电化学制造，以及完全涂覆形成探针的每个层的表面的材料，包括中间层区域。 这些前两组实施例在形成每个层期间都包括芯材料和涂层材料。 其他实施例涉及在后层形成涂覆工艺期间由电介质材料部分封装的微探针阵列的电化学制造。 在甚至进一步的实施方案中，来自两种或更多种材料的微结构的电化学制造可以通过在结构的每一层周围并入涂层材料而不将涂层材料定位在层间区域中而进行。
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10.发明授权Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties 有权用于生产具有增强的电和/或机械性能的微尺度和毫米级装置的多层多材料制造方法公开(公告)号：US08613846B2
公开(公告)日：2013-12-24
申请号：US12906970
申请日：2010-10-18
申请人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
发明人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
CPC分类号： G01R1/06716 , B33Y10/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , G01R1/06744 , G01R1/06755 , G01R3/00 , H01L21/4853
摘要： Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.
摘要翻译： 本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法。 其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件（例如微探针）的电化学制造方法，其完全涂覆形成探针的每个层的表面，包括中间层区域。 本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如微针）的电化学制造方法，其中涂层材料围绕结构的每一层定位，而不将涂层材料定位在相互之间， 层区域。 这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料，并且每个层还形成有牺牲材料，该牺牲材料在形成所述结构的所有层之后被去除。 在一些实施例中，芯材料可以是真正的结构材料，而在其它实施例中，其可以仅是功能性结构材料（即，如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料，则该材料将被除去。
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