公开(公告)号：US10157855B2

公开(公告)日：2018-12-18

申请号：US14730022

申请日：2015-06-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Hsuan Lee ,  Chien-Yeh Liu ,  Sung-Mao Li ,  Jaw-Ming Ding

IPC: H01L23/552

Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.

公开(公告)号：US09653415B2

公开(公告)日：2017-05-16

申请号：US14625383

申请日：2015-02-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Hsuan Lee ,  Sung-Mao Li ,  Chien-Yeh Liu

IPC: H01L29/66 ,  H01L23/66 ,  H01L23/552 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L21/76838 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/97 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/81

Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a semiconductor device, a plurality of electronic components, a first package body, a patterned conductive layer and a feeding element. The semiconductor device and the plurality of electronic components are disposed on the substrate. The first package body covers the semiconductor device but exposes the plurality of electronic components. The patterned conductive layer is formed on the first package body. The feeding element electrically connects the patterned conductive layer to the plurality of electronic components.

公开(公告)号：US20160358862A1

公开(公告)日：2016-12-08

申请号：US14730022

申请日：2015-06-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Hsuan Lee ,  Chien-Yeh Liu ,  Sung-Mao Li ,  Jaw-Ming Ding

IPC: H01L23/552

CPC classification number: H01L23/552 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00012

Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.

Abstract translation: 本公开涉及一种半导体器件封装及其制造方法。 半导体器件封装包括载体，至少一个电子部件，第一磁性层和第二磁性层。 载体具有设置有电子部件的顶面。 第一磁性层设置在载体的顶表面上并封装电子部件。 第二磁性层设置在第一磁性层上并覆盖第一磁性层的顶表面和侧表面。 第一磁性层的磁导率小于第二磁性层的磁导率。

公开(公告)号：US11152274B2

公开(公告)日：2021-10-19

申请号：US15701394

申请日：2017-09-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Hsuan Lee ,  Sung-Mao Li ,  Ming-Han Wang ,  Ian Hu

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/544

Abstract: A semiconductor device package includes a semiconductor device, a conductive bump, a first encapsulant and a second encapsulant. The semiconductor device has a first surface, a second surface and a lateral surface. The second surface is opposite to the first surface. The lateral surface extends between the first surface and the second surface. The semiconductor device comprises a conductive pad adjacent to the first surface of the semiconductor device. The conductive bump is electrically connected to the conductive pad. The first encapsulant covers the first surface of the semiconductor device and a first portion of the lateral surface of the semiconductor device, and surrounds the conductive bump. The second encapsulant covers the second surface of the semiconductor device and a second portion of the lateral surface of the semiconductor device.

公开(公告)号：US09397074B1

公开(公告)日：2016-07-19

申请号：US14700079

申请日：2015-04-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei-Hsuan Lee ,  Sung-Mao Li ,  Chien-Yeh Liu

IPC: H01L23/48 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L21/486 ,  H01L23/295 ,  H01L23/296 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/48 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a substrate, a set of electrical components, a stud, a tapering electrical interconnection and a package body. The electrical components are disposed on a top surface of the substrate. A bottom surface of the stud is disposed on the top surface of the substrate. A bottom surface of the electrical interconnection is disposed at a top surface of the stud. A width of the stud is greater than or equal to a width of the bottom surface of the electrical interconnection. The package body is disposed on the top surface of the substrate, and encapsulates the electrical components, the stud and a portion of the electrical interconnection. The package body exposes a top surface of the electrical interconnection.

Abstract translation: 半导体封装包括基板，一组电气部件，螺柱，锥形电互连和封装体。 电气部件设置在基板的顶表面上。 螺柱的底表面设置在基板的顶表面上。 电互连的底表面设置在螺柱的顶表面。 螺柱的宽度大于或等于电互连的底表面的宽度。 封装体设置在基板的顶表面上，并且封装电气部件，螺柱和电互连的一部分。 封装体露出电互连的顶表面。