公开(公告)号：US5299091A

公开(公告)日：1994-03-29

申请号：US854028

申请日：1992-03-19

申请人： Akio Hoshi ,  Yukihiro Sato ,  Toyomasa Koda ,  Isao Yoshida ,  Kouzou Sakamoto

发明人： Akio Hoshi ,  Yukihiro Sato ,  Toyomasa Koda ,  Isao Yoshida ,  Kouzou Sakamoto

IPC分类号： H01L23/34 ,  H01L23/36 ,  H01L23/433 ,  H01L23/495 ,  H05K1/02 ,  H05K1/11 ,  H05K3/34 ,  H05K7/20

CPC分类号： H01L23/36 ,  H01L23/4334 ,  H01L23/4951 ,  H01L23/49568 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/3011 ,  H05K1/0201 ,  H05K1/111 ,  H05K3/3421 ,  Y10T29/49121

摘要： A packaged semiconductor device has, according to one embodiment of the present invention, a semiconductor pellet having an electronic circuit therein and electrode pads formed on a principal surface of the pellet, a plurality of electrical connection bumps provided on the electrode pads, a plurality of heat dissipation bumps provided at the principal surface of the pellet and electrically insulated from the electronic circuit and the electrode pads, electrical connection leads for the electronic circuit, heat dissipators for the electronic circuit and a packaging material for sealing pellet, the electrical connection bumps, the heat dissipation bumps and parts of the electrical connection leads and the heat dissipator. One or more of the heat dissipation bumps are arranged relatively nearer to the electronic circuit than the electrical connection bumps for thermal coupling to the electronic circuit. One or more of the electrical connection leads may be engaged with the electrical connection bumps and the heat dissipation bumps and/or one or more of the dissipators may be engaged with the heat dissipation bumps and the electrical connection bumps, thereby serving to effect electrical connection to and heat dissipation for the electronic circuit.

摘要翻译： 根据本发明的一个实施例，封装的半导体器件具有其中具有电子电路的半导体芯片和形成在芯片的主表面上的电极焊盘，设置在电极焊盘上的多个电连接凸块，多个 提供在颗粒主表面上的散热凸块与电子电路和电极焊盘电绝缘，用于电子电路的电气连接引线，用于电子电路的散热器和用于密封颗粒的包装材料，电连接凸块， 散热凸块和电气连接引线和散热器的部件。 一个或多个散热凸块被布置成比用于热耦合到电子电路的电连接凸块相对更靠近电子电路。 一个或多个电连接引线可以与电连接凸块接合，并且散热凸块和/或一个或多个散热器可以与散热凸块和电连接凸块接合，从而用于实现电连接 电子电路的散热和散热。

公开(公告)号：US4814288A

公开(公告)日：1989-03-21

申请号：US72164

申请日：1987-07-10

申请人： Masatoshi Kimura ,  Takeaki Okabe ,  Isao Yoshida ,  Kouzou Sakamoto ,  Kazuo Hoya ,  Kouichiro Satonaka ,  Toyomasa Koda ,  Shigeo Ohtaka

发明人： Masatoshi Kimura ,  Takeaki Okabe ,  Isao Yoshida ,  Kouzou Sakamoto ,  Kazuo Hoya ,  Kouichiro Satonaka ,  Toyomasa Koda ,  Shigeo Ohtaka

IPC分类号： H01L27/08 ,  H01L21/331 ,  H01L21/76 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/04 ,  H01L27/06 ,  H01L27/088 ,  H01L29/73 ,  H01L29/732 ,  H01L29/78 ,  H01L21/20 ,  H01L21/302

CPC分类号： H01L21/8249 ,  H01L27/0623

摘要： A method of fabricating semiconductor devices which include vertical elements and control elements. A well is formed by etching in a semiconductor substrate of a first conductivity type, and a first epitaxial layer having a second conductivity type opposite to the first conductivity type is epitaxially grown, followed by etching and/or grinding and/or polishing to fill said well. Further, a second epitaxial layer of the first conductivity type is epitaxially grown on the substrate and on the first epitaxial layer, and an impurity-doped layer of the second conductivity type for isolation is formed in the second epitaxial layer to penetrate therethrough. A first element is formed in the second epitaxial layer in a portion that corresponds to the well, and a second element having a vertical structure and having a current capability higher than that of the first element is formed except a portion of the second epitaxial layer that corresponds to the well.

摘要翻译： 一种制造包括垂直元件和控制元件的半导体器件的方法。 通过在第一导电类型的半导体衬底中蚀刻形成阱，并且外延生长具有与第一导电类型相反的第二导电类型的第一外延层，随后进行蚀刻和/或研磨和/或抛光以填充所述 好。 此外，第一导电类型的第二外延层在衬底和第一外延层上外延生长，并且在第二外延层中形成用于隔离的第二导电类型的杂质掺杂层以穿透其中。 在对应于阱的部分中的第二外延层中形成第一元件，并且除了第二外延层的一部分之外，形成具有比第一元件的电流能力高的垂直结构并具有电流能力的第二元件， 对应于井。

公开(公告)号：US5379230A

公开(公告)日：1995-01-03

申请号：US232402

申请日：1994-04-25

申请人： Masatoshi Morikawa ,  Isao Yoshida ,  Terumi Sawase ,  Kouzou Sakamoto ,  Takeaki Okabe

发明人： Masatoshi Morikawa ,  Isao Yoshida ,  Terumi Sawase ,  Kouzou Sakamoto ,  Takeaki Okabe

IPC分类号： G06F1/00 ,  G01Q70/00 ,  G05F1/56 ,  H01L21/822 ,  H01L27/04 ,  H03K17/08 ,  H03K17/082 ,  H03M1/08 ,  G01K7/00 ,  H03K17/12

CPC分类号： H03K17/18 ,  H03K17/0822 ,  H03K2017/0806

摘要： A semiconductor integrated circuit has a semiconductor output device (3) , a sensor (5) generating an electric signal (7) relevant to heat generation (6) of the output device (3) and a microprocessor unit MPU 2, inside a chip (1). The MPU (2) is constructed of a memory (20) and CPU (22). The electric signal (7) generated from the sensor (5) is processed by the CPU (22) in accordance with a stored program of the memory (20). Accordingly, the drivability of the semiconductor output device (3) can be set in an optimum state corresponding to changes in chip temperature including changes that are only momentary.

摘要翻译： 半导体集成电路具有半导体输出装置（3），产生与输出装置（3）的发热（6）有关的电信号（7）的传感器（5）和芯片内的微处理器单元MPU2 1）。 MPU（2）由存储器（20）和CPU（22）构成。 根据存储器（20）的存储程序，由CPU（22）处理从传感器（5）产生的电信号（7）。 因此，可以将半导体输出装置（3）的驾驶性能设定为对应于仅包含瞬时变化的芯片温度变化的最佳状态。

公开(公告)号：US6008687A

公开(公告)日：1999-12-28

申请号：US758411

申请日：1996-11-29

申请人： Isamu Orita ,  Akihiko Kougami ,  Shigeo Mikoshiba ,  Takeaki Okabe ,  Kouzou Sakamoto ,  Masahiro Eto

发明人： Isamu Orita ,  Akihiko Kougami ,  Shigeo Mikoshiba ,  Takeaki Okabe ,  Kouzou Sakamoto ,  Masahiro Eto

IPC分类号： G09G3/20 ,  G09G3/28 ,  G09G3/288 ,  H03K17/0412 ,  H03K17/687 ,  H01L41/00 ,  H03K5/08

CPC分类号： H03K17/6877 ,  G09G3/20 ,  H03K17/04123 ,  H03K17/6871 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0289 ,  G09G2330/02 ,  G09G2330/023 ,  G09G3/296

摘要： A switching circuit has switching elements for passing-through or cutting-off signals of a positive pulse, which is a rectangular pulse rising from a low level and falling after having kept a high level for a certain time as a high voltage input signal, and a negative pulse, which is a rectangular pulse falling from a high level and rising after having kept a low level for a certain time, the switching circuit being applied to a capacitive load driving device.

摘要翻译： 开关电路具有用于通过或截止正脉冲的信号的开关元件，该正脉冲是从低电平上升的矩形脉冲，并且在将高电平保持一定时间之后下降为高电压输入信号，以及 负脉冲，其是从高电平落下的矩形脉冲，并且在保持低电平一定时间后上升，开关电路被施加到电容性负载驱动装置。

公开(公告)号：US6028573A

公开(公告)日：2000-02-22

申请号：US715166

申请日：1996-09-17

申请人： Isamu Orita ,  Akihiko Kougami ,  Shigeo Mikoshiba ,  Takeaki Okabe ,  Kouzou Sakamoto ,  Masahiro Eto

发明人： Isamu Orita ,  Akihiko Kougami ,  Shigeo Mikoshiba ,  Takeaki Okabe ,  Kouzou Sakamoto ,  Masahiro Eto

IPC分类号： G09G3/20 ,  G09G3/28 ,  G09G3/288 ,  H03K17/0412 ,  H03K17/687 ,  G09G3/22 ,  G09G3/30

CPC分类号： G09G3/20 ,  H03K17/04123 ,  H03K17/6871 ,  H03K17/6877 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0289 ,  G09G2330/02 ,  G09G2330/023 ,  G09G3/296

摘要： In a method for driving a display device, by which energy stored in a plurality of electrodes serving as a capacitive load is recovered through switches, current paths for charging said electrodes from a charge supplying source differ from current paths for discharging the electrodes for the energy recovery.

摘要翻译： 在用于驱动显示装置的方法中，通过开关来恢复存储在用作电容性负载的多个电极中的能量的电流，用于从电荷供给源充电所述电极的电流路径不同于用于放电用于能量的电极的电流路径 复苏。