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公开(公告)号：US07521309B2
公开(公告)日：2009-04-21
申请号：US11948344
申请日：2007-11-30
申请人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
发明人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
IPC分类号： H01L21/336
CPC分类号： H01L29/517 , H01L21/28097 , H01L21/3215 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/66507
摘要： A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer; and performing a thermal processing, thereby causing reaction between the metal contained in said first metal containing layer and said first gate electrode layer to convert said first gate electrode layer into an alloy and causing reaction between the metal contained in said third metal containing layer and said second gate electrode layer to convert said second gate electrode layer into an alloy, thereby forming gate electrodes of different compositions.
摘要翻译： 一种制造具有第一导电类型的MOSFET的半导体器件的方法和形成在半导体衬底上的与第一导电类型不同的第二导电类型的MOSFET，该方法具有：形成栅极绝缘膜; 形成第一栅电极层，形成第二栅电极层; 在所述第一栅电极层和所述第二栅电极层上形成第一含金属层; 形成用于防止金属在所述第一金属含有层上的扩散的第二含金属层; 在所述第二栅电极层上形成第三金属含有层，从所述第二金属含有层和所述第二金属含有层被选择性地除去，所述第三金属含有层的厚度与所述第一金属含有层的厚度不同 其中所述第三含金属层包含与所述第一含金属层中所含的金属或合金相同的金属或合金; 并进行热处理，从而使包含在所述第一金属含有层中的金属与所述第一栅极电极层之间产生反应，将所述第一栅电极层转换成合金，并引起所述第三金属含有层中含有的金属与所述 第二栅极电极层，以将所述第二栅电极层转换成合金，从而形成不同组成的栅电极。
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公开(公告)号：US20080138969A1
公开(公告)日：2008-06-12
申请号：US11948344
申请日：2007-11-30
申请人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
发明人： Akio Kaneko , Motoyuki Sato , Katsuyuki Sekine , Tomohiro Saito , Kazuaki Nakajima , Tomonori Aoyama
IPC分类号： H01L21/28
CPC分类号： H01L29/517 , H01L21/28097 , H01L21/3215 , H01L21/823814 , H01L21/823835 , H01L21/823842 , H01L29/66507
摘要： A method of manufacturing a semiconductor device having a MOSFET of a first conductivity type and a MOSFET of a second conductivity type different from the first conductivity type formed on a semiconductor substrate, the method has: forming a gate insulating film; forming a first gate electrode layer, and forming a second gate electrode layer; forming a first metal containing layer on said first gate electrode layer and said second gate electrode layer; forming a second metal containing layer for preventing diffusion of a metal on said first metal containing layer; forming a third metal containing layer on said second gate electrode layer from which said first metal containing layer and said second metal containing layer are selectively removed, the third metal containing layer having a thickness different from the thickness of said first metal containing layer in a case where the third metal containing layer contains the same metal or alloy as the metal or alloy contained in said first metal containing layer; and performing a thermal processing, thereby causing reaction between the metal contained in said first metal containing layer and said first gate electrode layer to convert said first gate electrode layer into an alloy and causing reaction between the metal contained in said third metal containing layer and said second gate electrode layer to convert said second gate electrode layer into an alloy, thereby forming gate electrodes of different compositions.
摘要翻译： 一种制造具有第一导电类型的MOSFET的半导体器件的方法和形成在半导体衬底上的与第一导电类型不同的第二导电类型的MOSFET，该方法具有：形成栅极绝缘膜; 形成第一栅电极层，形成第二栅电极层; 在所述第一栅电极层和所述第二栅电极层上形成第一含金属层; 形成用于防止金属在所述第一金属含有层上的扩散的第二含金属层; 在所述第二栅电极层上形成第三金属含有层，从所述第二金属含有层和所述第二金属含有层选择性地除去所述第三金属含有层，所述第三金属含有层的厚度与所述第一金属含有层的厚度不同 其中所述第三含金属层包含与所述第一含金属层中所含的金属或合金相同的金属或合金; 并进行热处理，从而使包含在所述第一金属含有层中的金属与所述第一栅极电极层之间产生反应，将所述第一栅电极层转换成合金，并引起所述第三金属含有层中含有的金属与所述 第二栅极电极层，以将所述第二栅电极层转换成合金，从而形成不同组成的栅极。
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公开(公告)号：US20070278587A1
公开(公告)日：2007-12-06
申请号：US11798068
申请日：2007-05-10
申请人： Tomonori Aoyama , Tomohiro Saito , Katsuyuki Sekine , Kazuaki Nakajima , Motoyuki Sato , Takuya Kobayashi
发明人： Tomonori Aoyama , Tomohiro Saito , Katsuyuki Sekine , Kazuaki Nakajima , Motoyuki Sato , Takuya Kobayashi
IPC分类号： H01L29/94
CPC分类号： H01L21/26513 , H01L21/26506 , H01L21/28079 , H01L21/28097 , H01L21/28202 , H01L21/2822 , H01L21/823842 , H01L21/823857 , H01L29/513 , H01L29/518 , H01L29/6656 , H01L29/6659 , H01L29/785
摘要： This disclosure concerns a semiconductor device comprising a semiconductor substrate; a gate dielectric film provided on the semiconductor substrate and containing Hf, Si, and O or containing Zr, Si and O; a gate electrode of an n-channel FET provided on the gate dielectric film, the gate electrode being made of nickel silicide containing nickel at a higher content than silicon; an aluminum layer provided at a bottom portion of the gate electrode of the n-channel FET; and a gate electrode of a p-channel FET provided on the gate dielectric film, the gate electrode being made of nickel silicide containing nickel at a higher content than silicon.
摘要翻译： 本公开涉及包括半导体衬底的半导体器件; 设置在半导体衬底上并含有Hf，Si和O或含有Zr，Si和O的栅极电介质膜; 设置在所述栅极电介质膜上的n沟道FET的栅电极，所述栅电极由含有比所述硅含量高的镍的镍硅化物制成; 设置在n沟道FET的栅电极的底部的铝层; 以及设置在所述栅极电介质膜上的p沟道FET的栅电极，所述栅电极由镍含量高于硅的镍的硅化镍制成。
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公开(公告)号：US08022486B2
公开(公告)日：2011-09-20
申请号：US11882012
申请日：2007-07-30
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L21/823842 , H01L21/02148 , H01L21/02178 , H01L21/02271 , H01L21/02332 , H01L21/0234 , H01L21/28097 , H01L21/3145 , H01L21/3162 , H01L21/31645 , H01L21/823857 , H01L29/513 , H01L29/517 , H01L29/66507 , H01L29/66545
摘要： A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first gate dielectric film and including aluminum oxide, and a first metal silicide gate electrode provided on the second gate dielectric film.
摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的p沟道MOS晶体管，所述p沟道MOS晶体管包括包括Hf的第一栅极电介质膜，设置在第一栅极电介质膜上的第二栅极电介质膜， 氧化铝和设置在第二栅极电介质膜上的第一金属硅化物栅电极。
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公开(公告)号：US07883974B2
公开(公告)日：2011-02-08
申请号：US12585555
申请日：2009-09-17
IPC分类号： H01L21/336
CPC分类号： H01L21/02148 , C23C16/401 , H01L21/02271 , H01L21/0234 , H01L21/31645 , H01L21/823462 , H01L21/823857 , H01L29/517 , H01L29/66553 , H01L29/6656
摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
摘要翻译： 制造半导体器件的方法包括在半导体衬底上的层间电介质膜中形成沟槽，沟槽到达半导体衬底并具有由氮化硅膜制成的侧壁; 在200摄氏度至260摄氏度的温度范围内沉积由HfSiO膜制成的栅极绝缘膜，使得HfSiO膜沉积在暴露于沟槽底表面的半导体衬底上，而不沉积HfSiO 膜上的氮化硅膜; 并用金属制成的栅电极填充沟槽。
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公开(公告)号：US07608498B2
公开(公告)日：2009-10-27
申请号：US12003802
申请日：2008-01-02
IPC分类号： H01L21/336
CPC分类号： H01L21/02148 , C23C16/401 , H01L21/02271 , H01L21/0234 , H01L21/31645 , H01L21/823462 , H01L21/823857 , H01L29/517 , H01L29/66553 , H01L29/6656
摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
摘要翻译： 制造半导体器件的方法包括在半导体衬底上的层间电介质膜中形成沟槽，沟槽到达半导体衬底并具有由氮化硅膜制成的侧壁; 在200摄氏度至260摄氏度的温度范围内沉积由HfSiO膜制成的栅极绝缘膜，使得HfSiO膜沉积在暴露于沟槽底表面的半导体衬底上，而不沉积HfSiO 膜上的氮化硅膜; 并用金属制成的栅电极填充沟槽。
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公开(公告)号：US20100055854A1
公开(公告)日：2010-03-04
申请号：US12585555
申请日：2009-09-17
IPC分类号： H01L21/8234
CPC分类号： H01L21/02148 , C23C16/401 , H01L21/02271 , H01L21/0234 , H01L21/31645 , H01L21/823462 , H01L21/823857 , H01L29/517 , H01L29/66553 , H01L29/6656
摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
摘要翻译： 制造半导体器件的方法包括在半导体衬底上的层间电介质膜中形成沟槽，沟槽到达半导体衬底并具有由氮化硅膜制成的侧壁; 在200摄氏度至260摄氏度的温度范围内沉积由HfSiO膜制成的栅极绝缘膜，使得HfSiO膜沉积在暴露于沟槽底表面的半导体衬底上，而不沉积HfSiO 膜上的氮化硅膜; 并用金属制成的栅电极填充沟槽。
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公开(公告)号：US20090014809A1
公开(公告)日：2009-01-15
申请号：US11882012
申请日：2007-07-30
IPC分类号： H01L21/28 , H01L27/092 , H01L29/423
CPC分类号： H01L21/823842 , H01L21/02148 , H01L21/02178 , H01L21/02271 , H01L21/02332 , H01L21/0234 , H01L21/28097 , H01L21/3145 , H01L21/3162 , H01L21/31645 , H01L21/823857 , H01L29/513 , H01L29/517 , H01L29/66507 , H01L29/66545
摘要： A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first gate dielectric film and including aluminum oxide, and a first metal silicide gate electrode provided on the second gate dielectric film.
摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的p沟道MOS晶体管，所述p沟道MOS晶体管包括包括Hf的第一栅极电介质膜，设置在第一栅极电介质膜上的第二栅极电介质膜， 氧化铝和设置在第二栅极电介质膜上的第一金属硅化物栅电极。
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公开(公告)号：US20080182396A1
公开(公告)日：2008-07-31
申请号：US12003802
申请日：2008-01-02
IPC分类号： H01L21/3205
CPC分类号： H01L21/02148 , C23C16/401 , H01L21/02271 , H01L21/0234 , H01L21/31645 , H01L21/823462 , H01L21/823857 , H01L29/517 , H01L29/66553 , H01L29/6656
摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
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公开(公告)号：US07335562B2
公开(公告)日：2008-02-26
申请号：US11494736
申请日：2006-07-28
IPC分类号： H01L21/336
CPC分类号： H01L21/02148 , C23C16/401 , H01L21/02271 , H01L21/0234 , H01L21/31645 , H01L21/823462 , H01L21/823857 , H01L29/517 , H01L29/66553 , H01L29/6656
摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.
摘要翻译： 制造半导体器件的方法包括在半导体衬底上的层间电介质膜中形成沟槽，沟槽到达半导体衬底并具有由氮化硅膜制成的侧壁; 在200摄氏度至260摄氏度的温度范围内沉积由HfSiO膜制成的栅极绝缘膜，使得HfSiO膜沉积在暴露于沟槽底表面的半导体衬底上，而不沉积HfSiO 膜上的氮化硅膜; 并用金属制成的栅电极填充沟槽。
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