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13 条记录 (耗时 0.025 秒)

    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07701296B2

    公开(公告)日：2010-04-20

    申请号：US11874966

    申请日：2007-10-19

    申请人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Shinsuke Watanabe

    发明人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Shinsuke Watanabe

    IPC分类号： H03F3/04

    CPC分类号： H03F1/523 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/211 ,  H03F2200/366 ,  H03F2200/381

    摘要： A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

    摘要翻译： 限流电路连接到放大晶体管的栅极（输入端）。 限流电路包括保护晶体管，将漏极连接到保护晶体管的栅极的第一保护电阻以及将源极连接到保护晶体管的栅极的第二保护电阻。 电流限制电路限制电流，使得大于放大晶体管可允许的最大电功率的功率不通过。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20080290951A1

    公开(公告)日：2008-11-27

    申请号：US11874966

    申请日：2007-10-19

    申请人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Shinsuke Watanabe

    发明人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Shinsuke Watanabe

    IPC分类号： H02H7/20

    CPC分类号： H03F1/523 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/211 ,  H03F2200/366 ,  H03F2200/381

    摘要： A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

    摘要翻译： 限流电路连接到放大晶体管的栅极（输入端）。 限流电路包括保护晶体管，将漏极连接到保护晶体管的栅极的第一保护电阻以及将源极连接到保护晶体管的栅极的第二保护电阻。 电流限制电路限制电流，使得大于放大晶体管可允许的最大电功率的功率不通过。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20100156541A1

    公开(公告)日：2010-06-24

    申请号：US12715424

    申请日：2010-03-02

    申请人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Sinsuke Watanabe

    发明人： Akira Inoue ,  Seiki Goto ,  Kou Kanaya ,  Sinsuke Watanabe

    IPC分类号： H03F3/04

    CPC分类号： H03F1/523 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/211 ,  H03F2200/366 ,  H03F2200/381

    摘要： A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

    摘要翻译： 限流电路连接到放大晶体管的栅极（输入端）。 限流电路包括保护晶体管，将漏极连接到保护晶体管的栅极的第一保护电阻以及将源极连接到保护晶体管的栅极的第二保护电阻。 电流限制电路限制电流，使得大于放大晶体管可允许的最大电功率的功率不通过。

    Cascode circuit
    4.
    发明授权
    Cascode circuit 失效
    串联电路

    公开(公告)号：US07714664B2

    公开(公告)日：2010-05-11

    申请号：US12421664

    申请日：2009-04-10

    申请人： Ko Kanaya ,  Seiki Goto ,  Shinsuke Watanabe

    发明人： Ko Kanaya ,  Seiki Goto ,  Shinsuke Watanabe

    IPC分类号： H03F3/04

    CPC分类号： H03F1/226 ,  H03F1/0261 ,  H03F3/1935 ,  H03F2200/18 ,  H03F2200/27 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2200/541

    摘要： A cascode circuit for a high-gain or high-output millimeter-wave device that operates with stability. The cascode circuit including two cascode-connected transistors includes: a first high electron mobility transistor (HEMT) including a source that is grounded; a second HEMT including a source connected to a drain of the first HEMT; a reflection gain restricting resistance connected to the gate of the second HEMT, for restricting reflection gain; and an open stub connected to a side of the reflection gain restricting resistance which is opposite the side connected to the second HEMT, for short-circuiting high-frequency signals at a predetermined frequency and nearby frequencies.

    摘要翻译： 用于稳定运行的高增益或高输出毫米波器件的共源共栅电路。 包括两个共源共栅连接的晶体管的共源共栅电路包括：包括接地的源的第一高电子迁移率晶体管（HEMT）; 包括连接到第一HEMT的漏极的源的第二HEMT; 连接到第二HEMT的栅极的反射增益限制电阻，用于限制反射增益; 以及连接到反射增益限制电阻的与连接到第二HEMT的一侧相反的一侧的开路短路，用于以预定频率和附近频率短路高频信号。

    VOLTAGE CONTROLLED OSCILLATOR, MMIC, AND HIGH FREQUENCY WIRELESS DEVICE
    5.
    发明申请
    VOLTAGE CONTROLLED OSCILLATOR, MMIC, AND HIGH FREQUENCY WIRELESS DEVICE 审中-公开
    电压控制振荡器，MMIC和高频无线设备

    公开(公告)号：US20100052799A1

    公开(公告)日：2010-03-04

    申请号：US12473317

    申请日：2009-05-28

    申请人： Shinsuke Watanabe ,  Seiki Goto ,  Yoshihiro Tsukahara ,  Ko Kanaya

    发明人： Shinsuke Watanabe ,  Seiki Goto ,  Yoshihiro Tsukahara ,  Ko Kanaya

    IPC分类号： H03L7/00

    CPC分类号： H03L7/099 ,  H03B5/1847

    摘要： A voltage controlled oscillator having low phase noise and including: a variable resonator including a varactor and a control voltage terminal; and an open-end stub connected in parallel to the variable resonator, the open-end stub having a length shorter than or equal to an odd multiple of one quarter of a wavelength of a harmonic signal plus one sixteenth of the wavelength of the harmonic signal, and longer than or equal to an odd multiple of one quarter of the wavelength of the harmonic signal minus one sixteenth of the wavelength of the harmonic signal. In this structure, a high Q value is realized for a fundamental wave frequency. Fluctuation in a control voltage due to a harmonic signal is controlled.

    摘要翻译： 一种具有低相位噪声的压控振荡器，包括：包括变容二极管和控制电压端子的可变谐振器; 以及与可变谐振器并联连接的开路短截线，开路短截线长度短于或等于谐波信号的波长的四分之一加上谐波信号的波长的十六分之一的奇数倍 并且长于或等于谐波信号的四分之一波长的奇数倍减去谐波信号的波长的十六分之一。 在该结构中，对于基波频率实现高Q值。 控制由于谐波信号引起的控制电压的波动。

    Cascode circuit and integrated circuit having it
    6.
    发明授权
    Cascode circuit and integrated circuit having it 有权
    串联电路和集成电路

    公开(公告)号：US07071786B2

    公开(公告)日：2006-07-04

    申请号：US10873291

    申请日：2004-06-23

    申请人： Akira Inoue ,  Seiki Goto

    发明人： Akira Inoue ,  Seiki Goto

    IPC分类号： H03F3/04

    CPC分类号： H03F1/223 ,  H03F3/189

    摘要： A cascode circuit includes a first field effect transistor which has a source terminal grounded, a second field effect transistor which has a source terminal connected to a drain terminal of the first field effect transistor, and a first capacitor connected between the source terminal of the first field effect transistor and a gate terminal of the second field effect transistor. The first field effect transistor and the second field effect transistor are cascode-connected successively. A capacitance value of the first capacitor is 0.01 to 10 times that between the gate and source terminals of the second field effect transistor.

    摘要翻译： 共射共振电路包括：源极端子接地的第一场效应晶体管，具有与第一场效应晶体管的漏极端子连接的源极端子的第二场效应晶体管，以及连接在第一场效应晶体管的源极端子之间的第一电容器 场效应晶体管和第二场效应晶体管的栅极端子。 第一场效应晶体管和第二场效应晶体管被依次串联连接。 第一电容器的电容值是第二场效应晶体管的栅极和源极之间的电容值的0.01至10倍。

    Cascode circuit and integrated circuit having it
    7.
    发明申请
    Cascode circuit and integrated circuit having it 有权
    串联电路和集成电路

    公开(公告)号：US20050007200A1

    公开(公告)日：2005-01-13

    申请号：US10873291

    申请日：2004-06-23

    申请人： Akira Inoue ,  Seiki Goto

    发明人： Akira Inoue ,  Seiki Goto

    IPC分类号： H01L27/06 ,  H01L21/8232 ,  H01L27/095 ,  H01L29/80 ,  H03F1/22 ,  H03F3/189

    CPC分类号： H03F1/223 ,  H03F3/189

    摘要： A cascode circuit includes a first field effect transistor which has a source terminal grounded, a second field effect transistor which has a source terminal connected to a drain terminal of the first field effect transistor, and a first capacitor connected between the source terminal of the first field effect transistor and a gate terminal of the second field effect transistor. The first field effect transistor and the second field effect transistor are cascode-connected successively. A capacitance value of the first capacitor is 0.01 to 10 times that between the gate and source terminals of the second field effect transistor.

    摘要翻译： 共射共振电路包括：源极端子接地的第一场效应晶体管，具有与第一场效应晶体管的漏极端子连接的源极端子的第二场效应晶体管，以及连接在第一场效应晶体管的源极端子之间的第一电容器 场效应晶体管和第二场效应晶体管的栅极端子。 第一场效应晶体管和第二场效应晶体管被依次串联连接。 第一电容器的电容值是第二场效应晶体管的栅极和源极之间的电容值的0.01至10倍。

    High-frequency power amplifier
    9.
    发明授权
    High-frequency power amplifier 有权
    高频功率放大器

    公开(公告)号：US06778020B2

    公开(公告)日：2004-08-17

    申请号：US10379557

    申请日：2003-03-06

    申请人： Akira Ohta ,  Shingo Matsuda ,  Akira Inoue ,  Seiki Goto

    发明人： Akira Ohta ,  Shingo Matsuda ,  Akira Inoue ,  Seiki Goto

    IPC分类号： H03F304

    CPC分类号： H03F1/56 ,  H03F3/191

    摘要： A resonance circuit of a transmission line and a capacitor is connected to the base circuit of a transistor. The transmission line is shorter than one-quarter wavelength to make the resonant frequency of the resonant circuit higher than the frequency of a second harmonic. As a result, the angle of the reflection coefficient of the second harmonic when an input matching circuit side is viewed from the input terminal of the transistor ranges from 170° to 270° on a polar chart, and phase difference between the fundamental wave of the base current and the second harmonic decreases.

    摘要翻译： 传输线和电容器的谐振电路连接到晶体管的基极。 传输线短于四分之一波长，以使谐振电路的谐振频率高于二次谐波的频率。 结果，从极性图的晶体管的输入端子观察输入匹配电路侧的二次谐波的反射系数的角度在极坐标图上为170°〜270°，并且基波的相位差 基极电流和二次谐波减小。