利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

55 条记录 (耗时 0.028 秒)

    Self-aligned interconnect and method for producing same
    1.
    发明授权
    Self-aligned interconnect and method for producing same 失效
    自对准互连及其制造方法

    公开(公告)号：US06457811B1

    公开(公告)日：2002-10-01

    申请号：US09843833

    申请日：2001-04-30

    申请人： Alfred I-Tsung Pan ,  Terry M. Lambright

    发明人： Alfred I-Tsung Pan ,  Terry M. Lambright

    IPC分类号： B41J214

    CPC分类号： B41J2/14024 ,  B41J2/14016 ,  B41J2202/19 ,  B41J2202/20

    摘要： A self-aligned interconnect significantly reduces manufacturing costs and provides important advantages in a number of specific applications begins with a single crystal substrate. The substrate is machined to accept microelectronic chips at various locations (openings) along the substrate. Corresponding chips are constructed to precisely fit the openings in the crystal substrate. To ensure precision fit, both the substrate and the chip are etched along the same crystal plane. As a result, the chips can be placed in the openings in the substrate with perfect or nearly perfect alignment in the x and y directions without expensive alignment tools. In effect, the chips and the substrate are self aligned.

    摘要翻译： 自对准互连显着降低了制造成本，并且在单晶衬底开始的许多具体应用中提供了重要的优点。 基板被加工成沿着基板在各种位置（开口）处接受微电子芯片。 相应的芯片被构造成精确地配合晶体衬底中的开口。 为了确保精密配合，衬底和芯片都沿相同的晶面蚀刻。 结果，芯片可以在x和y方向上以完美或几乎完美的对准方式放置在基板中的开口中，而不需要昂贵的对准工具。 实际上，芯片和衬底是自对准的。

    INKJET PRINTHEAD AND METHOD EMPLOYING CENTRAL INK FEED CHANNEL
    3.
    发明申请
    INKJET PRINTHEAD AND METHOD EMPLOYING CENTRAL INK FEED CHANNEL 有权
    INKJET PRINTHEAD和使用中央墨水进料通道的方法

    公开(公告)号：US20120120157A1

    公开(公告)日：2012-05-17

    申请号：US13260075

    申请日：2009-07-31

    申请人： Alfred I-Tsung Pan ,  Erik Torniainen

    发明人： Alfred I-Tsung Pan ,  Erik Torniainen

    IPC分类号： B41J2/05

    CPC分类号： B41J2/1404 ,  B41J2/14145 ,  B41J2002/14467

    摘要： An inkjet printhead (100) and a method (200) of supplying viscous ink employ a central ink feed channel (130). The inkjet printhead (100) includes a bridge beam (110) that supports an ejector element (106), a pair of lateral ink feed channels (120) adjacent to the bridge beam (110), and a central ink feed channel (130) through the ejector element (106) and bridge beam (110). The pair of lateral ink feed channels (120) and the central ink feed channel (130) connect between an ink reservoir (140) below the bridge beam (110) and the bubble expansion chamber (104). The method (200) includes providing (210) a central ink feed channel in a bridge beam of a printhead and flowing (220) viscous ink from an ink reservoir through a combination of the provided central ink feed channel and a pair of lateral ink feed channels.

    摘要翻译： 喷墨打印头（100）和供应粘性油墨的方法（200）采用中央供墨通道（130）。 喷墨打印头（100）包括支撑喷射器元件（106）的桥梁（110），邻近桥梁梁（110）的一对横向供墨通道（120）和中央供墨通道（130） 通过喷射器元件（106）和桥梁梁（110）。 一对横向供墨通道（120）和中央供墨通道（130）连接在桥梁梁（110）下面的墨水储存器（140）和气泡膨胀室（104）之间。 方法（200）包括在打印头的桥梁梁中提供（210）中心供墨通道，并通过所提供的中央供墨通道和一对横向供墨通道的组合从油墨储存器流出（220）粘性油墨 频道

    Image development methods, hard imaging devices, and image members
    5.
    发明申请
    Image development methods, hard imaging devices, and image members 有权
    图像开发方法，硬件成像设备和图像成员

    公开(公告)号：US20080007609A1

    公开(公告)日：2008-01-10

    申请号：US11483022

    申请日：2006-07-07

    申请人： Omer Gila ,  Alfred I-Tsung Pan ,  Michael H. Lee

    发明人： Omer Gila ,  Alfred I-Tsung Pan ,  Michael H. Lee

    IPC分类号： G03G13/04 ,  B41J2/385

    CPC分类号： G03G5/028 ,  G03G15/10 ,  G03G15/6591 ,  G03G15/75 ,  G03G2215/00523 ,  G03G2215/00957

    摘要： Image development methods, hard imaging devices, and image members are described. According to one embodiment, an image development method includes providing an image member comprising a surface having different portions of different electrical conductivities, wherein one of the portions defines an imaging pattern of an image, providing a development agent comprising a plurality of electrically charged image particles and a plurality of electrically charged charge directors over the image member, providing an electrical field proximate the image member having the development agent over the image member, and using the electrically charged charge directors and the electric field, directing the electrically charged image particles to the one of the portions of the surface of the image member to develop the image.

    摘要翻译： 描述了图像显影方法，硬像成像装置和图像构件。 根据一个实施例，图像显影方法包括提供包括具有不同电导率不同部分的表面的图像构件，其中所述部分中的一个限定图像的成像图案，提供显影剂，其包括多个带电荷的图像粒子 以及多个带电荷的电荷导向器，在所述图像构件上方提供邻近所述图像构件的电场，所述图像构件具有所述图像构件上的所述显影剂，并且使用所述带电荷的电荷导向器和所述电场，将带电荷的图像粒子引导到 图像构件的表面的一部分之一用于显影图像。

    Monolithic common carrier
    6.
    发明授权
    Monolithic common carrier 失效
    单片共同载体

    公开(公告)号：US06812564B1

    公开(公告)日：2004-11-02

    申请号：US09655197

    申请日：2000-09-05

    申请人： Alfred I-Tsung Pan

    发明人： Alfred I-Tsung Pan

    IPC分类号： H01L2334

    CPC分类号： B41J2/1623 ,  B41J2/14 ,  B41J2/145 ,  B41J2/16 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/164 ,  B41J2202/19 ,  B41J2202/20 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A common carrier for forming multiple printheads thereon and method of forming thereof is described. The common carrier includes a carrier substrate for adhering a plurality of unprocessed, integrateable semiconductor chips. Once adhered, the carrier substrate is lithographically processed to form a plurality of integrated circuit (IC) printhead chips such that alignment of the IC chips on the carrier substrate has the precision of lithographic alignment tolerances which is well within printhead alignment requirements.

    摘要翻译： 描述了用于在其上形成多个打印头的公共载体及其形成方法。 公共载体包括用于粘附多个未加工的可并入的半导体芯片的载体基板。 一旦粘附，载体基板被光刻处理以形成多个集成电路（IC）打印头芯片，使得载体基板上的IC芯片的对准具有良好地在打印头对准要求之内的光刻对准公差的精度。

    Hermetic seal in microelectronic devices
    7.
    发明授权
    Hermetic seal in microelectronic devices 失效
    微电子器件密封

    公开(公告)号：US06530649B1

    公开(公告)日：2003-03-11

    申请号：US09930228

    申请日：2001-08-16

    申请人： Alfred I-Tsung Pan

    发明人： Alfred I-Tsung Pan

    IPC分类号： B41J205

    CPC分类号： B41J2/14024 ,  B41J2202/20

    摘要： A carrier includes a substrate formed to accept microelectronic chips at various pockets in the substrate. The microelectronic chips are hermetically sealed within the substrate by a deposition process using localized energy supplied at gaps between the chips and the pockets. During the heating process, seal material is deposited in the gaps to form the hermetic seals.

    摘要翻译： 载体包括形成为在基板中的各种凹穴处接受微电子芯片的基板。 微电子芯片通过使用在芯片和凹穴之间的间隙处供应的局部能量的沉积工艺在衬底内气密密封。 在加热过程中，密封材料沉积在间隙中以形成气密密封。

    Thin film microheaters for assembly of inkjet printhead assemblies
    8.
    发明授权
    Thin film microheaters for assembly of inkjet printhead assemblies 失效
    用于组装喷墨打印头组件的薄膜显微加热器

    公开(公告)号：US06460966B1

    公开(公告)日：2002-10-08

    申请号：US09938710

    申请日：2001-08-23

    申请人： Ronald A. Hellekson ,  Alfred I-Tsung Pan ,  Marshall Field

    发明人： Ronald A. Hellekson ,  Alfred I-Tsung Pan ,  Marshall Field

    IPC分类号： B41J2175

    CPC分类号： B41J2/17553 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1753

    摘要： A method and apparatus for assembling an inkjet printhead is disclosed. The apparatus comprises one or more microheater resistors and a material, which can be reflowed by use of the heat generated by the microheater, disposed proximate to the heater resistor. The microheater resistor comprises a heater resistor with an input port and an output port. A first electrical conductor, coupled to the input port of the heater resistor, receives a first voltage and a second electrical conductor, coupled to the output port of the heater resistor, receives a second voltage. A curing effect in the adhesive is produced by heat generated in the heater resistor when electrical current flows through the resistor in response to an application of a first voltage to the first electrical conductor and a second voltage to the second electrical conductor.

    摘要翻译： 公开了一种用于组装喷墨打印头的方法和装置。 该装置包括一个或多个微加热器电阻器和材料，其可以通过使用靠近加热电阻器的微加热器产生的热量回流。 微加热器电阻器包括具有输入端口和输出端口的加热电阻器。 耦合到加热电阻器的输入端口的第一电导体接收耦合到加热电阻器的输出端口的第一电压和第二电导体，接收第二电压。 当电流响应于向第一电导体施加第一电压并且向第二电导体施加第二电压时，当电流流过电阻器时，在加热电阻器中产生的热量产生粘合剂中的固化效果。

    Self-aligned common carrier
    9.
    发明授权
    Self-aligned common carrier 失效
    自对准公共载体

    公开(公告)号：US06366468B1

    公开(公告)日：2002-04-02

    申请号：US09560943

    申请日：2000-04-28

    申请人： Alfred I-Tsung Pan

    发明人： Alfred I-Tsung Pan

    IPC分类号： H05K118

    CPC分类号： H01L23/5389 ,  B41J2/14024 ,  B41J2/1408 ,  B41J2/14201 ,  B41J2202/20 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/24227 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/83136 ,  H01L2224/95085 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/10158 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15155 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/351 ,  H01L2924/00

    摘要： Precision alignment of one or more parts on a common carrier is described. A self-aligned common carrier includes a carrier substrate having one or more pockets formed in the substrate. Each pocket includes a side profile formed in the pocket. A chip having an identical side profile that complements the side profile in the pocket is mounted to the carrier substrate by inserting the chip into the pocket. The complementary side profiles result in near perfect self-alignment between the chip and at least two orthogonal planes of the carrier substrate. The chip and the carrier substrate can be made from a single crystal semiconductor material and the side profiles can be formed by anisotropic etch process that selectively etches the chip and the substrate along a predetermined crystalline plane. The chip and the carrier substrate can be single crystal silicon having a (100) crystalline orientation and the side profiles can be formed by selectively etching the silicon along a (111) crystalline plane. The matching coefficients of thermal expansion between the chip and the carrier substrate substantially reduces thermal stress related interconnect failures and misalignment between the chip and the carrier substrate. The carrier substrate and the chip can be anodically bonded to each other by oxidizing either one of the carrier substrate and the chip and etching the side profiles so that they are atomically flat.

    摘要翻译： 描述一个或多个部件在公共载体上的精确对准。 自对准公共载体包括具有在基板中形成的一个或多个凹穴的载体基板。 每个口袋包括形成在口袋中的侧面轮廓。 通过将芯片插入到口袋中，将具有与口袋中的侧面轮廓互补的侧面轮廓的芯片安装到载体基板。 互补侧分布导致芯片与载体衬底的至少两个正交平面之间的近似完美的自对准。 芯片和载体衬底可以由单晶半导体材料制成，并且可以通过各向异性蚀刻工艺形成侧面轮廓，该工艺可以沿着预定的晶面选择性地蚀刻芯片和衬底。 芯片和载体衬底可以是具有（100）晶体取向的单晶硅，并且可以通过沿着（111）晶面选择性蚀刻硅来形成侧面轮廓。 芯片和载体衬底之间的热膨胀匹配系数基本上降低了与热应力相关的互连故障和芯片与载体衬底之间的未对准。 载体衬底和芯片可以通过氧化载体衬底和芯片中的任何一个并蚀刻侧面轮廓使得它们原子平坦地彼此阳极结合。