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公开(公告)号：US20230070922A1
公开(公告)日：2023-03-09
申请号：US17982713
申请日：2022-11-08
发明人： Gyu Wan Han , Won Bae Bang , Ju Hyung Lee , Min Hwa Chang , Dong Joo Park , Jin Young Khim , Jae Yun Kim , Se Hwan Hong , Seung Jae Yu , Shaun Bowers , Gi Tae Lim , Byoung Woo Cho , Myung Jea Choi , Seul Bee Lee , Sang Goo Kang , Kyung Rok Park
IPC分类号： H01L23/13 , H01L21/56 , H01L23/00 , H01L25/065 , H01L23/31 , H01L25/18 , H01L23/498
摘要： In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
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公开(公告)号：US20220352129A1
公开(公告)日：2022-11-03
申请号：US17864891
申请日：2022-07-14
发明人： Gi Tae Lim , Jae Yun Kim , Myung Jae Choi , Min Hwa Chang , Mi Kyoung Choi
IPC分类号： H01L25/10 , H01L23/498 , H01L23/31 , H01L23/00 , H01L21/56 , H01L23/538 , H01L21/52
摘要： In one example, a semiconductor structure comprises a frontside substrate comprising a conductive structure, a backside substrate comprising a base substrate and a cavity substrate contacting the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate, and a first electronic component over the top side of the frontside substrate and in the cavity. The first electronic component is coupled with the conductive structure, and an encapsulant is in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect. Other examples and related methods are also disclosed herein.
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公开(公告)号：US11018107B2
公开(公告)日：2021-05-25
申请号：US16416756
申请日：2019-05-20
发明人： Jae Hun Bae , Won Chul Do , Min Yoo , Young Rae Kim , Min Hwa Chang , Dong Hyun Kim , Ah Ra Jo , Seok Geun Ahn
IPC分类号： H01L23/31 , H01L23/00 , H01L23/498 , H01L25/065 , H01L25/00 , H01L23/538 , H01L21/683
摘要： A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
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公开(公告)号：US20200381395A1
公开(公告)日：2020-12-03
申请号：US16429553
申请日：2019-06-03
发明人： Gyu Wan Han , Won Bae Bang , Ju Hyung Lee , Min Hwa Chang , Dong Joo Park , Jin Young Khim , Jae Yun Kim , Se Hwan Hong , Seung Jae Yu , Shaun Bowers , Gi Tae Lim , Byoung Woo Cho , Myung Jea Choi , Seul Bee Lee
IPC分类号： H01L25/065 , H01L25/00
摘要： In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.
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公开(公告)号：US20240258182A1
公开(公告)日：2024-08-01
申请号：US18633941
申请日：2024-04-12
发明人： Gyu Wan Han , Won Bae Bang , Ju Hyung Lee , Min Hwa Chang , Dong Joo Park , Jin Young Khim , Jae Yun Kim , Se Hwan Hong , Seung Jae Yu , Shaun Bowers , Gi Tae Lim , Byoung Woo Cho , Myung Jea Choi , Seul Bee Lee , Sang Goo Kang , Kyung Rok Park
IPC分类号： H01L23/13 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/18
CPC分类号： H01L23/13 , H01L21/568 , H01L23/3185 , H01L23/49816 , H01L24/48 , H01L24/85 , H01L25/0657 , H01L25/18 , H01L2224/48145 , H01L2224/48157 , H01L2224/85005 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562
摘要： In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
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公开(公告)号：US11961775B2
公开(公告)日：2024-04-16
申请号：US17982713
申请日：2022-11-08
发明人： Gyu Wan Han , Won Bae Bang , Ju Hyung Lee , Min Hwa Chang , Dong Joo Park , Jin Young Khim , Jae Yun Kim , Se Hwan Hong , Seung Jae Yu , Shaun Bowers , Gi Tae Lim , Byoung Woo Cho , Myung Jea Choi , Seul Bee Lee , Sang Goo Kang , Kyung Rok Park
IPC分类号： H01L23/48 , H01L21/56 , H01L23/00 , H01L23/13 , H01L23/31 , H01L23/498 , H01L23/52 , H01L25/065 , H01L25/18 , H01L29/40
CPC分类号： H01L23/13 , H01L21/568 , H01L23/3185 , H01L23/49816 , H01L24/48 , H01L24/85 , H01L25/0657 , H01L25/18 , H01L2224/48145 , H01L2224/48157 , H01L2224/85005 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562
摘要： In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
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公开(公告)号：US12033970B2
公开(公告)日：2024-07-09
申请号：US17328766
申请日：2021-05-24
发明人： Jae Hun Bae , Won Chul Do , Min Yoo , Young Rae Kim , Min Hwa Chang , Dong Hyun Kim , Ah Ra Jo , Seok Geun Ahn
IPC分类号： H01L23/00 , H01L21/683 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/00 , H01L25/065
CPC分类号： H01L24/20 , H01L21/6835 , H01L23/49816 , H01L23/5383 , H01L24/14 , H01L24/17 , H01L24/19 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L23/3128 , H01L23/538 , H01L23/5385 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2221/68345 , H01L2221/68381 , H01L2224/13082 , H01L2224/13101 , H01L2224/13147 , H01L2224/1403 , H01L2224/16227 , H01L2224/16235 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/92125 , H01L2924/15311 , H01L2224/13101 , H01L2924/014 , H01L2924/00014 , H01L2224/13147 , H01L2924/00014
摘要： A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
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公开(公告)号：US11495505B2
公开(公告)日：2022-11-08
申请号：US17018434
申请日：2020-09-11
发明人： Gyu Wan Han , Won Bae Bang , Ju Hyung Lee , Min Hwa Chang , Dong Joo Park , Jin Young Khim , Jae Yun Kim , Se Hwan Hong , Seung Jae Yu , Shaun Bowers , Gi Tae Lim , Byoung Woo Cho , Myung Jea Choi , Seul Bee Lee , Sang Goo Kang , Kyung Rok Park
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/13 , H01L21/56 , H01L23/00 , H01L25/065 , H01L23/31 , H01L25/18 , H01L23/498
摘要： In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
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公开(公告)号：US20210398930A1
公开(公告)日：2021-12-23
申请号：US17328766
申请日：2021-05-24
发明人： Jae Hun Bae , Won Chul Do , Min Yoo , Young Rae Kim , Min Hwa Chang , Dong Hyun Kim , Ah Ra Jo , Seok Geun Ahn
IPC分类号： H01L23/00 , H01L23/498 , H01L25/065 , H01L25/00 , H01L23/538 , H01L21/683
摘要： A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
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