Semiconductor device for radiation detection
    1.
    发明授权
    Semiconductor device for radiation detection 有权
    用于辐射检测的半导体器件

    公开(公告)号:US08729652B2

    公开(公告)日:2014-05-20

    申请号:US12282932

    申请日:2007-03-13

    IPC分类号: H01L31/115

    摘要: The invention provides a semiconductor device (11) for radiation detection, which comprises a substrate region (1) of a substrate semiconductor material, such as silicon, and a detection region (3) at a surface of the semiconductor device (11), in which detection region (3) charge carriers of a first conductivity type, such as electrons, are generated and detected upon incidence of electromagnetic radiation (L) on the semiconductor device (11). The semiconductor device (11) further comprises a barrier region (2,5,14) of a barrier semiconductor material or an isolation material, which barrier region (2,5,14) is an obstacle between the substrate region (1) and the detection region (3) for charge carriers that are generated in the substrate region (1) by penetration of ionizing radiation (X), such as X-rays, into the substrate region (1). This way the invention provides a semiconductor device (11) for radiation detection in which the influence on the performance of the semiconductor device (11) of ionizing radiation (X), such as X-rays, that penetrates into the substrate region (1) is reduced.

    摘要翻译: 本发明提供了一种用于放射线检测的半导体器件(11),其包括诸如硅的衬底半导体材料的衬底区域(1)和在半导体器件(11)的表面处的检测区域(3) 在半导体器件(11)上的电磁辐射(L)入射时,产生并检测出检测区域(3)对第一导电类型(例如电子)的载流子。 半导体器件(11)还包括阻挡半导体材料或隔离材料的阻挡区域(2,5,14),所述阻挡区域(2,5,14)是衬底区域(1)和衬底区域 用于通过诸如X射线的电离辐射(X)穿透而在衬底区域(1)中产生的电荷载体的检测区域(3)。 这样,本发明提供了一种用于放射线检测的半导体器件(11),其中对穿透到衬底区域(1)中的诸如X射线的电离辐射(X)的半导体器件(11)的性能的影响, 降低了。

    SEMICONDUCTOR DEVICE FOR RADIATION DETECTION
    2.
    发明申请
    SEMICONDUCTOR DEVICE FOR RADIATION DETECTION 有权
    用于辐射检测的半导体器件

    公开(公告)号:US20090096046A1

    公开(公告)日:2009-04-16

    申请号:US12282932

    申请日:2007-03-13

    IPC分类号: H01L31/08

    摘要: The invention provides a semiconductor device (11) for radiation detection, which comprises a substrate region (1) of a substrate semiconductor material, such as silicon, and a detection region (3) at a surface of the semiconductor device (11), in which detection region (3) charge carriers of a first conductivity type, such as electrons, are generated and detected upon incidence of electromagnetic radiation (L) on the semiconductor device (11). The semiconductor device (11) further comprises a barrier region (2,5,14) of a barrier semiconductor material or an isolation material, which barrier region (2,5,14) is an obstacle between the substrate region (1) and the detection region (3) for charge carriers that are generated in the substrate region (1) by penetration of ionizing radiation (X), such as X-rays, into the substrate region (1). This way the invention provides a semiconductor device (11) for radiation detection in which the influence on the performance of the semiconductor device (11) of ionizing radiation (X), such as X-rays, that penetrates into the substrate region (1) is reduced.

    摘要翻译: 本发明提供了一种用于放射线检测的半导体器件(11),其包括诸如硅的衬底半导体材料的衬底区域(1)和在半导体器件(11)的表面处的检测区域(3) 在半导体器件(11)上的电磁辐射(L)入射时,产生并检测出检测区域(3)对第一导电类型(例如电子)的载流子。 半导体器件(11)还包括阻挡半导体材料或隔离材料的阻挡区域(2,5,14),所述阻挡区域(2,5,14)是衬底区域(1)和衬底区域 用于通过诸如X射线的电离辐射(X)穿透而在衬底区域(1)中产生的电荷载体的检测区域(3)。 这样,本发明提供了一种用于放射线检测的半导体器件(11),其中对穿透到衬底区域(1)中的诸如X射线的电离辐射(X)的半导体器件(11)的性能的影响, 降低了。

    SEMICONDUCTOR DEVICE FOR RADIATION DETECTION
    3.
    发明申请
    SEMICONDUCTOR DEVICE FOR RADIATION DETECTION 审中-公开
    用于辐射检测的半导体器件

    公开(公告)号:US20090096052A1

    公开(公告)日:2009-04-16

    申请号:US12282907

    申请日:2007-03-09

    IPC分类号: H01L31/0232

    摘要: The invention provides a semiconductor device (11) for radiation detection in a semiconductor substrate (1) comprising a detection region (3), which detects charge carriers that are generated upon incidence of radiation (X, L) on the semiconductor device (11). The semiconductor device further (11) comprises a further detection region (13), which detects charge carriers that are generated upon incidence of radiation (X) on the semiconductor device (11). A shield (8, 18) extends over the further detection region (13), which prevents electromagnetic radiation (L) from entering the detection region (13). This way the invention provides a semiconductor device (11) for radiation detection in which the separation between the detection of electromagnetic radiation (L) and the detection of other radiation is improved. The invention further provides a detector (10) comprising the semiconductor device (11), and a processor (P) coupled to the detection region (3) and the further detection region (13) for generating an output signal (22) representing the electromagnetic radiation (L).

    摘要翻译: 本发明提供一种半导体衬底(1)中用于辐射检测的半导体器件(11),包括检测区域(3),该检测区域检测在半导体器件(11)上的辐射(X,L)入射时产生的电荷载流子, 。 半导体器件还包括另外的检测区域(13),其检测在半导体器件(11)上的辐射(X)入射时产生的电荷载流子。 屏蔽(8,18)延伸越过另外的检测区域(13),防止电磁辐射(L)进入检测区域(13)。 这样,本发明提供了一种用于放射线检测的半导体器件(11),其中电磁辐射(L)的检测与其它辐射的检测之间的间隔被改善。 本发明还提供了一种包括半导体器件(11)的检测器(10)和耦合到检测区域(3)的处理器(P)和用于产生表示电磁波的输出信号(22)的另外的检测区域(13) 辐射(L)。

    Method of manufacturing a semiconductor device
    4.
    发明授权
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06797615B1

    公开(公告)日:2004-09-28

    申请号:US10135335

    申请日:2002-04-30

    IPC分类号: H01L2144

    CPC分类号: H01L21/76885 H01L21/76819

    摘要: A method of manufacturing a semiconductor device, in which a surface (1) of a semiconductor body (2) is provided with a first metallization layer comprising conductor tracks (3, 4), among which a number having a width w an a number having a greater width. On this structure an insulating layer (5) is deposited by means of a process in which the thickness of the formed insulating layer (5) is dependent on the width of the subjacent conductor tracks (3, 4), after which a capping layer (6) is deposited on the insulating layer (5). Then the silicon oxide layer is planarized by means of a polishing process. In this method, the conductor tracks having a width greater than w are split up into a number of parallel strips (10) having a width w, which strips are locally connected to one another.

    摘要翻译: 一种制造半导体器件的方法,其中半导体本体(2)的表面(1)设置有包括导体轨道(3,4)的第一金属化层,其中具有宽度w为数目为 更大的宽度。 在该结构上,通过其中形成的绝缘层(5)的厚度取决于下层导体轨道(3,4)的宽度的工艺沉积绝缘层(5),之后将覆盖层 6)沉积在绝缘层(5)上。 然后通过抛光工艺对氧化硅层进行平面化处理。 在该方法中,具有大于w的宽度的导体轨迹被分成多个具有宽度w的平行条带(10),该条带彼此局部连接。

    FIELD-EFFECT MAGNETIC SENSOR
    5.
    发明申请
    FIELD-EFFECT MAGNETIC SENSOR 有权
    现场效应磁传感器

    公开(公告)号:US20120154019A1

    公开(公告)日:2012-06-21

    申请号:US12974861

    申请日:2010-12-21

    IPC分类号: G11C5/14 H01L29/82

    摘要: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.

    摘要翻译: 场效应磁传感器有助于高灵敏度的磁场检测。 根据一个或多个示例性实施例,分别在第一和第二源极/漏极端子与第三源极/漏极端子之间的电流分别通过用于第一和第二端子中的每一个的单独沟道区域中的反转层进行控制。 响应于磁场,相对于在第三源极/漏极端子和第二源极/漏极端子之间通过的电流量,在第三源极/漏极端子与第一和第二源极/漏极端子之间相比较大量的电流通过 第一和第二源极/漏极端子之一。

    IC AND IC MANUFACTURING METHOD
    6.
    发明申请
    IC AND IC MANUFACTURING METHOD 有权
    IC和IC制造方法

    公开(公告)号:US20120038002A1

    公开(公告)日:2012-02-16

    申请号:US13148023

    申请日:2010-01-15

    IPC分类号: H01L27/06 H01L21/8249

    摘要: Disclosed is a method of manufacturing a vertical bipolar transistor in a CMOS process, comprising implanting an impurity of a first type into a the substrate (100) to form a buried region (150, 260) therein; forming a halo implant (134) using an impurity of a second type and a shallow implant (132) using an impurity of the first type, said halo implant enveloping the shallow implant in the substrate and being located over said buried region (150, 250); forming, adjacent to the halo implant (134), a further implant (136) using an impurity of the second type for providing a conductive connection to the halo implant; and providing respective connections (170, 160, 270) to the further implant (136), the shallow implant (132) and the buried region (150, 260) allowing the shallow implant, halo implant and buried region to be respectively operable as emitter, base and collector of the vertical bipolar transistor. Hence, an IC may be provided that comprises vertical bipolar transistors manufactured using CMOS processing steps only.

    摘要翻译: 公开了一种在CMOS工艺中制造垂直双极晶体管的方法,包括将第一类型的杂质注入到衬底(100)中以在其中形成掩埋区域(150,260); 使用第二类型的杂质和使用第一类型的杂质的浅植入物(132)形成晕轮植入物(134),所述晕轮植入物将衬底中的浅植入物包围并位于所述掩埋区域(150,250) ); 与所述晕轮植入物(134)相邻地形成使用所述第二类型的杂质的另外的植入物(136),用于提供与所述晕轮植入物的导电连接; 以及向所述另外的植入物(136)提供相应的连接(170,160,270),所述浅植入物(132)和所述掩埋区域(150,260)允许所述浅植入物,晕圈植入物和掩埋区域分别可作为发射体 ,垂直双极晶体管的基极和集电极。 因此,可以提供包括仅使用CMOS处理步骤制造的垂直双极晶体管的IC。

    Implementation of avalanche photo diodes in (Bi)CMOS processes
    7.
    发明授权
    Implementation of avalanche photo diodes in (Bi)CMOS processes 有权
    (Bi)CMOS工艺中雪崩光电二极管的实现

    公开(公告)号:US07759650B2

    公开(公告)日:2010-07-20

    申请号:US12298206

    申请日:2007-04-10

    IPC分类号: G01T1/24

    摘要: A radiation detector (46) includes a semiconductor layer(s) (12) formed on a substrate (14) and a scintillator (30) formed on the semiconductor layer(s) (12). The semiconductor layer(s) (12) includes an n-doped region (16) disposed adjacent to the substrate (14), and a p-doped region (18) disposed adjacent to the n-doped region (16). A trench (20) is formed within the semiconductor layer(s) (12) and around the p-doped region (18) and is filled with a material (22) that reduces pn junction curvature at the edges of the pn junction, which reduces breakdown at the edges. The scintillator (30) is disposed over and optically coupled to the p-doped regions (18). The radiation detector (46) further includes at least one conductive electrode (24) that electrically contacts the n-doped region.

    摘要翻译: 辐射检测器(46)包括形成在衬底(14)上的半导体层(12)和形成在半导体层(12)上的闪烁体(30)。 半导体层(12)包括邻近衬底(14)设置的n掺杂区域(16)和邻近于n掺杂区域(16)设置的p掺杂区域(18)。 沟槽(20)形成在半导体层(12)内并且围绕p掺杂区域(18)并且填充有减小pn结边缘处的pn结曲率的材料(22),其中 减少边缘的破坏。 闪烁体(30)设置在p掺杂区域(18)上并且光耦合到p掺杂区域(18)。 辐射检测器(46)还包括与n掺杂区域电接触的至少一个导电电极(24)。

    Semiconductor Devices with a Field Shaping Region
    8.
    发明申请
    Semiconductor Devices with a Field Shaping Region 有权
    具有场成形区域的半导体器件

    公开(公告)号:US20100038676A1

    公开(公告)日:2010-02-18

    申请号:US12177258

    申请日:2008-07-22

    IPC分类号: H01L29/74

    摘要: A semiconductor device includes a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device. The field shaping region is coupled via capacitive voltage coupling regions to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction and the device is non-conducting, a capacitive electric field is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region. The electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region in the semiconductor region.

    摘要翻译: 半导体器件包括具有pn结的半导体区域和位于pn结附近的场整形区域,以增加器件的反向击穿电压。 场整形区域经由电容性电压耦合区域耦合到与施加到pn结的基本相同的电压。 当在pn结上施加反向电压并且器件不导通时,在场成形区域的一部分中存在电容电场,其延伸超过不存在pn结区域的pn结耗尽区的极限 场整形区域。 场成形区域中的电场引起限制在半导体区域中相应延伸的pn结耗尽区的拉伸电场。

    SEMICONDUCTOR DEVICE WITH RELATIVELY HIGH BREAKDOWN VOLTAGE AND MANUFACTURING METHOD
    9.
    发明申请
    SEMICONDUCTOR DEVICE WITH RELATIVELY HIGH BREAKDOWN VOLTAGE AND MANUFACTURING METHOD 有权
    具有相对高的高电压和制造方法的半导体器件

    公开(公告)号:US20090072319A1

    公开(公告)日:2009-03-19

    申请号:US11917608

    申请日:2006-06-14

    IPC分类号: H01L29/78 H01L21/336

    摘要: A semiconductor device includes at least one active component (18) having a p-n junction (26) on the semiconductor substrate in an active region (19) of the semiconductor substrate (4). A shallow trench isolation pattern is used to form a plurality of longitudinally extending shallow trenches (12) containing insulator (14). These trenches define a plurality of longitudinal active stripes (10) between the shallow trenches (12). The shallow trench isolation depth (dsπ) is greater than the junction depth (dsO of the longitudinal active stripes and the width (wsO of the active stripes (10) is less than the depletion length (ldepi) of the p-n junction.

    摘要翻译: 半导体器件包括在半导体衬底(4)的有源区(19)中的半导体衬底上具有p-n结(26)的至少一个有源元件(18)。 浅沟槽隔离图案用于形成包含绝缘体(14)的多个纵向延伸的浅沟槽(12)。 这些沟槽在浅沟槽(12)之间限定多个纵向有源条纹(10)。 浅沟槽隔离深度(dspi)大于结深度(纵向有源条纹的dsO)和有源条纹(10)的宽度(wsO)小于p-n结的耗尽长度(ldepi)。

    IMPLEMENTATION OF AVALANCHE PHOTO DIODES IN (BI) CMOS PROCESSES
    10.
    发明申请
    IMPLEMENTATION OF AVALANCHE PHOTO DIODES IN (BI) CMOS PROCESSES 有权
    (BI)CMOS工艺中的AVALANCHE照相二极管的实现

    公开(公告)号:US20090065704A1

    公开(公告)日:2009-03-12

    申请号:US12298206

    申请日:2007-04-10

    IPC分类号: G01T1/20 H01L27/00 H01L21/00

    摘要: A radiation detector (46) includes a semiconductor layer(s) (12) formed on a substrate (14) and a scintillator (30) formed on the semiconductor layer(s) (12). The semiconductor layer(s) (12) includes an n−doped region (16) disposed adjacent to the substrate (14), and a p−doped region (18) disposed adjacent to the n−doped region (16). A trench (20) is formed within the semiconductor layer(s) (12) and around the p−doped region (18) and is filled with a material (22) that reduces pn junction curvature at the edges of the pn junction, which reduces breakdown at the edges. The scintillator (30) is disposed over and optically coupled to the p−doped regions (18). The radiation detector (46) further includes at least one conductive electrode (24) that electrically contacts the n−doped region.

    摘要翻译: 辐射检测器(46)包括形成在衬底(14)上的半导体层(12)和形成在半导体层(12)上的闪烁体(30)。 半导体层(12)包括邻近衬底(14)设置的n掺杂区域(16)和邻近于n掺杂区域(16)设置的p掺杂区域(18)。 沟槽(20)形成在半导体层(12)内并且围绕p掺杂区域(18)并且填充有减小pn结边缘处的pn结曲率的材料(22),其中 减少边缘的破坏。 闪烁体(30)设置在p掺杂区域(18)上并且光耦合到p掺杂区域(18)。 辐射检测器(46)还包括与n掺杂区域电接触的至少一个导电电极(24)。