公开(公告)号：US09935183B2

公开(公告)日：2018-04-03

申请号：US15412545

申请日：2017-01-23

Applicant: Applied Materials, Inc.

Inventor： Dong-Kil Yim ,  Tae Kyung Won ,  Seon-Mee Cho ,  John M. White

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/786 ,  H01L29/24 ,  H01L21/467

CPC classification number: H01L29/66969 ,  H01L21/467 ,  H01L29/24 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869

Abstract: The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.

公开(公告)号：US09245809B2

公开(公告)日：2016-01-26

申请号：US14199318

申请日：2014-03-06

Applicant: Applied Materials, Inc.

Inventor： Dong-Kil Yim ,  Tae Kyung Won ,  Seon-Mee Cho

IPC: H01L21/66

CPC classification number: H01L22/12 ,  H01L22/24

Abstract: The present invention generally relates to methods measuring pinhole determination. In one aspect, a method of measuring pinholes in a stack, such as a TFT stack, is provided. The method can include forming an active layer on a deposition surface of a substrate, forming a dielectric layer over the active layer, delivering an etchant to at least the dielectric layer, to etch both the dielectric layer and any pinholes formed therein and optically measuring the pinhole density of the etched dielectric layer using the active layer.

Abstract translation: 本发明一般涉及测量针孔确定的方法。 一方面，提供了一种测量堆叠中的针孔的方法，例如TFT堆叠。 该方法可以包括在衬底的沉积表面上形成有源层，在有源层上形成电介质层，向至少介电层递送蚀刻剂，以蚀刻电介质层和在其中形成的任何针孔，并光学测量 使用有源层的蚀刻介电层的针孔密度。

公开(公告)号：US20150340204A1

公开(公告)日：2015-11-26

申请号：US14727857

申请日：2015-06-01

Applicant: Applied Materials, Inc.

Inventor： Jozef Kudela ,  Tsutomu Tanaka ,  Carl A. Sorensen ,  Suhail Anwar ,  John M. White ,  Ranjit Indrajit Shinde ,  Seon-Mee Cho ,  Douglas D. Truong

IPC: H01J37/32

CPC classification number: H01J37/32082 ,  H01J37/3222 ,  H01J37/32577 ,  H01P3/00 ,  H01P3/06 ,  H01P3/085 ,  H01P11/003 ,  H01Q13/22 ,  H05H1/24 ,  H05H1/46 ,  H05H2001/463 ,  Y10T29/49169

Abstract: A transmission line RF applicator apparatus and method for coupling RF power to a plasma in a plasma chamber. The apparatus comprises two conductors, one of which has a plurality of apertures. In one aspect, apertures in different portions of the conductor have different sizes, spacing or orientations. In another aspect, adjacent apertures at successive longitudinal positions are offset along the transverse dimension. In another aspect, the apparatus comprises an inner conductor and one or two outer conductors. The main portion of each of the one or two outer conductors includes a plurality of apertures that extend between an inner surface and an outer surface of the outer conductor.

Abstract translation: 用于将RF功率耦合到等离子体室中的等离子体的传输线RF施加装置和方法。 该装置包括两个导体，其中一个具有多个孔。 在一个方面，导体的不同部分中的孔具有不同的尺寸，间距或取向。 在另一方面，连续纵向位置处的相邻孔沿横向尺寸偏移。 在另一方面，该装置包括内部导体和一个或两个外部导体。 一个或两个外部导体中的每一个的主要部分包括在外部导体的内表面和外表面之间延伸的多个孔。

公开(公告)号：US09818580B2

公开(公告)日：2017-11-14

申请号：US14727857

申请日：2015-06-01

Applicant: Applied Materials, Inc.

Inventor： Jozef Kudela ,  Tsutomu Tanaka ,  Carl A. Sorensen ,  Suhail Anwar ,  John M. White ,  Ranjit Indrajit Shinde ,  Seon-Mee Cho ,  Douglas D. Truong

IPC: H05H1/24 ,  H01J37/32 ,  H01P3/00 ,  H01P11/00 ,  H05H1/46 ,  H01P3/06 ,  H01P3/08 ,  H01Q13/22

CPC classification number: H01J37/32082 ,  H01J37/3222 ,  H01J37/32577 ,  H01P3/00 ,  H01P3/06 ,  H01P3/085 ,  H01P11/003 ,  H01Q13/22 ,  H05H1/24 ,  H05H1/46 ,  H05H2001/463 ,  Y10T29/49169

Abstract: A transmission line RF applicator apparatus and method for coupling RF power to a plasma in a plasma chamber. The apparatus comprises two conductors, one of which has a plurality of apertures. In one aspect, apertures in different portions of the conductor have different sizes, spacing or orientations. In another aspect, adjacent apertures at successive longitudinal positions are offset along the transverse dimension. In another aspect, the apparatus comprises an inner conductor and one or two outer conductors. The main portion of each of the one or two outer conductors includes a plurality of apertures that extend between an inner surface and an outer surface of the outer conductor.

公开(公告)号：US09590113B2

公开(公告)日：2017-03-07

申请号：US14773209

申请日：2014-03-04

Applicant: Applied Materials, Inc.

Inventor： Dong-kil Yim ,  Tae Kyung Won ,  Seon-Mee Cho ,  John M. White

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L29/66969 ,  H01L21/467 ,  H01L29/24 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869

Abstract: The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.

Abstract translation: 本发明一般涉及TFT和TFT的制造方法。 对于背沟道蚀刻TFT或蚀刻停止TFT，用于钝化层或蚀刻停止层的多个层允许在较不致密的背沟道保护层上形成非常密集的覆盖层。 封盖层可以是足够密实的，从而存在很少的针孔，因此氢不能通过半导体层。 因此，含氢前体可以用于覆盖层沉积。