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65 条记录 (耗时 0.031 秒)

    Optimized decoupling capacitor using lithographic dummy filler
    1.
    发明授权
    Optimized decoupling capacitor using lithographic dummy filler 有权
    使用光刻虚拟填料的优化去耦电容器

    公开(公告)号：US06353248B1

    公开(公告)日：2002-03-05

    申请号：US09562220

    申请日：2000-04-28

    申请人： Armin M Reith ,  Louis Hsu ,  Henning Haffner ,  Gunther Lehmann

    发明人： Armin M Reith ,  Louis Hsu ,  Henning Haffner ,  Gunther Lehmann

    IPC分类号： H01L2976

    CPC分类号： H01L28/40 ,  H01L27/10861 ,  H01L27/10894 ,  H01L27/10897

    摘要： A method to optimize the size and filling of decoupling capacitors for very large scale integrated circuits (VLSI) using existing lithographic fillers. The method combines the automatic or manual generation of lithographic fill patterns with the forming of the capacitors. According to the method, when the chip layout is about to be finished, all remaining empty space on the chip gets identified by a layout tool. Then, the closest power-supply nets get extracted. All power supplies and their combinations are sorted in a connection table which determines the appropriate types of capacitances once the power-supply nets closest to the empty spaces extracted from the layout. The empty spaces are then assigned appropriate decoupling capacitances. Decoupling capacitors generated by the method are suitable for VLSI power supplies for noise reduction.

    摘要翻译： 使用现有的平版印刷填料，优化大型集成电路（VLSI）的去耦电容的尺寸和填充的方法。 该方法将自动或手动生成光刻填充图案与电容器的形成相结合。 根据该方法，当芯片布局即将完成时，芯片上的所有剩余空间都由布局工具识别。 然后，最近的电源网络被提取。 所有电源及其组合在连接表中排序，一旦电源网最接近从布局提取的空白空间中，则确定适当类型的电容。 然后空的空间被分配适当的去耦电容。 通过该方法产生的去耦电容适用于降低噪声的VLSI电源。

    Optimized decoupling capacitor using lithographic dummy filler
    2.
    发明授权
    Optimized decoupling capacitor using lithographic dummy filler 有权
    使用光刻虚拟填料的优化去耦电容器

    公开(公告)号：US06232154B1

    公开(公告)日：2001-05-15

    申请号：US09442890

    申请日：1999-11-18

    申请人： Armin M. Reith ,  Louis Hsu ,  Henning Haffner ,  Gunther Lehmann

    发明人： Armin M. Reith ,  Louis Hsu ,  Henning Haffner ,  Gunther Lehmann

    IPC分类号： H01L2182

    CPC分类号： H01L28/40 ,  H01L27/10861 ,  H01L27/10894 ,  H01L27/10897

    摘要： A method to optimize the size and filling of decoupling capacitors for very large scale integrated circuits (VLSI) using existing lithographic fillers. The method combines the automatic or manual generation of lithographic fill patterns with the forming of the capacitors. According to the method, when the chip layout is about to be finished, all remaining empty space on the chip gets identified by a layout tool. Then, the closest power-supply nets get extracted. All power supplies and their combinations are sorted in a connection table which determines the appropriate types of capacitances once the power-supply nets closest to the empty spaces extracted from the layout. The empty spaces are then assigned appropriate decoupling capacitances. Decoupling capacitors generated by the method are suitable for VLSI power supplies for noise reduction.

    摘要翻译： 使用现有的平版印刷填料，优化大型集成电路（VLSI）的去耦电容的尺寸和填充的方法。 该方法将自动或手动生成光刻填充图案与电容器的形成相结合。 根据该方法，当芯片布局即将完成时，芯片上剩余的空余空间由布局工具识别。 然后，最近的电源网络被提取。 所有电源及其组合在连接表中排序，一旦电源网最接近从布局提取的空白空间中，则确定适当类型的电容。 然后空的空间被分配适当的去耦电容。 通过该方法产生的去耦电容适用于降低噪声的VLSI电源。

    Mask layout formation
    3.
    发明授权
    Mask layout formation 有权
    面膜布局形成

    公开(公告)号：US08875063B2

    公开(公告)日：2014-10-28

    申请号：US12901595

    申请日：2010-10-11

    申请人： Zachary Baum ,  Scott D. Halle ,  Henning Haffner

    发明人： Zachary Baum ,  Scott D. Halle ,  Henning Haffner

    IPC分类号： G06F17/50 ,  G03F1/00 ,  G03F1/30

    CPC分类号： G03F1/30 ,  G03F1/0069

    摘要： A method for forming a mask layout is described. A plurality of phase shapes are formed on either side of a critical feature of a design layout of an intergrated circuit chip having a plurality of critical features. A plurality of transition edges are identified from the edges of each phase shape. Each transition edge is parallel to critical feature. A transition space is identified as defined by one of the group including two transition edges and one transition edge. A transition polygon is formed by closing each transition space with at least one closing edge. Each transition polygon is transformed into a printing assist feature. A mask layout is formed from the printing assist features and critical features.

    摘要翻译： 描述了形成掩模布局的方法。 在具有多个关键特征的集成电路芯片的设计布局的关键特征的任一侧上形成多个相位形状。 从每个相位形状的边缘识别多个过渡边缘。 每个过渡边缘与关键特征平行。 识别由包括两个过渡边缘和一个过渡边缘的组之一所定义的过渡空间。 通过用至少一个关闭边缘关闭每个过渡空间来形成过渡多边形。 每个过渡多边形被转换成打印辅助功能。 从打印辅助功能和关键特征形成面罩布局。

    L-shaped feature, method of making an L-shaped feature and method of making an L-shaped structure
    4.
    发明授权
    L-shaped feature, method of making an L-shaped feature and method of making an L-shaped structure 有权
    L形特征，制作L形特征的方法和制作L形结构的方法

    公开(公告)号：US08426114B2

    公开(公告)日：2013-04-23

    申请号：US13016841

    申请日：2011-01-28

    申请人： Henning Haffner ,  Martin Ostermayr

    发明人： Henning Haffner ,  Martin Ostermayr

    IPC分类号： G03F7/00

    CPC分类号： G03F1/36 ,  G03F1/32

    摘要： In accordance with an embodiment of the present invention, a method for making a semiconductor device comprises forming a photo sensitive layer on a semiconductive substrate, and forming an L-shaped structure in the photo sensitive layer by exposing the photo sensitive layer to light via a reticle, wherein the reticle comprises an L-shapes feature having a first non-orthogonal edge at an intersection of two legs of the L-shaped feature.

    摘要翻译： 根据本发明的实施例，制造半导体器件的方法包括在半导体衬底上形成感光层，并且通过经由光敏层曝光光敏层而在光敏层中形成L形结构 掩模版，其中所述标线片包括在所述L形特征的两条腿的交叉处具有第一非正交边缘的L形特征。

    Generating cut mask for double-patterning process
    5.
    发明授权
    Generating cut mask for double-patterning process 失效
    生成双图案工艺的切割面具

    公开(公告)号：US08365108B2

    公开(公告)日：2013-01-29

    申请号：US12985643

    申请日：2011-01-06

    申请人： Zachary Baum ,  Henning Haffner ,  Scott M. Mansfield

    发明人： Zachary Baum ,  Henning Haffner ,  Scott M. Mansfield

    IPC分类号： G06F17/50 ,  G06F19/00 ,  G03F1/00 ,  G21K5/00 ,  G06K9/00

    CPC分类号： G03F1/36 ,  G03F1/70

    摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.

    摘要翻译： 本发明的方面包括设计光掩模的计算机实现的方法。 在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。

    METHODOLOGY OF PLACING PRINTING ASSIST FEATURE FOR RANDOM MASK LAYOUT
    8.
    发明申请
    METHODOLOGY OF PLACING PRINTING ASSIST FEATURE FOR RANDOM MASK LAYOUT 有权
    打印辅助功能的随机面膜布局方法

    公开(公告)号：US20100175040A1

    公开(公告)日：2010-07-08

    申请号：US12350251

    申请日：2009-01-08

    申请人： Jason E. Meiring ,  Henning Haffner

    发明人： Jason E. Meiring ,  Henning Haffner

    IPC分类号： G06F17/50

    CPC分类号： G03F1/36

    摘要： Embodiments of the present invention provide a method of placing printing assist features in a mask layout. The method includes providing a design layout having one or more designed features; generating a set of parameters, the set of parameters being associated with one or more printing assist features (PrAFs); adding the one or more PrAFs of the set of parameters to the design layout to produce a modified design layout; performing simulation of the one or more PrAFs and the one or more designed features on the modified design layout; verifying whether the one or more PrAFs are removable based on results of the simulation; and creating a set of PrAF placement rules based on the set of parameters, if the one or more PrAFs are verified as removable. The set of PrAF placement rules may be used in creating a final set of PrAF features to be used for creating the mask layout.

    摘要翻译： 本发明的实施例提供了一种将打印辅助特征放置在掩模布局中的方法。 该方法包括提供具有一个或多个设计特征的设计布局; 产生一组参数，该组参数与一个或多个打印辅助特征（PrAF）相关联; 将该组参数中的一个或多个PrAF添加到设计布局以产生修改的设计布局; 在修改的设计布局上执行一个或多个PrAF的模拟和一个或多个设计的特征; 基于模拟结果验证一个或多个PrAF是否可移除; 以及如果一个或多个PrAF被验证为可移除的，则基于该参数集创建一组PrAF放置规则。 PrAF放置规则的集合可以用于创建用于创建掩模布局的最后一组PrAF特征。